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Acorn Technologies Inc patents


Recent patent applications related to Acorn Technologies Inc. Acorn Technologies Inc is listed as an Agent/Assignee. Note: Acorn Technologies Inc may have other listings under different names/spellings. We're not affiliated with Acorn Technologies Inc, we're just tracking patents.

ARCHIVE: New 2018 2017 2016 2015 2014 2013 2012 2011 2010 2009 | Company Directory "A" | Acorn Technologies Inc-related inventors


Method for depinning the fermi level of a semiconductor at an electrical junction and devices incorporating such junctions

An electrical device in which an interface layer is disposed in between and in contact with a conductor and a semiconductor.... Acorn Technologies Inc

Metal contacts to group iv semiconductors by inserting interfacial atomic monolayers

Techniques for reducing the specific contact resistance of metal-semiconductor (group IV) junctions by interposing a monolayer of group V or group III atoms at the interface between the metal and the semiconductor, or interposing a bi-layer made of one monolayer of each, or interposing multiple such bi-layers. The resulting low... Acorn Technologies Inc

Soi wafers and devices with buried stressor

A semiconductor structure includes a layer arrangement consisting of, in sequence, a semiconductor-on-insulator layer (SOI) over a buried oxide (BOX) layer over a buried stressor (BS) layer with a silicon bonding layer (BL) intervening between the BOX and the BS layers. The semiconductor structure may be created by forming the... Acorn Technologies Inc

Strained semiconductor using elastic edge relaxation of a stressor combined with buried insulating layer

An SOI wafer contains a compressively stressed buried insulator structure. In one example, the stressed buried insulator (BOX) may be formed on a host wafer by forming silicon oxide, silicon nitride and silicon oxide layers so that the silicon nitride layer is compressively stressed. Wafer bonding provides the surface silicon... Acorn Technologies Inc

Insulated gate field effect transistor having passivated schottky barriers to the channel

A transistor having at least one passivated Schottky barrier to a channel includes an insulated gate structure on a p-type substrate in which the channel is located beneath the insulated gate structure. The channel and the insulated gate structure define a first and second undercut void regions that extend underneath... Acorn Technologies Inc

Communication system determining time of arrival using matching pursuit

A wireless receiver receives location pilots embedded in received symbols and uses the location pilots to detect the first path for every base station the network has designated for the receiver to use in time of arrival estimation. The receiver preferably applies matching pursuit strategies to offer a robust and... Acorn Technologies Inc








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