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Alpha And Omega Semiconductor Incorporated patents

Recent patent applications related to Alpha And Omega Semiconductor Incorporated. Alpha And Omega Semiconductor Incorporated is listed as an Agent/Assignee. Note: Alpha And Omega Semiconductor Incorporated may have other listings under different names/spellings. We're not affiliated with Alpha And Omega Semiconductor Incorporated, we're just tracking patents.

ARCHIVE: New 2017 2016 2015 2014 2013 2012 2011 2010 2009 | Company Directory "A" | Alpha And Omega Semiconductor Incorporated-related inventors




Date Alpha And Omega Semiconductor Incorporated patents (updated weekly) - BOOKMARK this page
10/05/17Variable snubber for mosfet application
10/05/17Self-aligned contact for trench power mosfet
10/05/17Diode structures with controlled injection efficiency for fast switching
09/14/17Lateral pnp bipolar transistor with narrow trench emitter
08/17/17Semiconductor device with thresholdmosfet for high voltage termination
08/17/17Process method and structure for high voltage mosfets
07/27/17Optimized configurations to integrate steering diodes in low capacitance transient voltage suppressor (tvs)
07/27/17Dual channel trench ldmos transistors with drain superjunction structure integrated therewith
07/13/17Power device and preparation method thereof
06/22/17Transient voltage suppressor (tvs) with reduced breakdown voltage
06/01/17Compact cmos device isolation
05/25/17Semiconductor device including superjunction structure formed using angled implant process
05/25/17Termination design for high voltage device
05/18/17Top drain ldmos
05/11/17Low cost and mask reduction high voltage devices
05/11/17Split-gate trench power mosfet with protected shield oxide
04/06/17Battery protection package and process of making the same
04/06/17Fabrication of shielded gate trench mosfet with increased source-metal contact
03/30/17System and extending the maximum duty cycle of a step-down switching converter without maximum duty control
03/23/17Nanotube semiconductor devices
03/02/17Jfet and ldmos transistor formed using deep diffusion regions
02/23/17Termination structure with multiple embedded potential spreading capacitive structures for trench mosfet
02/16/17Integrating enhancement mode depleted accumulation/inversion channel devices with mosfets
02/02/17Battery protection package and process of making the same
01/26/17Method and structure for wafer level packaging with large contact area
12/29/16Power semiconductor package device having locking mechanism, and preparation method thereof
12/29/16Semiconductor package with small gate clip and assembly method
12/29/16Normally off gallium nitride field effect transistors (fet)
12/29/16Lateral super-junction mosfet device and termination structure
12/22/16Termination structure for gallium nitride schottky diode
12/08/16Compact guard ring structure for cmos integrated circuits
12/01/16High voltage field balance metal oxide field effect transistor (fbm)
11/17/16New dual-gate trench igbt with buried floating p-type shield
11/10/16Split poly connection via through-poly-contact (tpc) in split-gate based power mosfets
11/03/16Nano-tube mosfet technology and devices
11/03/16Device structure and manufacturing method using hdp deposited source-body implant block
10/27/16Hybrid packaged lead frame based multi-chip semiconductor device with multiple interconnecting structures
10/20/16Combined packaged power semiconductor device
10/13/16Uni-directional transient voltage suppressor (tvs)
10/13/16Nanotube semiconductor devices
10/13/16Self-aligned contact for trench power mosfet
10/13/16Mosfet with integrated schottky diode
09/29/16Configuration and method to generate saddle junction electric field in edge termination
09/29/16Methods for fabricating anode shorted field stop insulated gate bipolar transistor
09/15/16Closed cell configuration to increase channel density for sub-micron planar semiconductor power device
09/15/16Dual trench-gate igbt structure
09/08/16Fault tolerant power supply incorporating intelligent load switch to provide uninterrupted power
09/08/16Semiconductor power devices manufactured with self-aligned processes and more reliable electrical contacts
09/01/16Field effect transistor with integrated zener diode
09/01/16Low cost and mask reduction high voltage devices
08/25/16Lateral pnp bipolar transistor with narrow trench emitter
08/04/16Closed cell lateral mosfet using silicide source and body regions with self-aligned contacts
07/07/16Injection control in semiconductor power devices
06/30/16Split-gate trench power mosfet with protected shield oxide
06/30/16Fabrication of mosfet device with reduced breakdown voltage
06/30/16Nano mosfet with trench bottom oxide shielded and third dimensional p-body contact
06/16/16Integrating enhancement mode depleted accumulation/inversion channel devices with mosfets
05/26/16Vertical dmos transistor
05/19/16High frequency switching mosfets with low output capacitance using a depletable p-shield
04/28/16Corner layout for high voltage semiconductor devices
04/07/16Embedded package and method thereof
04/07/16Semiconductor device employing trenches for active gate and isolation
04/07/16Termination design by metal strapping guard ring trenches shorted to a body region to shrink termination area
04/07/16Oxide terminated trench mosfet with three or four masks
04/07/16Nanotube semiconductor devices
Patent Packs
04/07/16Dual oxide trench gate power mosfet using oxide filled trench
03/31/16Semiconductor package with small gate clip and assembly method
03/24/16Semiconductor device including superjunction structure formed using angled implant process
03/17/16Wafer process for molded chip scale package (mcsp) with thick backside metallization
03/03/16Method and structure for wafer level packaging with large contact area
03/03/16High density trench-based power mosfets with self-aligned active contacts and making such devices
02/25/16Power semiconductor device and preparation method thereof
02/18/16Single package synchronous rectifier
02/11/16Power trench mosfet with improved unclamped inductive switching (uis) performance and preparation method thereof
02/11/16Method of forming sgt mosfets with improved termination breakdown voltage
02/04/16Mcsp power semiconductor devices and preparation methods thereof
02/04/16High density mosfet array with self-aligned contacts enhancement plug and method
01/21/16Fabrication of shielded gate trench mosfet with increased source-metal contact
01/07/16Integrating schottky diode into power mosfet
12/31/15Forming jfet and ldmos transistor in monolithic power integrated circuit using deep diffusion regions
Patent Packs
12/31/15Compact cmos device isolation
12/31/15Compact guard ring structure for cmos integrated circuits
12/31/15Device structure and methods of making high density mosfets for load switch and dc-dc applications
12/24/15High voltage field balance metal oxide field effect transistor (fbm)
12/24/15Method to manufacture short channel trench mosfet
12/10/15Combined packaged power semiconductor device
12/10/15Charge reservoir igbt top structure
12/03/15Injection control in semiconductor power devices
11/26/15Substrateless power device packages
11/26/15High density mosfet array with self-aligned contacts delimited by nitride-capped trench gate stacks and method
11/26/15Active esd protection circuit
11/19/15Cascoded high voltage junction field effect transistor
11/19/15Semiconductor device with termination structure for power mosfet applications
11/12/15Embedded package and method thereof
10/29/15Split poly connection via through-poly-contact (tpc) in split-gate based power mosfets
10/29/15Fault tolerant power supply incorporating intelligent gate driver-switch circuit to provide uninterrupted power
10/15/15Mosfet switch circuit for slow switching application
10/08/15Closed cell lateral mosfet using silicide source and body regions
10/01/15Semiconductor device with thick bottom metal and preparation method thereof
10/01/15Termination design for high voltage device
10/01/15Normally on high voltage switch
08/20/15Method of hybrid packaging a lead frame based multi-chip semiconductor device with multiple interconnecting structures
08/13/15Protection circuit including vertical gallium nitride schottky diode and schottky diode
08/06/15Floating guard ring for hv interconnect
07/30/15Termination structure with multiple embedded potential spreading capacitive structures for trench mosfet
07/30/15Vertical dmos transistor
07/09/15Shielded gate trench mos with improved source pickup layout
06/25/15Method of making stacked multi-chip packaging structure
06/25/15Dual oxide trench gate power mosfet using oxide filled trench
06/18/15Method of making integrated mosfet-schottky diode device with reduced source and body kelvin contact impedance and breakdown voltage
Social Network Patent Pack
06/18/15Self aligned trench mosfet with integrated diode
06/04/15Nanotube semiconductor devices
05/28/15High density trench-based power mosfets with self-aligned active contacts and making such devices
05/21/15Charge reservoir igbt top structure
05/21/15Oxide terminated trench mosfet with three or four masks
05/21/15High frequency switching mosfets with low output capacitance using a depletable p-shield
05/14/15Method to manufacture short channel trench mosfet
04/09/15Dual gate oxide trench mosfet with channel stop trench
03/12/15Lateral pnp bipolar transistor formed with multiple epitaxial layers
03/12/15Multi-die power semiconductor device packaged on a lead frame unit with multiple carrier pins and a metal clip
Patent Packs
02/26/15Substrateless power device packages
02/05/15Vertical semiconductor mosfet device with double substrate-side multiple electrode connections and encapsulation
01/22/15Normally on high voltage switch
01/22/15Packaging structure of a semiconductor device
01/01/15Trench mosfet with integrated schottky barrier diode
01/01/15Wafer level chip scale package with exposed thick bottom metal
10/09/14Nanotube semiconductor devices
09/18/14Shielded gate trench mosfet package
09/18/14Switching regulator with adaptive pwm/pfm modulator
09/18/14Active esd protection circuit
09/18/14Fault tolerant power supply incorporating intelligent gate driver-switch circuit to provide uninterrupted power
09/18/14Method for forming termination structure for gallium nitride schottky diode
09/18/14Fault tolerant power supply incorporating intelligent load switch to provide uninterrupted power
09/11/14Vertical gallium nitride schottky diode
08/28/14High frequency switching mosfets with low output capacitance using a depletable p-shield
08/28/14Termination trench for power mosfet applications
08/28/14Method for preparing semiconductor devices applied in flip chip technology
08/21/14Method of making mosfet integrated with schottky diode with simplified one-time top-contact trench etching
08/14/14Method of making a low-rdson vertical power mosfet device
08/14/14Semiconductor device employing trenches for active gate and isolation
08/07/14Power factor correction device and correcting method thereof
07/10/14Termination design for high voltage device
06/19/14Vertical dmos transistor
05/22/14Oxide terminated trench mosfet with three or four masks
05/15/14Fabrication of shielded gate trench mosfet with increased source-metal contact
04/17/14Dual-leadframe multi-chip package
04/03/14Mosfet device and fabrication
03/20/14Semiconductor packaging method using connecting plate for internal connection
03/13/14Semiconductor package with connecting plate for internal connection
03/13/14Method for forming a schottky barrier diode integrated with a trench mosfet
Patent Packs
02/27/14Mosfet device with reduced breakdown voltage
02/27/14Stacked dual chip package having leveling projections
02/20/14Self aligned trench mosfet with integrated diode
02/20/14Ldmos with accumulation enhancement implant
02/13/14Nanotube semiconductor devices
02/06/14Top exposed semiconductor chip package
01/30/14Corner layout for high voltage semiconductor devices
01/30/14Termination design for high voltage device
01/30/14High voltage field balance metal oxide field effect transistor (fbm)
12/19/13Integrated snubber in a single poly mosfet
11/21/13Semiconductor encapsulation method
11/21/13Integrating schottky diode into power mosfet
09/05/13Method of forming an assymetric poly gate for optimum termination design in trench power mosfets
08/08/13Fabrication of mosfet device with reduced breakdown voltage
05/23/13Oxide terminated trench mosfet with three or four masks
05/16/13Dual channel trench ldmos transistors and transistors integrated therewith
05/02/13Two-dimensional shielded gate transistor device and manufacture
04/25/13Led current control
03/21/13Semiconductor chip integrating high and low voltage devices
03/21/13Semiconductor chip integrating high and low voltage devices
Social Network Patent Pack
03/21/13Method of integrating high voltage devices
03/21/13Method of integrating high voltage devices
01/03/13Low capacitance transient voltage suppressor (tvs) with reduced clamping voltage
12/20/12Split-gate structure in trench-based silicon carbide power device
12/13/12High voltage and high power boost conveter with co-packaged schottky diode
12/06/12Edge termination configurations for high voltage semiconductor power devices
11/29/12Constant on-time switching regulator implementing dual control loops
11/29/12Fabrication of mos device with varying trench depth
11/08/12Integrating schottky diode into power mosfet
11/01/12Through silicon via processing techniques for lateral double-diffused mosfets
10/04/12Configuration and method to generate saddle junction electric field in edge termination
07/26/12Trench poly esd formation for trench mos and sgt
06/28/12Chip scale surface mounted semiconductor device package and process of manufacture
06/14/12Self aligned trench mosfet with integrated diode
05/31/12Oxide terminated trench mosfet with three or four masks
05/24/12Accufet with integrated clamping circuit
05/03/12Topside structures for an insulated gate bipolar transistor (igbt) device to achieve improved device performances
05/03/12Substrateless power device packages
04/12/12Low leakage dynamic bi-directional body-snatching (lldbbs) scheme for high speed analog switches
02/02/12Wafer level chip scale package
Social Network Patent Pack
02/02/12Inverted-trench grounded-source fet structure using conductive substrates, with highly doped substrates
11/24/11Bottom anode schottky diode structure and method
09/29/11Oxide terminated trench mosfet with three or four masks
09/29/11Dual gate oxide trench mosfet with channel stop trench and three or four masks process
09/22/11Stacked dual chip package and fabrication
09/15/11Shielded gate trench mos with improved source pickup layout
09/01/11Mos device with varying trench depth
08/25/11Shielded gate trench (sgt) mosfet devices and manufacturing processes
08/25/11Corner layout for superjunction device
08/18/11Configuration of high-voltage semiconductor power device to achieve three dimensional charge coupling
06/23/11Method of forming a self-aligned charge balanced power dmos
06/23/11Configuration of gate to drain (gd) clamp and esd protection circuit for power device breakdown protection
06/09/11Shielded gate trench mosfet with increased source-metal contact
06/02/11Dual channel trench ldmos transistors and bcd process with deep trench isolation
06/02/11Process to form semiconductor packages with external leads
06/02/11Encapsulation packaging semiconductor components with external leads
05/12/11Wafer level chip scale package and process of manufacture
05/05/11Staggered column superjunction
04/28/11Flexible low current oscillator for multiphase operations
04/07/11Cascoded high voltage junction field effect transistor
03/31/11True csp power mosfet based on bottom-source ldmos
03/24/11Super-self-aligned trench-dmos structure and method
01/27/11Chip scale surface mounted semiconductor device package and process of manufacture
01/20/11Bottom-drain ldmos power mosfet structure having a top drain strap
01/06/11Configurations and methods for manufacturing charge balanced devices
12/23/10Integration of sense fet into discrete power mosfet
12/16/10Integration of a sense fet into a discrete power mosfet
11/18/10High density trench mosfet with single mask pre-defined gate and contact trenches
09/09/10High voltage and high power boost conveter with co-packaged schottky diode
06/24/10Junction barrier schottky (jbs) with floating islands
Social Network Patent Pack
06/24/10Configuration of high-voltage semiconductor power device to achieve three dimensional charge coupling
06/10/10Inverted-trench grounded-source fet structure using conductive substrates, with highly doped substrates
06/03/10Bottom anode schottky diode structure and method
04/08/10Polysilicon control etch-back indicator
02/11/10Super-self-aligned trench-dmos structure and method







ARCHIVE: New 2017 2016 2015 2014 2013 2012 2011 2010 2009



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