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Arm Limited
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Arm Limited patents

Recent patent applications related to Arm Limited. Arm Limited is listed as an Agent/Assignee. Note: Arm Limited may have other listings under different names/spellings. We're not affiliated with Arm Limited, we're just tracking patents.

ARCHIVE: New 2017 2016 2015 2014 2013 2012 2011 2010 2009 | Company Directory "A" | Arm Limited-related inventors




Date Arm Limited patents (updated weekly) - BOOKMARK this page
07/20/17 new patent  Data processing systems
07/20/17 new patent  Correlation determination early termination
07/13/17Circuitry and performing division
07/13/17Data processing
07/13/17Harvesting power from ambient energy in an electronic device
07/06/17Cache memory
07/06/17Handling interrupts in a multi-processor system
07/06/17Graphics processing
07/06/17Port modes for use with memory
06/29/17Handling move instructions using register renaming
06/29/17Snoop optimization for multi-ported nodes of a data processing system
06/29/17A data processing apparatus, and a handling address translation within a data processing apparatus
06/29/17Arbitration of requests requiring a variable number of resources
06/29/17Method and adjusting a timing derate for static timing analysis
06/29/17Resistance mitigation in physical design
06/22/17Clock frequency reduction for an electronic device
06/22/17Memory synchronization filter
06/22/17Computer implemented modifying a layout of standard cells defining a circuit component
06/22/17Graphics processing systems
06/22/17Integrated circuit using topology configurations
06/15/17Segregated power state control in a distributed cache system
06/15/17Data processing
06/15/17Optimized streaming in an un-ordered interconnect
06/15/17Snoop filter for cache coherency in a data processing system
06/15/17System address map for hashing within a chip and between chips
06/15/17Efficient support for variable width data channels in an interconnect network
06/08/17A device controller and performing a plurality of write transactions atomically within a nonvolatile data storage device
06/08/17Call stack maintenance for a transactional data processing execution mode
06/08/17Dynamic saving of registers in transactions
06/08/17Graphics processing systems
06/08/17Data processing systems
06/01/17Data processing apparatus and method
06/01/17Apparatus and branch prediction
06/01/17Apparatus and handling atomic update operations
05/25/17Apparatus and managing a branch information storage
05/25/17Dynamic memory scrambling
05/25/17Motor driver and a operating thereof
05/18/17Redundant representation of numeric value using overlap bits
05/18/17Overlap propagation operation
05/18/17Lane position information for processing of vector
05/18/17Multiplication of first and second operands using redundant representation
05/18/17Data processing
05/18/17Handling stalling event for multiple thread pipeline, and triggering action based on information access delay
05/18/17Branch prediction in a data processing apparatus
05/18/17A data processing performing lock-protected processing operations for multiple threads
05/18/17Display controller
05/18/17Display controller
05/11/17Apparatus and supporting out-of-order program execution of instructions
05/11/17Apparatus and processing instructions from a plurality of threads
05/04/17Controlling memory access to non-volatile memory
05/04/17Modifying behaviour of a data processing unit
05/04/17Instruction fusion
05/04/17Method of and graphics processing
04/27/17Location-based optimization for memory systems
04/20/17Apparatus and accessing data in a data store
04/20/17Apparatus and operating a virtually indexed physically tagged cache
04/13/17Floating point number rounding
04/06/17Standard cell architecture layout
03/30/17Data storage
03/30/17Apparatus and floating-point multiplication
03/30/17Apparatus and floating-point multiplication
03/30/17Hazard checking
03/30/17Apparatus and prefetching
03/30/17Translations between virtual and physical addresses
03/16/17Method and generating a profile of a target program
Patent Packs
03/16/17Error protection
03/16/17Contact resistance mitigation
03/16/17Integrated circuit design
03/16/17Interface apparatus and operating an interface apparatus
03/16/17Power state based data retention
03/09/17Graphics processing systems
03/09/17Integrated keeper circuit
03/02/17Providing count value between domains
03/02/17Data processing systems
03/02/17Apparatus and providing resilience to attacks on reset of the apparatus
03/02/17Method of and scaling data arrays
03/02/17Graphics processing systems
03/02/17Dynamic capacitance balancing
03/02/17Via placement within an integrated circuit
02/23/17Tracing of exception handling events
Patent Packs
02/23/17Data access and ownership management
02/16/17Critical path architect
02/16/17Address dependent data encryption
02/16/17Method of and generating an encoded frame
02/09/17Data processing systems
02/09/17Data processing systems
02/09/17Graphics processing systems
02/09/17Graphics processing
02/09/17Graphics processing
02/09/17Overdrive receiver circuitry
02/02/17Apparatus and detecting a resonant frequency giving rise to an impedance peak in a power delivery network
02/02/17Element size increasing instruction
02/02/17Apparatus with reduced hardware register set
02/02/17Task scheduling
02/02/17Apparatus and transferring a plurality of data structures between memory and a plurality of vector registers
02/02/17Graphics processing systems
02/02/17Graphics processing systems
01/26/17Method of and generating a signature representative of the content of an array of data
01/26/17Event queue management
01/26/17Cache usage estimation
01/26/17Maintaining secure data isolated from non-secure access when switching between domains
01/26/17Data processing systems
01/26/17Graphics processing
01/26/17Method of and processing graphics
01/26/17Gathering monitoring data relating to the operation of a data processing system
01/19/17Execution of micro-operations
01/19/17Transactional memory support
01/12/17Apparatus and performing division
01/12/17Apparatus and controlling rounding when performing a floating point operation
01/12/17Address decoding circuitry
Social Network Patent Pack
01/12/17Arbitrating and multiplexing circuitry
01/05/17Data processing systems
01/05/17Exception handling in microprocessor systems
01/05/17Translation buffer unit management
01/05/17Single rf oscillator technique for bult-in tune, test, and calibration of a transceiver
12/29/16Error recovery within integrated circuit
12/29/16Signal generation and waveform shaping
12/22/16Determination of branch convergence in a sequence of program instruction
12/22/16Tracing processing activity
12/22/16Method and controlling display operations
Patent Packs
12/22/16Transmitter, a receiver, a data transfer system and a data transfer
12/15/16Apparatus and inhibiting roundoff error in a floating point argument reduction operation
12/15/16Hardware based coherency between a data processing device and interconnect
12/15/16Liberty file generation
12/15/16Video processing system
12/08/16Controlling execution of instructions for a processing pipeline having first and second execution circuitry
12/08/16Apparatus having processing pipeline with first and second execution circuitry, and method
12/08/16Mode switching in dependence upon a number of active threads
12/08/16Flushing control within a multi-threaded processor
12/08/16Apparatus and controlling access to a memory device
12/08/16Method for adjusting a timing derate for static timing analysis
12/01/16Register renaming
12/01/16Register renaming
12/01/16Cache coherency
12/01/16Cache coherency
11/24/16Low power input gating
11/17/16Brown-out detector
11/17/16Processing queue management
11/17/16Available register control for register renaming
11/10/16Tracking the content of a cache
11/03/16Systems and methods for short range wireless data transfer
11/03/16Error protection key generation method and system
11/03/16Enforcing data protection in an interconnect
11/03/16Data processing apparatus having a cache
11/03/16Computer-implemented method and computer program for generating a layout of a circuit block of an integrated circuit
11/03/16Power supply clamp
11/03/16Motor driver and a operating thereof
11/03/16Data processing apparatus, controller, cache and method
10/27/16Memory management
10/27/16Method of and displaying an output surface in data processing systems
Patent Packs
10/27/16Integrated circuit
10/20/16Accumulation of floating-point values
10/20/16Branch prediction
10/20/16Data processing on a non-volatile mass storage device
10/20/16Power-on-reset detector
10/13/16Logic analysis
10/06/16Event monitoring in a multi-threaded data processing apparatus
10/06/16Read-write contention circuitry
09/29/16Memory management
09/29/16Graphics processing
09/22/16Integrated circuit using topology configurations
09/15/16Graphics processing systems
09/15/16Graphics processing system
09/08/16Initialising control data for a device
09/08/16Apparatus and executing a plurality of threads
09/08/16Memory management
09/08/16Cache dormant indication
09/08/16Memory management
09/08/16Handling address translation requests
09/08/16Method and processing computer graphics primitives in tile-based graphics rendering system
Social Network Patent Pack
09/01/16Error detection circuitry for use with memory
08/25/16Tracing the data processing activities of a data processing apparatus
08/25/16Processor exception handling
08/25/16Graphics processing systems
08/18/16An controlling debugging of program instructions including a transaction
08/18/16Apparatus and controlling debugging of program instructions including a transaction
08/18/16Debugging of a data processing apparatus
08/18/16Graphics processing systems
08/11/16Trace data capture device and method, system, diagnostic method and apparatus and computer program
08/11/16Address translation in a data processing apparatus
07/28/16Compositing plural layer of image data for display
07/28/16Data processing systems
07/21/16Handling access attributes for data accesses
07/21/16Level shifter
07/14/16Handling time intensive instructions
07/14/16Interconnect and operation of an interconnect
07/14/16Apparatus and buffered interconnect
07/14/16Apparatus and arbitrating between multiple requests
07/07/16Graphics processing systems
06/30/16Apparatus and issuing access requests to a memory controller
Social Network Patent Pack
06/30/16Video data processing system
06/23/16Apparatus and performing absolute difference operation
06/23/16Cleaning a write-back cache
06/23/16Memory with multiple write ports
06/23/16Assignment of tenancy to devices
06/16/16Power signal interface
06/16/16Electrostatic discharge protection circuitry
06/09/16Integrated circuit device comprising environment-hardened die and less-environment-hardened die
06/02/16System and controlling the power mode of operation of a memory device
06/02/16Memory management
06/02/16System error handling in a data processing apparatus
06/02/16Providing a trustworthy indication of the current state of a multi-processor data processing apparatus
06/02/16Method of and processing frames in a data processing system
05/26/16Data processing apparatus having combined divide-square root circuitry
05/26/16Graphics processing systems
05/19/16Context sensitive barriers in data processing
05/05/16Measurements circuitry and generating an oscillating output signal used to derive timing information
05/05/16Data storage organisation technique
05/05/16Apparatus, method and program for calculating the result of a repeating iterative sum
05/05/16Data processing apparatus and method using programmable significance data
05/05/16Significance alignment
05/05/16Exponent monitoring
05/05/16Exception generation when generating a result value with programmable bit significance
05/05/16Multi-element comparison and multi-element addition
05/05/16Vector operands with component representing different significance portions
05/05/16Apparatus and vector processing
05/05/16Synchroniser flip-flop
05/05/16Operating parameter circuitry and method
05/05/16Apparatus and performing conversion operation
05/05/16Apparatus and performing conversion operation
Social Network Patent Pack
04/28/16Memory device and performing a write operation in a memory device
04/28/16Controlling voltage generation and voltage comparison
04/21/16Apparatus and performing reciprocal estimation operation
04/21/16Branch prediction suppression
04/21/16A tile based graphics processor and a performing graphics processing in a tile based graphics processor
04/14/16System register access
04/14/16Transaction response modification within interconnect circuitry
04/07/16Program code attestation circuitry, a data processing apparatus including such program code attestation circuitry and a program attestation method
04/07/16Data processing systems
04/07/16Data processing systems
03/31/16Apparatus and converting floating-point operand into a value having a different format
03/31/16Standalone floating-point conversion unit
03/31/16Graphics processing systems
03/24/16Descriptor ring management
03/17/16Address dependent data encryption
03/17/16Electrical component with random electrical characteristic
03/17/16Motor driver and a operating thereof
03/17/16Electrical motor system and operating the electrical motor system
03/10/16Speculative register file read suppression
03/10/16Debugging in a data processing apparatus
03/10/16Registry apparatus, agent device, application providing apparatus and corresponding methods
03/03/16Coherency checking of invalidate transactions caused by snoop filter eviction in an integrated circuit
03/03/16Coherency checking of invalidate transactions caused by snoop filter eviction in an integrated circuit
03/03/16Interconnect and managing a snoop filter for an interconnect
03/03/16Data processing protecting secure data and program code from non-secure access when switching between secure and less secure domains
03/03/16Double pumped memory techniques
03/03/16Electric motor with plural stator components
03/03/16Bootstrap mechanism for endpoint devices
02/25/16Enforcing ordering of snoop transactions in an interconnect for an integrated circuit







ARCHIVE: New 2017 2016 2015 2014 2013 2012 2011 2010 2009



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