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Ati Technologies Ulc patents

Recent patent applications related to Ati Technologies Ulc. Ati Technologies Ulc is listed as an Agent/Assignee. Note: Ati Technologies Ulc may have other listings under different names/spellings. We're not affiliated with Ati Technologies Ulc, we're just tracking patents.

ARCHIVE: New 2017 2016 2015 2014 2013 2012 2011 2010 2009 | Company Directory "A" | Ati Technologies Ulc-related inventors




Date Ati Technologies Ulc patents (updated weekly) - BOOKMARK this page
08/17/17Peripheral component
08/10/17Method and system for streaming information in wireless virtual reality
08/03/17Routing direct memory access requests in a virtualized computing environment
08/03/17System for video compression
07/27/17Instruction set and micro-architecture supporting asynchronous memory access
07/27/17Method and selecting an intra prediction mode for use in multiview video coding (mvc)
07/20/17Memory management in graphics and compute application programming interfaces
07/06/17Texture compression techniques
07/06/17Method and device for providing a video stream for an object of interest
06/29/17Data driven scheduler on multiple computing cores
06/29/17Method and determining the severity of corruption in a picture
06/22/17Graphics context scheduling based on flip queue management
06/15/17Aware cache replacement policy
05/25/17Method and electronic device communication
04/13/17Apparatus and video data processing
03/30/17Method and device for noise reduction in multi-frequency clocking environment
03/23/17Selective data copying between memory modules
03/23/17Cache access statistics accumulation for cache line replacement selection
03/23/17Real time video coding system with error recovery using earlier reference picture
03/09/17Virtualized display output ports configuration
12/29/16Shared virtual address space for heterogeneous processors
12/29/16Access log and address translation log for a processor
12/29/16Receiver packet handling
12/29/16Power saving audio-video playback
12/22/16Memory heaps in a memory model for a unified computing system
12/22/16Hybrid render with preferred primitive batch binning and sorting
12/15/16Managing coherent memory between an accelerated processing device and a central processing unit
12/15/16Methods and processing graphics data using multiple processing circuits
12/01/16Method and system for constant time cryptography using a co-processor
11/10/16Methods and optical blur modeling for improved video encoding
10/20/16Performance state selection for low activity scenarios
10/20/16Graphics processing architecture employing a unified shader
10/06/16Efficient low-complexity video compression
09/22/16Method and compensating for variable refresh rate display range limitations
09/08/16Methods and apparatus including integrated conducting and inductive element for providing current
09/08/16Content-adaptive b-picture pattern video encoding
08/11/16Multi-purpose power controller and method
08/11/16Method for maximizing video slice size constraint
08/04/16Efficient mode decision multiview video coding
08/04/16Technique to constrain a video slice size with reduced performance penalty on pipelined encoder architectures
07/14/16Method and rate control for constant-bit-rate-finite-buffer-size video encoder
07/07/16Extending the range of variable refresh rate displays
06/30/16Nvram-aware data processing system
06/16/16Virtualized display output ports configuration
06/09/16Memory management in graphics and compute application programming interfaces
06/09/16Shader pipelines and hierarchical shader resources
05/19/16Multi-thread graphics processing system
05/12/16Controlling power consumption in video encoding based on information regarding static amount of an image frame
04/28/16Power management using external sensors and data
04/28/16Modifying gradation in an image frame including applying a weighting to a previously processed portion of the image frame
04/28/16Method and encoding instantaneous decoder refresh units
04/07/16Crystal oscillator circuit with reduced startup time
03/03/16Routing direct memory access requests in a virtualized computing environment
03/03/16Extension of the mpeg/sc3dmc standard to polygon meshes
02/04/16Adaptive search window positioning for video encoding
12/24/15Responding to user input including providing user feedback
12/17/15Method and audio synchronization
12/17/15Translation layer for controlling bus access
12/17/15Memory heaps in a memory model for a unified computing system
12/03/15System and adjusting performance based on thermal conditions within a processor
12/03/15Methods and dividing secondary storage
11/26/15Dynamic feedback load balancing
11/12/15Bus protocol compatible device and method therefor
10/08/15System and testing processor units using cache resident testing
10/01/15Spatial dithering for a display panel
Patent Packs
09/24/15Enhanced intra prediction mode selection for use in video transcoding
09/03/15Method and device for link over-training
07/09/15Electrostatic discharge equalizer
06/04/15Graphics processing architecture employing a unified shader
06/04/15Memory device for providing data in a graphics system and method and apparatus thereof
04/30/15Single display pipe multi-view frame composer method and apparatus
04/30/15Input/output memory map unit and northbridge
04/23/15System-level testing of non-singulated integrated circuit die on a wafer
04/16/15Leveraging a peripheral device to execute a machine instruction
04/09/15Motion estimation multiview video
04/09/15Back-off mechanism for a peripheral page request log
04/02/15Exploiting camera depth information for video encoding
03/12/15Performing video encoding mode decision based on motion activity
03/05/15Phase locked loop with bandwidth control
03/05/15Proportional-to-supply analog current generator
Patent Packs
02/05/15Method, apparatus and machine-readable medium for apportioning video processing between a video source device and a video sink device
01/29/15Performing video encoding mode decisions based on down-scaled macroblock texture complexity
01/15/15Apparatus and fast multiview video coding
12/25/14Processor core to graphics processor task scheduling and execution
12/25/14Virtualized device reset
11/27/14Method and mapping a physical memory having a plurality of memory regions
11/20/14Event based dynamic power management
11/20/14Content presentation system and method
11/20/14Method and providing a display stream embedded with non-display data
10/30/14Single-path variable bit rate video compression
10/23/14Multiple output charge pump with peak voltage following frequency divider control
08/14/14Method and reconstructing motion compensated video frames
08/07/14Asymmetric topology to boost low load efficiency in multi-phase switch-mode power conversion
07/31/14Apparatus and video processing
07/31/14Apparatus and video data processing
06/26/14Providing multiple viewer preferences on a display device
06/26/14Method and transcoding video data
06/26/14Configurable communications controller
06/26/14Field-programmable module for interface bridging and input/output expansion
06/19/14Routing layer for mitigating stress in a semiconductor die
06/19/14Scalable high throughput video encoder
06/05/14Methods and dynamically adjusting a power level of an electronic device
05/29/14Self-calibrating digital bandgap voltage and current reference
05/22/14Wireless power transfer device for charging mobile/portable devices
05/22/14Method and enhanced processing of three dimensional (3d) graphics data
05/22/14Firmware-implemented software licensing
05/08/14Adaptive clock mismatch compensation symbol insertion in signal transmissions
05/08/14Output driver with adjustable voltage swing
05/08/14Flexible implementation of serial bus support over display interface
05/08/14Method and device for providing a video stream for an object of interest
Social Network Patent Pack
04/24/14Routing layer for mitigating stress in a semiconductor die
04/24/14Method and device for providing high speed data transmission with video data
04/10/14Method, apparatus and machine-readable medium for describing video processing
04/10/14Method and changing a perspective of a video
04/10/14Method and device for creating and maintaining synchronization between video signals
04/03/14Data transmission between asynchronous environments
03/27/14Method and device for link over-training
03/27/14Bus protocol compatible device and method therefor
03/27/14Control and visualization for multi touch connected devices
03/20/14Method and providing a user interface for a file system
Patent Packs
03/13/14Rendering settings in a multi-graphics processing unit system
03/13/14Multi-purpose power controller and method
03/13/14Method and providing a user interface for a file system
03/06/14Method and device for selective display refresh
02/06/14Methods and systems for processing network messages in an accelerated processing device
02/06/14Method and video stream processing
02/06/14Methods and processing graphics data using multiple processing circuits
01/23/14System and artifact removal
12/26/13Remote audio keep alive for wireless display
12/26/13Modular computing architecture enabling diagnostics
12/26/13Enhanced system management bus
11/28/13Method and block based image compression with multiple non-uniform block encodings
11/14/13Efficient mode decision multiview video coding
10/03/13Mapping memory instructions into a shared memory address place
10/03/13Visibility ordering in a memory model for a unified computing system
09/19/13Method and the scheduling of computing tasks
09/12/13Compositing in multiple video processing unit (vpu) systems
09/12/13Adjusting a data rate of a digital audio stream based on dynamically determined audio playback system capabilities
09/12/13Area-based dependency chain analysis of shaders and command stream
09/12/13System and cache organization in row-based memories
09/05/13Gpu display abstraction and emulation in a virtualization system
08/22/13Multi-thread graphics processing system
08/22/13Method and automatic time-shifting for a content recorder
08/22/13Write data mask method and system
07/18/133d video processing
07/04/13Hardware based virtualization system
07/04/13Method and electronic device communication
06/27/13Method and configuring an integrated circuit
06/27/13High speed serial input/output bus voltage mode driver with tunable amplitude and resistance
06/27/13Auto-calibrating a voltage reference
Patent Packs
06/27/13Synchronization with semaphores in a multi-engine gpu
06/27/13Vertical scan panel with conversion mode capability
06/27/13Downstream video composition
06/27/13Multiview video coding reference picture selection under a one reference picture constraint
06/27/13Write data mask method and system
06/27/13Method and distributed operating system image deployment
06/20/13Phase lock loop with adaptive loop bandwidth
06/20/13Configurable graphics control and monitoring
06/20/13Method and multiple virtual themes for a user interface (ui)
06/20/13Memory access control system and method
06/20/13Method and enabling multiuser use
06/20/13Selective cache for inter-operations in a processor-based environment
06/20/13Method and power management of a graphics processing core in a virtual environment
06/20/13Method and power management of a processor in a virtual environment
06/20/13System and displaying content in an exclusive mode environment
06/20/13Apparatus and managing power on a shared thermal platform for a multi-processor system
06/20/13Device and use of real-time biometric data to control content and device access
06/13/13Heatsink interposer
06/13/13Method and remote extension display
06/13/13Video player with multiple grpahics processors
Social Network Patent Pack
06/13/13Method and centralized timestamp processing
06/13/13Systems and methods for reducing clock domain crossings
06/13/13Mechanism for using a gpu controller for preloading caches
05/30/13Method and correcting rotation of video frames
05/30/13Method and dynamically controlling depth and power consumption of fifo memory
05/30/13Method and adjusting power consumption level of an integrated circuit
05/09/13Image quality configuration apparatus, system and method
04/18/13Wafer level packaging of semiconductor chips
04/04/13Methods and systems to reduce display artifacts when changing display clock rate
03/28/13Method and providing independent gamut remapping for multiple screen subsections
03/14/13Method and providing video enhancements for display images
03/07/13Technique for wafer testing with multidimensional transform
02/28/13Method and system for navigating and selecting objects within a three-dimensional video image
02/28/13Method, circuitry and system for better integrating multiview-based 3d display technology with the human visual system
02/28/13Method and providing dropped picture image processing
02/28/13Method and device for disabling a higher version of a computer bus and interconnection protocol for interoperability with a device compliant to a lower version of the computer bus and interconnection protocol
02/07/13Routing layer for mitigating stress in a semiconductor die
01/10/13Method and system for display output stutter
01/10/13Viewing-focus oriented image processing
01/10/13Graphics multi-media ic and its operation
Social Network Patent Pack
01/03/13Apparatus and video data processing
12/13/12Method and processing video data
12/13/12Method and generating a display data stream for transmission to a remote display
11/29/12Method and apparatus synchronizing integrated circuit clocks
11/08/12Apparatus and multi-streaming for more than three pixel component values
10/25/12Routing layer for mitigating stress in a semiconductor die
09/20/12Embedded clock recovery
09/06/12Method and system for providing user control of two-dimensional image depth within three-dimensional display space
09/06/12Method and system for providing single view video signal based on a multiview video coding (mvc) signal stream
08/30/12Electronic devices using divided multi connector element differential bus connector
08/30/12Device configured to switch a clock speed for multiple links running at different clock speeds and switching the clock speed
07/26/12Display with multiple video inputs and peripheral attachments
07/26/12Loopback testing with phase alignment of a sampling clock at a test receiver apparatus
07/19/12Method and compression of multi-sampled anti-aliasing color data
07/05/12Audio and video clock synchronization
06/28/12Displaying compressed supertile images
06/28/12Physically small tunable narrow band antenna
06/21/12Multiple display frame rendering method and apparatus
06/21/12Method and data transfer
06/14/12Self-refresh panel time synchronization
06/14/12Method and providing indication of a static frame
06/07/12Apparatus for executing programs for a first computer architecture on a computer of a second architecture
05/31/12Method and providing static frame
05/24/12Method and providing temporal image processing using multi-stream field information
05/24/12Integrated package circuit with stiffener
05/24/12Method and system for synchronizing thread wavefront data and events
05/03/12Data output transfer to memory
04/19/12Apparatus and methods for tuning a memory interface
03/29/12System and providing control data for dynamically adjusting lighting and adjusting video pixel data for a display to substantially maintain image display quality while reducing power consumption
03/22/12Variable-length code decoder
Social Network Patent Pack
03/15/12Method and controlling movement of graphical user interface objects
03/15/12Apparatus for providing multi-mode warping of graphical user interface objects
03/01/12Method and configuring a plurality of displays into a single large surface display
03/01/12Method and accommodating display migration among a plurality of physical displays
03/01/12Symmetrical data signal processing
02/23/12System and mapping audio and video streams from audio/video source to multiple audio/video sinks
02/02/12Method and voltage level shifting with concurrent synchronization
02/02/12Method and indicating multi-power rail status of integrated circuits
01/26/12Multi-thread graphics processing system
01/19/12Method and testing an integrated circuit including an i/o interface
01/05/12Method and block based image compression with multiple non-uniform block encodings
01/05/12Seamless integration of multi-gpu rendering
01/05/12Dynamic feedback load balancing
12/29/11Data transmission apparatus with information skew and redundant control information and method
11/03/11Power management in multi-stream audio/video devices
10/20/11Routing layer for mitigating stress in a semiconductor die
10/20/11Method and display of a digital video signal
10/06/11Multiple display chrominance and luminance method and apparatus
09/22/11Method of manufacturing substrates having asymmetric buildup layers
09/08/11Apparatus and monitoring current flow to integrated circuit in temperature-compensated manner
09/08/11Graphics processing architecture employing a unified shader
09/08/11Cache with reload capability after power restoration
09/01/11Field sequence detector, method and video device
07/07/11Method and configuring display bezel compensation for a single large surface display formed by a plurality of displays
06/30/11Dual loop level shifter
06/30/11Three-dimensional video display system with multi-stream sending/receiving operation
06/30/11Method and device for disabling a higher version of a computer bus and interconnection protocol for interoperability with a device compliant to a lower version of the computer bus and interconnection protocol
06/23/11Image quality configuration apparatus, system and method
06/16/11Apparatus and partitioning a display surface into a plurality of virtual display areas







ARCHIVE: New 2017 2016 2015 2014 2013 2012 2011 2010 2009



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