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Cray Inc patents

Recent patent applications related to Cray Inc. Cray Inc is listed as an Agent/Assignee. Note: Cray Inc may have other listings under different names/spellings. We're not affiliated with Cray Inc, we're just tracking patents.

ARCHIVE: New 2017 2016 2015 2014 2013 2012 2011 2010 2009 | Company Directory "C" | Cray Inc-related inventors




Date Cray Inc patents (updated weekly) - BOOKMARK this page
03/09/17Resiliency to memory failures in computer systems
12/15/16Printed circuit board with reduced cross-talk
11/10/16Systems and associated methods for controllably cooling computer components
09/22/16Congestion causation in a network interconnect
09/22/16Congestion abatement in a network interconnect
07/28/16Augmenting queries when searching a semantic database
04/21/16Assisting parallelization of a computer program
03/17/16Apparatus and deadlock avoidance
02/25/16User-controlled graph analysis system
02/11/16Transverse cooling system and method
01/28/16Computer workload manager
08/13/15Dynamic updates to a semantic database using fine-grain locking
06/25/15Congestion abatement in a network interconnect
06/18/15Cross-thread exception handling
05/21/15Dynamic graph system for a semantic database
05/21/15Congestion detection in a network interconnect
03/26/15Assisting parallelization of a computer program
01/15/15Printed circuit board with reduced cross-talk
09/18/14Interface between sparql systems and a non-sparql system
09/18/14Re-forming an application control tree without terminating the application
09/11/14Cooling systems and heat exchangers for cooling computer components
08/28/14Dynamic graph system for a semantic database
05/22/14Increasingly minimal bias routing
03/20/14Dynamic updates to a semantic database using fine-grain locking
09/05/13Computer cabinets having progressive air velocity cooling systems and associated methods of manufacture and use
05/23/13Transverse cooling system and method
12/06/12Performance visualization including hierarchical display of performance data
10/18/12Multiple overlapping block transfers
09/27/12Method and memory read-refresh, scrubbing and variable-rate refresh
08/30/12Configurable vector length computer processor
08/02/12Compact node ordered application placement in a multiprocessor computer
07/12/12Method and switched electrostatic discharge protection
06/07/12Progressive adaptive routing in a dragonfly processor interconnect network
06/07/12Table-driven routing in a dragonfly processor interconnect network
03/22/12"or" bit matrix multiply vector instruction
03/08/12Dimension-ordered application placement in a multiprocessor computer
11/03/11Systems and methods for debugging applications using dual code generation
06/23/11Duty cycle compensating digital data receiver
03/03/11Flexible routing tables for a high-radix router
01/13/11Multiprocessor communication protocol bridge between scalar and vector compute nodes
12/23/10Memory-daughter-card-testing method and apparatus
12/16/10Inclusive or bit matrix to compare multiple corresponding subfields
12/16/10Extended fast memory access in a multiprocessor computer system
12/16/10Multiprocessor computer cache coherence protocol
12/16/10Atomic memory operation cache protocol with opportunistic combining
12/16/10Multiple error management in a multiprocessor computer system
12/16/10System and managing processor-in-memory (pim) operations
12/16/10Using vector atomic memory operation to handle data of different lengths
12/16/10Inclusive "or" bit matrix compare resolution of vector update conflict masks
12/16/10Processor instruction graduation timeout
12/16/10Global clock via embedded spanning tree
12/16/10Vector atomic memory operation vector update system and method
12/02/10Error management firewall in a multiprocessor computer
08/05/10Error management watchdog timers in a multiprocessor computer
07/22/10Fault tolerant memory apparatus, methods, and systems
05/13/10Resource reservations in a multiprocessor computing environment
05/13/10Batch and application scheduler interface layer in a multiprocessor computing environment
05/13/10Application level placement scheduler in a multiprocessor computing environment
05/06/10Unified address space architecture
05/06/10Configurable vector length computer processor
05/06/10Hierarchical shared semaphore registers
04/15/10System and verifying race-driven registers
01/21/10Multiple overlapping block transfers
11/26/09Multiprocessor node control tree
10/29/09Method and switched electrostatic discharge protection
Patent Packs
09/24/09Lonely pulse compensation
07/09/09Method and tracking, reporting and correcting single-bit memory errors







ARCHIVE: New 2017 2016 2015 2014 2013 2012 2011 2010 2009



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