Real Time Touch



new TOP 200 Companies filing patents this week

new Companies with the Most Patent Filings (2010+)




Real Time Touch

Similar
Filing Names

Cypress Semiconductor Corporation
Cypress Semiconductor Corporation A Corporation Of The State Of Delaware

Cypress Semiconductor Corporation patents


Recent patent applications related to Cypress Semiconductor Corporation. Cypress Semiconductor Corporation is listed as an Agent/Assignee. Note: Cypress Semiconductor Corporation may have other listings under different names/spellings. We're not affiliated with Cypress Semiconductor Corporation, we're just tracking patents.

ARCHIVE: New 2018 2017 2016 2015 2014 2013 2012 2011 2010 2009 | Company Directory "C" | Cypress Semiconductor Corporation-related inventors


Complementary sonos integration into cmos flow

Methods of integrating complementary SONOS devices into a CMOS process flow are described. The method begins with depositing and patterning a first photoresist mask over a surface of a substrate to expose a N-SONOS region, and implanting a channel for a NSONOS device through a first pad oxide, followed by... Cypress Semiconductor Corporation

Psoc architecture

... Cypress Semiconductor Corporation

Context-based protection system

A context-based protection system uses tiered protection structures including master protection units, shared memory protection units, a peripheral protection units to provide security to bus transfer operations between central processing units (CPUs), memory array or portions of arrays, and peripherals.... Cypress Semiconductor Corporation

Non-finger object rejection for fingerprint sensors

A method for detecting a finger at a fingerprint sensor includes detecting a presence of an object at a fingerprint sensor and, in response to detecting the presence of the object, acquiring image data for the object based on signals from the fingerprint sensor. The method further includes, for each... Cypress Semiconductor Corporation

Anti-spoofing protection for fingerprint controllers

A method for detecting fingerprint spoof objects includes detecting a presence of the object at a fingerprint sensor and, in response to detecting the presence of the object, measuring a set of physical properties of the object based on one or more signals from a set of electrodes of the... Cypress Semiconductor Corporation

Re-enumeration of usb 3.0 compatible devices

A host device can download a firmware update to a peripheral device having previously enumerated with the host device. The host device can perform link training with the peripheral device in response to a re-enumeration indication received from the peripheral device. The link training can include switching a Link Training... Cypress Semiconductor Corporation

Fingerprint sensor pattern

An example system drives one or more transmit signals on first electrodes disposed in a first layer and propagating electrodes disposed in a second layer. The system measures a capacitance of sensors through a of second electrodes. Each second electrode crosses each first electrode to provide a plurality of discrete... Cypress Semiconductor Corporation

Detect and differentiate touches from different size conductive objects on a capacitive button

Apparatuses and methods of distinguishing between a finger and stylus proximate to a touch surface are described. One apparatus includes a first circuit to obtain capacitance measurements of sense elements when a conductive object is proximate to a touch surface. The apparatus also includes a second circuit coupled to the... Cypress Semiconductor Corporation

Varied silicon richness silicon nitride formation

A method to fabricate a non-planar memory device including forming a multi-layer silicon nitride structure substantially perpendicular to a top surface of the substrate. There may be multiple non-stoichiometric silicon nitride layers, each including a different or same silicon richness value from one another.... Cypress Semiconductor Corporation

Providing a baseline capacitance for a capacitance sensing channel

A capacitance-sensing circuit may include a channel input associated with measuring a capacitance of a unit cell of a capacitive sense array. The capacitance-sensing circuit may also include a capacitive hardware baseliner that is coupled to the channel input. The capacitive hardware baseliner includes a programmable baseline resistor, and a... Cypress Semiconductor Corporation

Bus sharing scheme

A programmable device, having an analog component coupled with an analog bus and a digital component coupled with a digital bus together with a set of 10 pads, each of which capable of being coupled to a bus line of one segment of the analog bus as well as to... Cypress Semiconductor Corporation

Integrated circuit including parametric analog elements

A design system is provided. In one embodiment the design system includes an input module to receive specification data for a designed circuit including a configurable integrated circuit (IC). The configurable IC includes a number of analog elements for which parameters can be set by the design system, and a... Cypress Semiconductor Corporation

Methods and devices for reading data from non-volatile memory cells

Disclosed is a method for responding to a single user read command of a complementary cell array including one or more complementary cell pairs, the method including: determining if a first group of cells out of a data word is in an erased state or in a programmed state, and... Cypress Semiconductor Corporation

High voltage architecture for non-volatile memory

A method of erasing, during an erase operation, a non-volatile memory (NVM) cell of a memory device is disclosed. The erasing includes applying a first HV signal (VPOS) to a common source line (CSL). The CSL is shared among NVM cells of a sector of NVM cells. The first HV... Cypress Semiconductor Corporation

Methods and devices for reducing program disturb in non-volatile memory cell arrays

A memory device that includes a pair of non-volatile memory cells, a first memory cell including a first memory gate and a first select gate, and a second memory cell including a second memory gate and a second select gate. The first and second memory cells share a source line,... Cypress Semiconductor Corporation

Configurable and power-optimized integrated gate-driver for usb power-delivery and type-c socs

Techniques for power Field Effect Transistor (power-FET) gate drivers are described herein. In an example embodiment, a USB-enabled system comprises a first and second power paths and an IC controller coupled to control the first and second power paths, where the first and second power paths are external to the... Cypress Semiconductor Corporation

Methods and sensors for multiphase scanning in the fingerprint and touch applications

Techniques for multi-phase scanning based on pseudo-random sequences in capacitive fingerprint applications are described herein. In an example embodiment, a method performed by a processing device comprises: receiving measurements that are representative of a portion of a finger on a capacitive fingerprint sensor array, where the measurements are obtained from... Cypress Semiconductor Corporation

Nonvolatile charge trap memory device having a deuterated layer in a multi-layer charge-trapping region

A memory is described. Generally, the memory includes a number of non-planar multigate transistors, each including a channel of semiconducting material overlying a surface of a substrate and electrically connecting a source and a drain, a tunnel dielectric layer overlying the channel on at least three sides thereof, and a... Cypress Semiconductor Corporation

Adjustable over-current detector circuit for universal serial bus (usb) devices

A current detector circuit includes a current sense amplifier, coupled to a sense resistor, to receive a pair of input voltages and to output a first indicator signal responsive to a sensed input voltage difference produced by a sensed current passing through the sense resistor. The current detector circuit includes... Cypress Semiconductor Corporation

Contact detection mode switching in a touchscreen device

A method is disclosed for determining detecting a conductive object and determining the type of object and the type of contact that object has with a touch sensitive surface, the method comprising measuring capacitance on a plurality of mutual capacitance sensors, each mutual capacitance sensor corresponding to a unit cell... Cypress Semiconductor Corporation

Ratio-metric self-capacitance-to-code convertor

A circuit, system, and method for converting self capacitance to a digital value may include a pair of charge transfer circuits, each including a deadband switch network, a sensor capacitor or modulation capacitor, and an integration capacitor may be coupled to a comparator to produce a bitstream representative of the... Cypress Semiconductor Corporation

Dynamically reconfigurable analog routing and multiplexing architecture on a system on a chip

An integrated circuit device may include a reconfigurable analog signal switching fabric comprising a plurality of global buses that are selectively connected to external pins by pin connection circuits in response to changeable analog routing data, and a plurality of local buses that are selectively connected to analog blocks and/or... Cypress Semiconductor Corporation

Systems and methods for downloading code and data into a secure non-volatile memory

An example secure embedded device includes a secure non-volatile memory coupled to a processor. The processor provides a scramble or cipher key and uses a scramble algorithm or a cipher algorithm to scramble or cipher information received from an external device into transformed information. The processor writes a least a... Cypress Semiconductor Corporation

Low-power touch button sensing system

A method for operating a sensing system includes receiving, from a processing device, control information for configuring a capacitance sensing circuit, configuring the capacitance sensing circuit with the control information in response to receiving the control information, and controlling power consumption of the processing device based on the control information... Cypress Semiconductor Corporation

Systems, methods, and memory cells with common source lines

Systems, methods, and apparatus are disclosed for implementing memory cells having common source lines. The methods may include receiving a first voltage at a first transistor. The first transistor may be coupled to a second transistor and included in a first memory cell. The methods include receiving a second voltage... Cypress Semiconductor Corporation

Integration of a memory transistor into high-k, metal gate cmos process flow

Memory cells including embedded SONOS based non-volatile memory (NVM) and MOS transistors and methods of forming the same are described. Generally, the method includes: forming a gate stack of a NVM transistor in a NVM region of a substrate including the NVM region and a plurality of MOS regions; and... Cypress Semiconductor Corporation

Type-c connector subsystem

A Universal Serial Bus (USB) Type-C connector subsystem is described herein. An integrated circuit (IC) chip device includes a Universal Serial Bus (USB) Type-C subsystem. The USB Type-C subsystem is to operate an Ra termination circuit that consumes no more than a first predetermined amount of current after the Ra... Cypress Semiconductor Corporation

Sensor array with edge pattern

A capacitive sensor array may include a first set of sensor electrodes and a second set of sensor electrodes. Each of the second set of sensor electrodes may intersect each of the first set of sensor electrodes to form a plurality of unit cells each corresponding to a pair of... Cypress Semiconductor Corporation

Single layer sensor pattern

A capacitive sensor array comprises large sensor electrodes and small sensor electrodes formed from a single layer of conductive material. Each sensor electrode of a first set of small sensor electrodes is electrically connected to a first pad. A first axis crosses two or more of the sensor electrodes of... Cypress Semiconductor Corporation

Fingerprint sensor-compatible overlay material

A fingerprint sensor-compatible overlay material which uses anisotropic conductive material to enable accurate imaging of a fingerprint through an overlay is disclosed. The anisotropic conductive material has increased conductivity in a direction orthogonal to the fingerprint sensor, increasing the capacitive coupling of the fingerprint to the sensor surface, allowing the... Cypress Semiconductor Corporation

10-transistor non-volatile static random-access memory using a single non-volatile memory element and operation thereof

A memory including an array of nvRAM cells and method of operating the same are provided. Each nvRAM cell includes a volatile charge storage circuit, and a non-volatile charge storage circuit including a solitary non-volatile memory (NVM) device, a first transistor coupled to the NVM device through which data is... Cypress Semiconductor Corporation

Multi-layer inter-gate dielectric structure and manufacturing thereof

A semiconductor device having a first gate stack on a substrate is disclosed. The first gate stack may include a first gate conductor over a first gate dielectric structure. A dielectric structure can be formed over the first gate stack and the substrate. The dielectric structure layer can include four... Cypress Semiconductor Corporation

Embedded sonos based memory cells

Memory devices and methods for forming the same are disclosed. In one embodiment, the device includes a non-volatile memory (NVM) transistor formed in a first region of a substrate, the NVM transistor comprising a channel and a gate stack on the substrate overlying the channel. The gate stack includes a... Cypress Semiconductor Corporation

Memory device with multi-layer channel and charge trapping layer

A 3-D/vertical non-volatile (NV) memory device such as 3-D NAND flash memory and fabrication method thereof, the NV memory device includes vertical openings disposed in a stack of alternating stack layers of first stack layers and second stack layers over a wafer, a multi-layer dielectric disposed over an inner sidewall... Cypress Semiconductor Corporation

Transceiver for communication and controlling communication

An example embodiment provides a transceiver for communication includes a timing determiner that detects a fall from high level to low level of a bus signal generated by pulse width modulation of a clock signal and input from a communication bus; a transmission data signal delay adjuster that determines a... Cypress Semiconductor Corporation

09/07/17 / #20170255297

Capacitive sensing button on chip

A method and apparatus include a plurality of sensor elements arranged within an integrated circuit package and a controller arranged within the integrated circuit package and coupled to the plurality of sensor elements. The controller is configured to apply a transmit signal to a first sensor element of the plurality... Cypress Semiconductor Corporation

08/31/17 / #20170249978

Systems, methods, and devices for parallel read and write operations

Disclosed herein are systems, methods, and devices for parallel read and write operations. Devices may include a first transmission device coupled to a local bit line and a global bit line associated with a memory unit of a memory array. The first transmission device may be configured to selectively couple... Cypress Semiconductor Corporation

08/31/17 / #20170250192

Non-volatile memory with silicided bit line contacts

An approach to use silicided bit line contacts that do not short to the underlying substrate in memory devices. The approach provides for silicide formation in the bit line contact area, using a process that benefits from being self-aligned to the oxide-nitride-oxide (ONO) nitride edges. A further benefit of the... Cypress Semiconductor Corporation

08/03/17 / #20170221768

Manufacturing of fet devices having lightly doped drain and source regions

Embodiments described herein generally relate to methods of manufacturing n-type lightly doped drains and p-type lightly doped drains. In one method, photoresist mask is used to etch a transistor, and the mask is left in place (i.e., reused) to protect other devices and poly while a high energy implantation is... Cypress Semiconductor Corporation

07/20/17 / #20170205453

Quasi-differential mutual capacitance measurement

A circuit, system, and method for converting mutual capacitance to a digital value is described. Charge packets are transferred from a mutual capacitance to a pair of integration capacitors during alternate charge and discharge cycles. The time required to bring the discharged integration capacitor to the same potential as the... Cypress Semiconductor Corporation

07/13/17 / #20170199840

Asynchronous transceiver for on-vehicle electronic device

An on-vehicle electronic device has a generating unit configured to generate a first clock for data communication with another on-vehicle electronic device through a CXPI communication network; and an adjusting unit configured to adjust a duty width of the first clock.... Cypress Semiconductor Corporation

07/13/17 / #20170201266

Configurable capacitor arrays and switched capacitor circuits

Methods and apparatus include and amplifier circuit and a first capacitor branch including a first plurality of capacitors. The first capacitor branch couples to an input signal and to an input of the amplifier circuit. A second capacitor branch includes a second plurality of capacitors. The second capacitor branch couples... Cypress Semiconductor Corporation

07/06/17 / #20170194343

Split gate charge trapping memory cells having different select gate and memory gate heights

A semiconductor device that has a split gate charge trapping memory cell having select and memory gates of different heights is presented herein. In an embodiment, the semiconductor device also has a low voltage transistor and a high voltage transistor. In one embodiment, the gates of the transistors are the... Cypress Semiconductor Corporation

07/06/17 / #20170194963

Programmable input/output circuit

A apparatus, having a processing system and an input buffer coupled with both the processing system and one of two IO pads, and a reference buffer coupled to both the input buffer and the second of the IO pads such that the reference generator controls the input threshold of the... Cypress Semiconductor Corporation

06/29/17 / #20170185558

Microcontroller programmable system on a chip

Embodiments of the present invention are directed to a microcontroller device having a microprocessor, programmable memory components, and programmable analog and digital blocks. The programmable analog and digital blocks are configurable based on programming information stored in the memory components. Programmable interconnect logic, also programmable from the memory components, is... Cypress Semiconductor Corporation

06/29/17 / #20170186883

Memory transistor with multiple charge storing layers and a high work function gate electrode

Semiconductor devices including non-volatile memory transistors and methods of fabricating the same to improve performance thereof are provided. In one embodiment, the memory transistor comprises an oxide-nitride-oxide (ONO) stack on a surface of a semiconductor substrate, and a high work function gate electrode formed over a surface of the ONO... Cypress Semiconductor Corporation

06/22/17 / #20170177536

Microcontroller programmable system on a chip

Embodiments of the present invention are directed to a microcontroller device having a microprocessor, programmable memory components, and programmable analog and digital blocks. The programmable analog and digital blocks are configurable based on programming information stored in the memory components. Programmable interconnect logic, also programmable from the memory components, is... Cypress Semiconductor Corporation

06/22/17 / #20170177920

Capacitive fingerprint sensor with quadrature demodulator and multiphase scanning

A fingerprint sensing circuit, system, and method is disclosed. The fingerprint sensor maybe include a plurality of inputs coupled to a plurality of fingerprint sensing electrodes and to an analog front end. The analog front end may be configured to generate at least one digital value in response to a... Cypress Semiconductor Corporation

06/15/17 / #20170169888

Asymmetric pass field-effect transistor for nonvolatile memory

A method of performing an operation on a non-volatile memory (NVM) cell of a memory device is disclosed. The pass transistor of the NVM cell is an asymmetric transistor including a source with a halo implant. The source of the pass transistor is coupled to a common source line (CSL)... Cypress Semiconductor Corporation

06/15/17 / #20170170187

Gate fringing effect based channel formation for semiconductor device

A memory device is described. Generally, the device includes a string of memory transistors, a source select transistor coupled to a first end of the string of memory transistor and a drain select transistor coupled to a second end of the string of memory transistor. Each memory transistor includes a... Cypress Semiconductor Corporation

06/08/17 / #20170162249

Method for fabricating ferroelectric random-access memory on pre-patterned bottom electrode and oxidation barrier

Structure and method of fabrication of F-RAM cells are described. The F-RAM cell include ferroelectric capacitors forming over and with a pre-patterned barrier structure which has a planarized/chemically and/or mechanically polished top surface. The pre-patterned barrier structure includes multiple oxygen barriers having a structure of a bottom electrode layer over... Cypress Semiconductor Corporation

06/08/17 / #20170162586

Split-gate semiconductor device with l-shaped gate

A semiconductor device having a substrate, a dielectric layer over the substrate, a first gate conductor, an inter-gate dielectric structure and a second gate conductor is disclosed. A gate dielectric structure is disposed between the first gate conductor and the dielectric layer, and may include two or more dielectric films... Cypress Semiconductor Corporation

05/25/17 / #20170147854

Sensor-compatible overlay

A sensor-compatible overlay is disclosed which uses anisotropic conductive material to increase capacitive coupling of a conductive object through the overlay material to a capacitive sensor. The anisotropic conductive material has increased conductivity in a direction orthogonal to the capacitive sensor. In one embodiment, the overlay is configured to enclose... Cypress Semiconductor Corporation

05/18/17 / #20170140196

Fingerprint sensor-compatible overlay material

A fingerprint sensor-compatible overlay material which uses anisotropic conductive material to enable accurate imaging of a fingerprint through an overlay is disclosed. The anisotropic conductive material has increased conductivity in a direction orthogonal to the fingerprint sensor, increasing the capacitive coupling of the fingerprint to the sensor surface, allowing the... Cypress Semiconductor Corporation

05/18/17 / #20170141201

Memory first process flow and device

A semiconductor device and method of making the same are disclosed. The semiconductor device includes a memory gate on a charge storage structure formed on a substrate, a select gate on a gate dielectric on the substrate proximal to the memory gate, and a dielectric structure between the memory gate... Cypress Semiconductor Corporation

05/18/17 / #20170141787

Delta modulator receive channel for capacitance measurement circuits

A circuit, system, and method for measuring capacitance are described. A current may be received at an input of a conversion circuit. The current may be converted to a voltage signal which may be used to create a negative feedback current to the input of the conversion circuit and which... Cypress Semiconductor Corporation

04/13/17 / #20170103240

Integrated circuit to convert no-wire signals to one-wire signals

A radio frequency identification (RFID) integrated circuit includes a transceiver and a processing device. The transceiver may to transmit a first continuous wave radio frequency (RF) signal to a bridge in a no-wire format via an antenna, where the transceiver is to start transmitting the modulated or continuous wave RF... Cypress Semiconductor Corporation

04/06/17 / #20170098468

Low standby power with fast turn on for non-volatile memory devices

Systems and methods for driving a non-volatile memory device in a standby operating condition are disclosed. A standby detection circuit detects whether the non-volatile memory system is in a standby condition. In response to determining that the non-volatile memory system is in a standby condition, a bias control circuit provides... Cypress Semiconductor Corporation

04/06/17 / #20170098933

Protecting circuit and integrated circuit

A protecting circuit includes: a discharge switch configured to connect to a first terminal and a second terminal; a trigger circuit comprising load devices configured to be connected in series between the first terminal and the second terminal, each of the load devices being configured to consume power; and a... Cypress Semiconductor Corporation

03/30/17 / #20170090626

Technique for increasing the sensitivity of capacitive sense arrays

A technique for operating a capacitive sensor array is described. The technique includes measuring a first capacitance of a first set of electrodes at a first time, measuring a second capacitance of a second set of electrodes at a second time, and calculating a position of a conductive object based... Cypress Semiconductor Corporation

03/30/17 / #20170090781

Method for providing read data flow control or error reporting using a read data strobe

Disclosed herein are system, apparatus, methods and/or combinations and sub-combinations thereof, for using a read data strobe signal received at a host device from a peripheral device to convey variable latency (flow) control or report an error in the data content read from the peripheral device. Reception of the read... Cypress Semiconductor Corporation

03/30/17 / #20170092367

Asymmetric pass field-effect transistor for non-volatile memory

A method of performing an operation on a non-volatile memory (NVM) cell of a memory device is disclosed. The pass transistor of the NVM cell is an asymmetric transistor including a source with a halo implant. The source of the pass transistor is coupled to a common source line (CSL)... Cypress Semiconductor Corporation

03/30/17 / #20170092577

Memory device interconnects and manufacture

A method of fabricating an integrated circuit memory device including forming a first and second inter-level dielectric layer, an anti-reflective coating layer, and a plurality of electrical connections is disclosed.... Cypress Semiconductor Corporation

03/30/17 / #20170092606

Semiconductor device and manufacturing the same

A semiconductor device includes a semiconductor chip, a bump contact, and encapsulating layer, an insulating layer and a connection terminal.... Cypress Semiconductor Corporation

Patent Packs
03/30/17 / #20170092729

Method of manufacturing for memory transistor with multiple charge storing layers and a high work function gate electrode

A semiconductor devices including non-volatile memories and methods of fabricating the same to improve performance thereof are provided. Generally, the device includes a memory transistor comprising a polysilicon channel region electrically connecting a source region and a drain region formed in a substrate, an oxide-nitride-nitride-oxide (ONNO) stack disposed above the... Cypress Semiconductor Corporation

03/30/17 / #20170092781

Nonvolatile charge trap memory device having a high dielectric constant blocking region

An embodiment of a nonvolatile charge trap memory device is described. In one embodiment, the device comprises a channel comprising silicon overlying a surface on a substrate electrically connecting a first diffusion region and a second diffusion region of the memory device, and a gate stack intersecting and overlying at... Cypress Semiconductor Corporation

03/30/17 / #20170093385

Valley detection circuit and drive circuit

A technique for detecting a valley timing at lower cost is described. A drive circuit comprises a peak voltage holder, a valley voltage holder, a center voltage generator, a monitor, and a detector. The peak voltage holder holds a peak voltage of an oscillating signal that is based on a... Cypress Semiconductor Corporation

03/23/17 / #20170081940

Wellbore packer, method and tubing string

A wellbore packer for setting one or more packing elements in a borehole having an open hole section. The wellbore packer comprises a port-less mandrel configured with one or more packing elements and one or more setting mechanisms. The setting mechanism is responsive to a driving force and configured to... Cypress Semiconductor Corporation

03/23/17 / #20170084465

Method of fabricating a charge-trapping gate stack using a cmos process flow

A method of fabricating a memory device is described. Generally, the method includes forming a channel from a semiconducting material overlying a surface of a substrate, and forming dielectric stack on the channel. A first cap layer is formed over the dielectric stack, and a second cap layer including a... Cypress Semiconductor Corporation

03/23/17 / #20170085268

Integrated circuit device with programmable analog subsystem

An integrated circuit (IC) device can include a plurality of analog blocks, including at least one fixed function analog circuit, a plurality of reconfigurable analog circuit blocks, at least one analog routing block reconfigurable to provide signal paths between any of the analog blocks; and a digital section comprising digital... Cypress Semiconductor Corporation

03/16/17 / #20170076130

Fingerprint sensor pattern

An example sensor array includes a first electrode disposed in a first layer, multiple second electrodes disposed in a second layer, and multiple third electrodes disposed outside of the first layer. The second electrodes are galvanically isolated from the first electrode and the third electrodes. In a plan view of... Cypress Semiconductor Corporation

03/16/17 / #20170076766

Systems, methods, and devices for parallel read and write operations

Disclosed herein are systems, methods, and devices for parallel read and write operations. Devices may include a first transmission device coupled to a local bit line and a global bit line associated with a memory unit of a memory array. The first transmission device may be configured to selectively couple... Cypress Semiconductor Corporation

03/09/17 / #20170068835

Half-bridge fingeprint sensing method

Fingerprint detection circuits with common mode noise rejection are described. The Fingerprint detection circuit includes a half-bridge circuit coupled to a receive (RX) electrode of an array of fingerprint detection electrodes and to a buried capacitance that is unalterable by the presence of a conductive object on the array. The... Cypress Semiconductor Corporation

03/09/17 / #20170068838

Multiphase fingerprint sensor layout and construction

A capacitive fingerprint sensor includes a set of capacitive sensor electrodes in a sensing area. The set of capacitive sensor electrodes includes a set of transmit (Tx) sensor electrodes, a set of receive (Rx) sensor electrodes, and a set of compensation electrodes. The fingerprint sensor also includes a multiphase capacitance... Cypress Semiconductor Corporation

03/02/17 / #20170060297

Differential sigma-delta capacitance sensing devices and methods

A capacitance sensing device can include a reference circuit configured to connect to a reference capacitance, and to generate an electrical reference signal that varies over time according to the reference capacitance and a compare signal; a sense circuit configured to connect to a sense capacitance, and to generate an... Cypress Semiconductor Corporation

03/02/17 / #20170061188

Baseline compensation for capacitive sensing

A capacitance sensing circuit may include a charge to digital converter, coupled to a signal receiver channel, to receive a signal from a capacitive sense array. The capacitance sensing circuit may also include a baseline compensation signal generator, coupled to the signal receiver channel, to provide a baseline compensation signal... Cypress Semiconductor Corporation

03/02/17 / #20170062456

Vertical division of three-dimensional memory device

A method of forming a vertical non-volatile (NV) memory device such as 3-D NAND flash memory includes forming a vertical NV memory cell string within an opening disposed in a stack of alternating layers of a first layer and a second layer over a substrate, and dividing the vertical NV... Cypress Semiconductor Corporation

02/23/17 / #20170052578

Low-power type-c receiver with high idle noise and dc-level rejection

Techniques for low-power USB Type-C receivers with high DC-level shift tolerance and high noise rejection are described herein. In an example embodiment, a USB-enabled device comprises a receiver circuit coupled to a Configuration Channel (CC) line of a USB Type-C subsystem. The receiver circuit is configured to receive data from... Cypress Semiconductor Corporation

02/23/17 / #20170053703

High voltage architecture for non-volatile memory

A method of erasing, during an erase operation, a non-volatile memory (NVM) cell of a memory device is disclosed. The erasing includes applying a first HV signal (VPOS) to a common source line (CSL). The CSL is shared among NVM cells of a sector of NVM cells. The first HV... Cypress Semiconductor Corporation

Patent Packs
02/16/17 / #20170047272

Tape chip on lead using paste die attach material

According to various embodiments, systems and methods for packaging a semiconductor device are provided. The disclosure discusses a semiconductor die having a top side and a bottom side that is disposed on a lead frame. An adhesive paste is then applied to attach the semiconductor die to the lead frame... Cypress Semiconductor Corporation

01/26/17 / #20170023995

Low-power touch button sensing system

A capacitance sensing circuit receives an application of a power supply. The capacitance sensing circuit controls a switch circuit to connect the power supply to a processing device responsive to the application of the power supply. The capacitance sensing circuit receives, via a control interface and from the processing device,... Cypress Semiconductor Corporation

01/19/17 / #20170017347

Touch sensor pattern

An electronic system includes a processing device and a trellis pattern of conductors coupled to the processing device. The trellis pattern of conductors forms a multiple capacitors and the processing device is configured to sense a capacitance of each of the capacitors. A host is coupled to the processing device.... Cypress Semiconductor Corporation

01/19/17 / #20170017496

Methods and physical computer-readable storage media for intiating re-enumeration of usb 3.0 compatible devices

Described herein is a system comprising a peripheral device that is connected to a host device over a bus compatible with USB 3.0. The host device comprises a reduced functionality USB host controller configured to perform a set of one or more preprogrammed functions from the USB 3.0 specification, and... Cypress Semiconductor Corporation

01/19/17 / #20170018555

Nand memory cell string having a stacked select gate structure and process for for forming same

A memory string is disclosed including a plurality of core cells serially connected between a source select gate and a drain select gate along a channel. Each core cell includes a wordline separated from the channel by a stack of layers including a charge trapping layer. At least one of... Cypress Semiconductor Corporation

01/19/17 / #20170018621

Spacer formation with straight sidewall

Disclosed herein is a semiconductor device comprising a first dielectric disposed over a channel region of a transistor formed in a substrate and a gate disposed over the first dielectric. The semiconductor device further includes a second dielectric disposed vertically, substantially perpendicular to the substrate, at an edge of the... Cypress Semiconductor Corporation

01/12/17 / #20170011786

Memory interface configurable for asynchronous and synchronous operation and for accessing storage from any clock domain

A system comprising a memory controller coupled to a memory device is described. The memory device is coupled to, and is external to, the memory controller. The memory device includes a storage array having dual configurability to support both synchronous and asynchronous modes of operation.... Cypress Semiconductor Corporation

01/12/17 / #20170011800

Systems, methods, and memory cells with common source lines

Systems, methods, and apparatus are disclosed for implementing memory cells having common source lines. The methods may include receiving a first voltage at a first transistor. The first transistor may be coupled to a second transistor and included in a first memory cell. The methods include receiving a second voltage... Cypress Semiconductor Corporation

01/12/17 / #20170011807

Method to reduce program disturbs in non-volatile memory cells

A non-volatile memory and methods of operating the same to reduce disturbs is provided. In one embodiment, the method includes coupling a first positive high voltage to a first global wordline in a first row of an array of memory cells, and coupling a second negative high voltage (VNEG) to... Cypress Semiconductor Corporation

01/05/17 / #20170005108

Oxide formation in a plasma process

A method of making and structural embodiments of a semiconductor structure are provided. The method includes forming a tunneling layer over a channel connecting a source and a drain formed in a surface of a substrate, forming a charge storage layer overlying the tunneling layer, and forming a blocking structure... Cypress Semiconductor Corporation








ARCHIVE: New 2018 2017 2016 2015 2014 2013 2012 2011 2010 2009



###

This listing is an abstract for educational and research purposes is only meant as a recent sample of applications filed, not a comprehensive history. Freshpatents.com is not affiliated or associated with Cypress Semiconductor Corporation in any way and there may be associated servicemarks. This data is also published to the public by the USPTO and available for free on their website. Note that there may be alternative spellings for Cypress Semiconductor Corporation with additional patents listed. Browse our Agent directory for other possible listings. Page by FreshPatents.com

###