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Freescale Semiconductor Inc
Freescale Semiconductor Inc A Corporation
Freescale Semiconductor Inc formerly Known As Sigmatel Inc
Freescale Semiconductor Inc Austin Texas
Freescale Semiconductor Inc_20100107
Freescale Semiconductor Inc_20100114
Freescale Semiconductor Inc_20131212
Freescale Semiconductor Inc_20100128
Freescale Semiconductor Inc_20100121

Freescale Semiconductor Inc patents

Recent patent applications related to Freescale Semiconductor Inc. Freescale Semiconductor Inc is listed as an Agent/Assignee. Note: Freescale Semiconductor Inc may have other listings under different names/spellings. We're not affiliated with Freescale Semiconductor Inc, we're just tracking patents.

ARCHIVE: New 2018 2017 2016 2015 2014 2013 2012 2011 2010 2009 | Company Directory "F" | Freescale Semiconductor Inc-related inventors

Calibrating inertial navigation data using tire pressure monitoring system signals

A system includes a tire pressure monitoring system (TPMS) module coupled with a wheel on a vehicle and a vehicle navigation system of the vehicle. A method entails determining a movement signal at the TPMS module and receiving the movement signal at the vehicle navigation system. The vehicle navigation system... Freescale Semiconductor Inc

Distributed reservation based coherency protocol

A method of operating a cache-coherent computing system includes storing first state information corresponding to a first reservation for a first exclusive access to a first memory address requested by a first thread executing on a first processor of a first plurality of processors. The method includes transmitting an output... Freescale Semiconductor Inc

Operation amplifiers with offset cancellation

A semiconductor device includes an operational transconductance amplifier (OTA) with a matched pair of transistors including a first transistor and a second transistor, and configuration units that include a first set of switches, a second set of switches, and an input transistor. Gain adjustment circuitry is coupled to adjust gain... Freescale Semiconductor Inc

Method for link adaptation and power amplifier voltage control and system therefor

A method includes determining a quality indicator designating a quality of packet reception at a wireless local area network transceiver. A Modulation and Coding Scheme (MCS) index value is selected based on the quality indicator. A supply voltage provided to a radio frequency power amplifier is determined based on the... Freescale Semiconductor Inc

Air cavity packages and methods for the production thereof

Air cavity packages and methods for producing air cavity packages containing sintered bonded components, multipart window frames, and/or other unique structural features are disclosed. In one embodiment, a method for fabricating an air cavity package includes the step or process of forming a first metal particle-containing precursor layer between a... Freescale Semiconductor Inc

Configuration of default voltage level for dual-voltage input/output pad cell via voltage rail ramp up timing

An integrated circuit (IC) package of an electronic device includes a first input coupled to a first voltage rail and a second input coupled to a second voltage rail. The IC package further includes a set of one or more input/output (IO) pad cells and a power sequence detector coupled... Freescale Semiconductor Inc

System and adjusting boot interface frequency

A system-on-chip includes a processing core and a memory controller connected between the core and an external memory. A clock divider receives an internal clock signal and outputs a divided clock signal. The memory controller uses the divided clock signal to establish an interface communication frequency with the memory. A... Freescale Semiconductor Inc

Integrated circuit with protection from transient electrical stress events and method therefor

An integrated circuit with protection against transient electrical stress events includes a trigger circuit having a first detection circuit coupled to a first supply voltage, a second detection circuit coupled to a second supply voltage, and a rail clamp device. During a first type of electrical stress event, the rail... Freescale Semiconductor Inc

Integrated circuit with protection from transient electrical stress events and method therefor

An integrated circuit for protecting against transient electrical stress events includes a rail clamp device, and a trigger circuit including a resistive-capacitive (RC) filter, a drive circuit including a first inverter stage receiving an input signal from the RC filter, the drive circuit is configured to enable the rail clamp... Freescale Semiconductor Inc

Circuit and testing flip flop state retention

An integrated circuit includes a plurality of state retention power gating (SRPG) flip-flops coupled in a first chain, wherein the first chain has a first scan input and a first scan output; a pseudo random pattern generator (PRPG) configured to generate test patterns in response to seeds; a multiplexer (MUX)... Freescale Semiconductor Inc

Reference voltage generator

A reference voltage generator includes first through sixth transistors and an operational amplifier. The first and second transistors provide first and second voltages to the operational amplifier, respectively. The operational amplifier generates a control voltage at its output terminal, which then is provided to the gate terminals of the second... Freescale Semiconductor Inc

Systems and methods for dynamically assigning domain identifiers for access control

A master domain assignment controller includes a first plurality of registers corresponding to a first processor including a first register corresponding to a first set of process identifiers (PIDs) and a second register corresponding to a second set of PIDs, and comparison circuitry. The comparison circuitry is coupled to receive... Freescale Semiconductor Inc

Multiple interconnections between die

Embodiments of a semiconductor packaged device and method of making thereof are provided, the device including a substrate; a first flip chip die mounted to a first major surface of the substrate; a second flip chip die mounted to the first major surface of the substrate, the second flip chip... Freescale Semiconductor Inc

System, test chamber, and response time measurement of a pressure sensor

A test chamber is used within a system for testing microelectromechanical systems (MEMS) pressure sensors. The system includes a processor, two air tanks pressurized to different air pressures, a high speed switch mechanism, and the test chamber. The test chamber houses a MEMS pressure sensor to be tested, a control... Freescale Semiconductor Inc

Methods and sensor devices for sensing fluid properties

An ion sensor for sensing ions in a fluid includes a Metal-Oxide Semiconductor (MOS) varactor formed in and on a semiconductor substrate having a gate dielectric over the semiconductor substrate, a gate over the gate dielectric, a well region in the substrate under the gate dielectric, and source/drain regions in... Freescale Semiconductor Inc

Scan circuitry with iddq verification

An integrated circuitry includes a first logic block coupled between a first power supply terminal and a second power supply terminal. The first logic block includes a first scan chain and a configurable defect coupled to a scan output node of the first scan chain. The configurable defect has a... Freescale Semiconductor Inc

Aluminum nitride protection of silver apparatus, system and method

A semiconductor apparatus including a wafer base with a top side and a bottom side, a silver base with a top side and a bottom side, wherein the bottom side of the silver base is attached to the top side of the wafer base and wherein the silver base provides... Freescale Semiconductor Inc

Multiprocessing system with peripheral power consumption control

An integrated circuit device includes a peripheral control circuit configured to receive a low power intent signal from a first processor, and a first control register in the peripheral control circuit. The first control register includes a peripheral enable indicator for each processor that can use a first peripheral. Acknowledgement... Freescale Semiconductor Inc

Integrated circuits and methods for dynamic allocation of one-time programmable memory

An integrated circuit includes a one-time programmable (OTP) memory having a plurality of pages and address translation circuitry. A first line of each page is configured to store error policy bits. When a first bit of the first line has a first value, the page is configured to store data... Freescale Semiconductor Inc

Active tamper detection circuit with bypass detection and method therefor

An active tamper detection circuit with bypass detection is provided. A bypass detection circuit is coupled to an active mesh loop. The bypass detector includes a voltage comparator with a variable hysteresis control circuit and a calibration engine. The bypass detector detects a change in impedance in the mesh when... Freescale Semiconductor Inc

Power amplifier system with integrated antenna

A system with an integrated antenna includes a housing having a first surface and a second surface. The second surface of the housing defines a recess. A substrate is attached to first surface of the housing, and an amplifying device having an output node is on the substrate. An antenna... Freescale Semiconductor Inc

Methods and systems for electrically calibrating transducers

Devices, systems and methods are provided for calibrating a transducer. One exemplary method involves determining a transfer function for the transducer based on a measured response of the transducer to an applied electrical signal, determining a set of values for a plurality of response parameters associated with the transducer based... Freescale Semiconductor Inc

Soft error detection in a memory system

An integrated circuit (IC) device including a first memory device, a second memory device stacked with the first memory device, and one or more memory controllers configured to detect a first error in data stored in the first memory device at a first physical location in the IC device, and... Freescale Semiconductor Inc

System and characterizing critical parameters resulting from a semiconductor device fabrication process

A system includes three related structures. A first structure includes a first finger interposed between a first pair of sidewalls. The first finger has a first length and a first width, and is separated from each of the sidewalls by a first gap having a first spacing. A second structure... Freescale Semiconductor Inc

Stackable molded packages and methods of manufacture thereof

A stackable package assembly and method of manufacturing is provided. The method includes attaching a plurality of interconnect balls to a first surface of a substrate, and encapsulating the first surface of the substrate and the plurality of interconnect balls with an encapsulant. A trench is formed in a first... Freescale Semiconductor Inc

Method for performing data transaction and memory device therefor

A system for performing a data transaction between a memory and a master via a bus based on a strobe signal. The memory includes at least one memory bank having first and second cuts. The data transaction is either a read transaction or a write transaction. The system includes an... Freescale Semiconductor Inc

Switching power converter

Aspects of various embodiments of the present disclosure are directed to applications utilizing voltage regulation. In certain embodiments, an oscillator circuit is configured to generate an oscillating signal having a frequency specified by a frequency control signal. A switching power converter is configured to regulate a voltage at an output... Freescale Semiconductor Inc

Distributed baseboard management controller for multiple devices on server boards

A server board includes first and second devices. A first service processor of the first device operates as a master baseboard management controller of the server board, and monitors a communication channel for alive messages from a plurality service processors. A second service processor operates as a secondary baseboard management... Freescale Semiconductor Inc

Communication system for transmitting and receiving control frames

A communication system for communicating control data between a processor and an interface includes configuration registers, a packet processor, an interrupt processor, a timing monitor, a configuration sampler, a control-frame processor, a mode selector, and a transceiver. The processor, timing monitor, and configuration sampler generate control data, a timing signal... Freescale Semiconductor Inc

Sintered multilayer heat sinks for microelectronic packages and methods for the production thereof

Methods for producing multilayer heat sinks utilizing low temperature sintering processes are provided. In one embodiment, the method includes forming a metal particle-containing precursor layer over a first principal surface of a first metal layer. The first metal layer and the metal particle-containing layer are then arranged in a stacked... Freescale Semiconductor Inc

Adaptable sense circuitry and read-only memory

Apparatus and methods for operating a read-only memory (ROM) are disclosed. The method for operating the ROM includes sensing a dummy bit line with a dummy sense amplifier coupled to the dummy bit line to generate a keeper adjust signal. Based on the keeper adjust signal, a keeper strength of... Freescale Semiconductor Inc

Heterogeneous multi-processor device and enabling coherent data access within a heterogeneous multi-processor device

A heterogeneous multi-processor device having a first processor component arranged to issue a data access command request, a second processor component arranged to execute a set of threads, a task scheduling component arranged to schedule the execution of threads by the second processor component, and an internal memory component. In... Freescale Semiconductor Inc

Breach detection in integrated circuits

An apparatus embodiment includes an integrated circuit (IC) and breach-detection circuitry. The IC includes data storage circuitry, a power grid configured to distribute power to the data storage circuitry, and a plurality of nodes distributed over at least one sensitive region of the IC. The breach-detection circuitry monitors power grid... Freescale Semiconductor Inc

Memory controller for performing write transaction

A memory controller receives first and second write transactions from a processor and stores write data in a memory. The memory controller includes an address comparison circuit, a buffer, a level control circuit, a command generator, and a control circuit. The address comparison circuit compares second and third addresses and... Freescale Semiconductor Inc

01/18/18 / #20180019020

Sample-and-hold circuit

A sample-and-hold circuit, which includes a hold capacitor at its output terminal and at least one intermediate capacitor, intermittently receives an input voltage, and a first value of a switch enable signal causes the sample-and-hold circuit to sample the input voltage and to charge the at least one intermediate capacitor... Freescale Semiconductor Inc

01/18/18 / #20180019735

Systems and methods for non-volatile flip flops

A non-volatile flip flop integrated circuit includes a master latch circuit, a slave latch circuit coupled to the master latch circuit, and a non-volatile memory array coupled to the slave latch circuit. The non-volatile memory array includes a first pair of memory cells coupled to the slave latch circuit, and... Freescale Semiconductor Inc

01/18/18 / #20180020468

Scheduler for layer mapped code words

An eNode-B includes PUSH mapping hardware for improved performance. A scheduler schedules first and second code words of first and second respective user devices. A buffer receives and stores first and second identifiers. A de-multiplexer outputs a first code word number based on the first identifier and a second code... Freescale Semiconductor Inc

01/11/18 / #20180010913

Vibration and shock robust gyroscope

A MEMS device includes a movable mass having a central region overlying a sense electrode and an opening in which a suspension structure and spring system are located. The suspension structure includes an anchor coupled to a substrate and rigid links extending from opposing sides of the anchor. The spring... Freescale Semiconductor Inc

01/11/18 / #20180011735

Instruction pre-fetching

Pre-fetching instructions for tasks of an operating system (OS) is provided by calling a task scheduler that determines a load start time for a set of instructions for a particular task corresponding to a task switch condition. The OS calls, and in response to the load start time, a loader... Freescale Semiconductor Inc

01/11/18 / #20180011736

Hardware controlled instruction pre-fetching

A task control circuit maintains, in response to task event information, a task information queue that includes task information for a plurality of tasks. Based upon the task information in the task information queue, a future task switch condition is identified as corresponding to a task switch time for a... Freescale Semiconductor Inc

01/04/18 / #20180004692

Direct memory access (dma) unit with address alignment

Systems and methods for operating a DMA unit with address alignment are disclosed. These may include configuring a bandwidth control setting for a read job that includes a data transfer size corresponding to a first number of bytes. A second number of bytes to reach a read address alignment is... Freescale Semiconductor Inc

01/04/18 / #20180005925

Packaged semiconductor device having a lead frame and inner and outer leads and forming

A method of making a packaged integrated circuit device includes forming a lead frame with leads that have an inner portion and an outer portion, the inner portion of the lead is between a periphery of a die pad and extends to one end of openings around the die pad.... Freescale Semiconductor Inc

01/04/18 / #20180005957

Shielded package with integrated antenna

A semiconductor structure includes a packaged semiconductor device having at least one device, a conductive pillar, an encapsulant over the at least one device and surrounding the conductive pillar, wherein the conductive pillar extends from a first major surface to a second major surface of the encapsulant, and is exposed... Freescale Semiconductor Inc

01/04/18 / #20180007745

Solid state microwave heating apparatus with stacked dielectric resonator antenna array, and methods of operation and manufacture

An embodiment of a microwave heating apparatus includes a solid state microwave energy source, a first dielectric resonator antenna that includes a first exciter dielectric resonator and a first feed structure in proximity to the first exciter dielectric resonator, one or more additional dielectric resonators stacked above the top surface... Freescale Semiconductor Inc

01/04/18 / #20180007746

Solid state microwave heating apparatus with dielectric resonator antenna array, and methods of operation and manufacture

An embodiment of a microwave heating apparatus includes a solid state microwave energy source, a chamber, a dielectric resonator antenna with an exciter dielectric resonator and a feed structure, and one or more additional dielectric resonators each positioned within a distance of the exciter resonator to form a dielectric resonator... Freescale Semiconductor Inc

12/28/17 / #20170370799

Controlled pulse generation methods and apparatuses for evaluating stiction in microelectromechanical systems devices

Methods and apparatuses are provided for evaluating or testing stiction in Microelectromechanical Systems (MEMS) devices utilizing a mechanized shock pulse generation approach. In one embodiment, the method includes the step or process of loading a MEMS device, such as a multi-axis MEMS accelerometer, into a socket provided on a Device-Under-Test... Freescale Semiconductor Inc

12/28/17 / #20170373053

Esd protection structure

An ESD protection structure formed within a semiconductor substrate of an integrated circuit device. The ESD protection structure comprises a thyristor structure being formed from a first P-doped section forming an anode of the thyristor structure, a first N-doped section forming a collector node of the thyristor structure, a second... Freescale Semiconductor Inc

12/21/17 / #20170366221

Clear channel assessment

Circuits and methods concerning signal detection are disclosed. In some example embodiments, an apparatus is configured to detect presence of a spreading sequence in a sample data sequence. Phase differences between samples in a sample sequence are determined. Presence of a spreading sequence in the sample sequence is detected by... Freescale Semiconductor Inc

12/21/17 / #20170366296

Communication link adjustments in wireless networks based upon composite lqi measurements

Methods and systems are disclosed to adjust communication links within wireless networks based upon composite link quality indicators (LQIs). Packet communications are received by a network node through a communication link from a separate network node within a wireless network. The network node can also be configured to transmit packet... Freescale Semiconductor Inc

12/14/17 / #20170356937

Conversion rate control for analog to digital conversion

A method, apparatus, and energy metering system obtains mains samples of a mains power line signal, performs non-white noise (NWN) filtering of the mains power line signal, obtains adjustable clock source samples of an adjustable clock signal of an adjustable clock oscillator, determines a difference based on the mains samples... Freescale Semiconductor Inc

12/14/17 / #20170356955

Kernel based cluster fault analysis

A fault analysis method comprises: receiving fault data from wafer level testing that identifies locations and test results of a plurality of die; applying a kernel transform to the fault data to produce cluster data, where the kernel transform defines a fault impact distribution that defines fault contribution from the... Freescale Semiconductor Inc

12/14/17 / #20170357455

Mass storage system and storing mass data

A mass storage system for storing mass data generated by a mass data source. The system includes a data buffer coupled to the mass data source, and a file system and command generator. The data buffer caches the mass data. The file system and command generator generates file system data... Freescale Semiconductor Inc

12/14/17 / #20170358537

Method of wafer dicing for backside metallization

Method embodiments of wafer dicing for backside metallization are provided. One method includes: applying dicing tape to a front side of a semiconductor wafer, wherein the front side of the semiconductor wafer includes active circuitry; cutting a back side of the semiconductor wafer, the back side opposite the front side,... Freescale Semiconductor Inc

12/14/17 / #20170359108

Method and performing distributed computation of precoding estimates

A method and apparatus for performing distributed computation of precoding estimates within a DAS. An RRH comprises a receiver component arranged to receive uplink signals from active user devices. The RRH further comprises a processing component arranged to perform channel estimation for each active user device m, based on the... Freescale Semiconductor Inc

12/14/17 / #20170359892

Shielded and packaged electronic devices, electronic assemblies, and methods

Shielded and packaged electronic devices, electronic assemblies, and methods are disclosed herein. The shielded and packaged electronic devices include a packaged electronic device with a package surface and a plurality of electrically conductive package pads arranged on the package surface, a shielding dielectric layer extending in contact with the package... Freescale Semiconductor Inc

12/07/17 / #20170350701

Mems gyroscope device

A microelectromechanical system (MEMS) gyroscope device includes a substrate having a surface parallel to a plane; first and second proof masses driven to slide back and forth past one another in a first directional axis of the plane, where the first and second proof masses respectively have a first and... Freescale Semiconductor Inc

12/07/17 / #20170351577

Method and managing mismatches within a multi-threaded lockstep processing system

A processing system comprising a first processing domain and a second processing domain. Each of the first processing domain and the second processing domain comprises a multi-threaded processor core arranged to output a set of internal state signals representative of current states of internal components of the respective processor core.... Freescale Semiconductor Inc

12/07/17 / #20170352756

Semiconductor device and making

A semiconductor device is disclosed that includes a first region of a first conductivity type that includes a drain, a region of a second conductivity type abutting the first region in a lateral direction and a vertical direction to form an interface between the first conductivity type and the second... Freescale Semiconductor Inc

12/07/17 / #20170353305

Application specific low-power secure key

A key generator including a low-power key adjust circuit, and a high-power key adjust circuit. The low-power key adjust circuit including a storage location to store an original key, a shifter to shift the original key by a number of steps to shift to create a first key, and an... Freescale Semiconductor Inc

11/30/17 / #20170343350

Angular rate sensor

A MEMS sensor for measuring rotational motion about a first axis includes a frame, a base structure under the frame, a drive mass mounted in the frame for rotational movement about a second axis perpendicular to the first axis, and a first drive paddle in the drive mass. A first... Freescale Semiconductor Inc

11/30/17 / #20170345491

Systems and methods for non-volatile flip flops

An integrated circuit includes a first plurality of flip flops; a first bank of resistive memory cells, wherein each flip flop of the first plurality of flip flops uniquely corresponds to a resistive memory cell of the first bank of resistive memory cells; write circuitry configured to store data from... Freescale Semiconductor Inc

11/30/17 / #20170345746

Integrated circuit package with solder balls on two sides

An integrated circuit package with solder balls on two major sides of the package and a method of making. The integrated circuit package includes at least one die encapsulated in an encapsulant. A work piece panel is formed with encapsulated die. Solder balls are attached to two major opposing sides... Freescale Semiconductor Inc

11/30/17 / #20170346280

Sensing and detection of esd and other transient overstress events

An integrated circuit includes an I/O pad and a protection device coupled to the I/O pad and a first supply node. A transient event detector includes a latch; a first transistor having a first current electrode coupled to the I/O pad, a control electrode coupled to a first supply node,... Freescale Semiconductor Inc

11/30/17 / #20170346579

Communicaton unit receiver, integrated circuit and adc dynamic range selection

A communication unit receiver comprising: a multi-section analogue to digital converter, ADC, configured to receive an analogue signal and convert at least a first portion of the analogue signal into a digital signal using a first ADC dynamic range. A modem, coupled to the multi-section ADC, is configured to: process... Freescale Semiconductor Inc

Patent Packs
11/30/17 / #20170346664

Communicaton unit, circuit for quadrature sampling error estimation and compensation and method therefor

A communication unit comprises a modem configured to generate a first and second test digital quadrature signal. The modem is configured to: estimate a first sampling error performance associated with a first quadrature path from the first received test digital quadrature signal; estimate a second sampling error performance associated with... Freescale Semiconductor Inc

11/23/17 / #20170334306

Battery monitoring device

A battery monitoring device suitable for monitoring performance of one or more battery cells, such as with respect to a battery pack powering a vehicle. The battery monitoring device includes a signal injector configured to produce a replacement physical set that emulates one or more physical properties associated with the... Freescale Semiconductor Inc

11/23/17 / #20170336973

Memory interleave system and method therefor

Methods and systems for accessing a memory are provided. One method of accessing a memory includes generating a memory access profile for accesses to a memory array. A memory controller coupled to the memory array is configured using the generated memory access profile. After configuring the memory controller, accesses to... Freescale Semiconductor Inc

11/23/17 / #20170337142

Compiler global memory access optimization in code regions using most appropriate base pointer registers

A processing device includes a target processor instruction memory to store a plurality of target processor instructions that include a plurality of global memory access instructions. The processing device further includes a compiler to communicate with the target processor instruction memory, the compiler including: a global variable candidate detection module... Freescale Semiconductor Inc

11/09/17 / #20170322098

Pressure sensor device and testing the pressure sensor device

A pressure sensor device and a method for testing the pressure sensor device is provided. The pressure sensor device includes a first pressure sensor cell having a first capacitance value, and a second pressure sensor cell having a second capacitance value, the second capacitance value being different from the first... Freescale Semiconductor Inc

11/09/17 / #20170322891

Device and secure data storage

A device for secure data storage has a host unit that obtains data stored on an external device at an external storage address; a user signal generator that generates a user defined security signal based on the external storage address of the data that indicates a security level of the... Freescale Semiconductor Inc

11/09/17 / #20170324377

Amplitude detection with compensation

A circuit including an amplitude detector. The amplitude detector includes an input to receive a signal having an amplitude voltage and a first pair of transistors configured in parallel. The input is coupled to the control terminal of at least one transistor of the first pair. The amplitude detector includes... Freescale Semiconductor Inc

11/09/17 / #20170324715

Light-weight key update mechanism with blacklisting based on secret sharing algorithm in wireless sensor networks

Various embodiments include a network manager for managing network keys in a network having a plurality of nodes, the device including: a memory; and a processor configured to: determine N nodes to blacklist, wherein N is an integer; select a polynomial function from a plurality of polynomial functions of degree... Freescale Semiconductor Inc

11/09/17 / #20170324716

Autonomous key update mechanism with blacklisting of compromised nodes for mesh networks

Various embodiments described herein relate to network key manager which is configured to manage keys in nodes in the network, wherein the network key manager including a memory configured to store an update data structure; a processor configured to: determine which nodes are blacklisted; generate the update data structure of... Freescale Semiconductor Inc

11/02/17 / #20170313573

Rough mems surface

A surface of a cavity of a MEMS device that is rough to reduce stiction. In some embodiments, the average roughness (Ra) of the surface is 5 nm or greater. In some embodiments, the rough surface is formed by forming one or more layers of a rough oxidizable material, then... Freescale Semiconductor Inc

10/26/17 / #20170307697

Magnetic field sensor with multiple axis sense capability

A sensor for sensing an external magnetic field along a sensing direction comprises a sensor bridge. The sensor bridge has a first sensor leg that includes a first magnetoresistive sense element and a second sensor leg that includes a second magnetoresistive sense element. The first and second sense elements have... Freescale Semiconductor Inc

10/26/17 / #20170308108

Voltage supply regulator with overshoot protection

A voltage supply regulator includes a first output resistor including a first terminal coupled to an output voltage of the voltage supply regulator and a second terminal; a first comparator including a first input coupled to a reference voltage, a second input coupled to the second terminal of the first... Freescale Semiconductor Inc

10/26/17 / #20170308404

Data processing system having a coherency interconnect

A processing system includes a first processor configured to issue a first request in a first format, an adapter configured to receive the first request in the first format and send the first request in a second format, and a memory coherency interconnect configured to receive the first request in... Freescale Semiconductor Inc

10/26/17 / #20170310307

Systems and methods for supplying different voltage levels with shared current

An integrated circuit includes a first portion of a stacked ring oscillator coupled between a first supply voltage node and a common node, wherein the first supply voltage node provides a local supply voltage for the first portion and the common node provides a local ground for the first portion.... Freescale Semiconductor Inc

10/19/17 / #20170301636

Electrostatic discharge protection for antenna using vias

An integrated circuit device is formed to include a plurality of vias that connect an antenna to a ground reference. This configuration of the integrated circuit device provides an electrical path from the antenna to ground, thereby preventing the buildup of charge at the antenna. The vias thereby reduce the... Freescale Semiconductor Inc

Patent Packs
10/12/17 / #20170293001

Magnetic field sensor with permanent magnet biasing

A magnetic field sensor for sensing an external magnetic field along a sensing direction oriented perpendicular to a plane of the magnetic field sensor comprises a sensor bridge. The sensor bridge has a first sensor leg that includes a first magnetoresistive sense element and a second sensor leg that includes... Freescale Semiconductor Inc

10/12/17 / #20170292995

Multi-bit data flip-flop with scan initialization

Multi-bit data flip-flops are disclosed that provide bit initialization through propagation of scan bits. Input multiplexers are configured to select between input data bits and input scan bits based upon mode select signals. Master latches receive and latch outputs from the input multiplexers. Slave latches receive and latch outputs from... Freescale Semiconductor Inc

10/12/17 / #20170293375

Capacitive sensor device and operation

A capacitive sensor system includes a capacitive sensor device having a sense electrode that includes a first capacitor, a first supply voltage in , a first switch operable to couple the sense electrode to the first supply voltage during a first mode and an analog to digital converter during a... Freescale Semiconductor Inc

10/12/17 / #20170293516

Temporal relationship extension of state machine observer

A method includes receiving a first progress request from a first state machine associated with execution of a first thread on a processor. The method includes updating a current state of a temporal relationship state machine based on the current state, the first progress request, and a predetermined temporal relationship... Freescale Semiconductor Inc

10/12/17 / #20170294393

Pre-plated substrate for die attachment

A method for attaching a semiconductor die to a substrate includes providing a substrate that includes an attachment layer at a surface of the substrate. The attachment layer is covered by a protective flash plating layer. The protective flash plating layer has a reflow temperature less than or equal to... Freescale Semiconductor Inc

10/12/17 / #20170294994

Common public radio interface, cpri, lane controller and operating thereof

The present application relates to a Common Public Radio Interface, CPRI, lane controller and a method of operating thereof. The CPRI lane controller comprises a transaction counter, a symbol counter and a comparator. The transaction counter is provided for maintaining a current aggregated transactions' size, Sizetrans, representative of an accumulated... Freescale Semiconductor Inc

10/12/17 / #20170295097

System and creating session entry

A system for creating a session entry and forwarding an IP packet includes memories that store session and session template tables, and first and second processors in communication with the memories. When the first processor receives the IP packet, it determines whether the session table includes a session entry corresponding... Freescale Semiconductor Inc

10/05/17 / #20170286587

Systems and methods for creating block constraints in integrated circuit designs

Methods for generating constraints associated with an integrated circuit design are provided. The method includes identifying, with a processor, a plurality of paths based on a floor-plan data set, each of the paths specifying a first block, a second block, and a first interconnect between the first block and the... Freescale Semiconductor Inc

10/05/17 / #20170289842

Method and system for processing lower nfft lte rates over cpri link

A method including receiving, by a radio equipment control (REC) device of a wireless communication system over an interface link, time domain compressed data from a radio equipment (RE) device at a first data transmission rate. The method further including transforming, by the REC device, the time domain compressed data... Freescale Semiconductor Inc

09/28/17 / #20170276738

Multiple axis magnetic sensor

A magnetic field sensor for sensing an external magnetic field along a sensing direction comprises a sensor bridge. The sensor bridge has a first sensor leg that includes a first magnetoresistive sense element and a second sensor leg that includes a second magnetoresistive sense element. The first and second sense... Freescale Semiconductor Inc

09/28/17 / #20170277647

Integrated circuit with pin level access to io pins

An integrated circuit (IC) having multiple cores controls write access to its input/output (I/O) pins. The IC includes a pin-control circuit, a memory, and a set of I/O pins. The pin-control circuit allows a core to independently control individual ones of the I/O pins. A set of pin-control values are... Freescale Semiconductor Inc

09/28/17 / #20170278763

Semiconductor device package and methods of manufacture thereof

A method of manufacturing a packaged semiconductor device includes forming an assembly by placing a semiconductor die over a substrate with a die attach material between the semiconductor die and the substrate. A conformal structure which includes a pressure transmissive material contacts at least a portion of a top surface... Freescale Semiconductor Inc

09/28/17 / #20170278768

Packaged device with extended structure for forming an opening in the encapsualant

A packaged device includes an extended structure located at a major side of the packaged device. The extended structure defines an outer area that includes encapsulated material on the major side and an inner area where there is a lack of encapsulant over a portion of the device at the... Freescale Semiconductor Inc

09/28/17 / #20170278825

Apparatus and methods for multi-die packaging

A packaged semiconductor device includes a first package substrate having a first plurality of lead fingers, a first die attached to a first major surface of the first package substrate, a second package substrate having a second plurality of lead fingers, wherein each of the second plurality of lead fingers... Freescale Semiconductor Inc

09/28/17 / #20170278937

Split gate device with doped region and method therefor

A method of forming a semiconductor device using a substrate includes forming a first select gate over the substrate, a charge storage layer over the first select gate, over the second select gate, and over the substrate in a region between the first select gate and the second select gate,... Freescale Semiconductor Inc

09/28/17 / #20170278961

Semiconductor devices with an enhanced resistivity region and methods of fabrication therefor

Embodiments of a semiconductor device include a base substrate including an upper surface, a nucleation layer disposed over the upper surface of the base substrate, a first semiconductor layer disposed over the nucleation layer, a second semiconductor layer disposed over the first semiconductor layer, a channel within the second semiconductor... Freescale Semiconductor Inc

09/28/17 / #20170279268

Power switch module, smart grid power supply arrangement and method therefor

A power switch module comprising a control component. Upon an indicated operating condition fulfilling a protection condition, the control component is arranged to transition the power switch module from an ON state to a latched-OFF state in which the control component is arranged to configure the switching device to be... Freescale Semiconductor Inc

09/14/17 / #20170263324

Sector retirement for split-gate memory

A memory is provided. The memory includes an array of non-volatile memory (NVM) cells arranged in a plurality sectors. A control gate driver circuit has an output coupled to control gates of the NVM cells in a sector in the plurality of sectors. An address decoder is coupled to the... Freescale Semiconductor Inc

09/14/17 / #20170263538

Packaged semiconductor device having bent leads and forming

A package device has a first lead frame having a first flag. A first integrated circuit is on the first flag. A first encapsulant is over the first integrated circuit. A first plurality of leads is electrically bonded to the first integrated circuit. A first lead of the first plurality... Freescale Semiconductor Inc

09/14/17 / #20170264124

Regulation circuit having analog and digital feedback and method therefor

A regulation circuit for powering a device while charging a battery is provided. The regulation circuit includes at least one analog feedback loop, and a digitally controlled feedback loop. The digitally controlled feedback loop includes first and second comparators. The first and second comparators compare an input power supply voltage... Freescale Semiconductor Inc

09/14/17 / #20170265228

Linear combination for rach detection

A method including receiving, by an antenna combiner of a wireless communication system, a set of Random Access Channel (RACH) sequences of a first RACH signal from a first antenna and a set of RACH sequences of a second RACH signal from a second antenna. The method further including selecting,... Freescale Semiconductor Inc

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