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Freescale Semiconductor Inc
Freescale Semiconductor Inc A Corporation
Freescale Semiconductor Inc formerly Known As Sigmatel Inc
Freescale Semiconductor Inc Austin Texas
Freescale Semiconductor Inc_20100107
Freescale Semiconductor Inc_20100114
Freescale Semiconductor Inc_20131212
Freescale Semiconductor Inc_20100128
Freescale Semiconductor Inc_20100121

Freescale Semiconductor Inc patents

Recent patent applications related to Freescale Semiconductor Inc. Freescale Semiconductor Inc is listed as an Agent/Assignee. Note: Freescale Semiconductor Inc may have other listings under different names/spellings. We're not affiliated with Freescale Semiconductor Inc, we're just tracking patents.

ARCHIVE: New 2017 2016 2015 2014 2013 2012 2011 2010 2009 | Company Directory "F" | Freescale Semiconductor Inc-related inventors

Date Freescale Semiconductor Inc patents (updated weekly) - BOOKMARK this page
10/19/17 new patent  Electrostatic discharge protection for antenna using vias
10/12/17Magnetic field sensor with permanent magnet biasing
10/12/17Multi-bit data flip-flop with scan initialization
10/12/17Capacitive sensor device and operation
10/12/17Temporal relationship extension of state machine observer
10/12/17Pre-plated substrate for die attachment
10/12/17Common public radio interface, cpri, lane controller and operating thereof
10/12/17System and creating session entry
10/05/17Systems and methods for creating block constraints in integrated circuit designs
10/05/17Method and system for processing lower nfft lte rates over cpri link
09/28/17Multiple axis magnetic sensor
09/28/17Integrated circuit with pin level access to io pins
09/28/17Semiconductor device package and methods of manufacture thereof
09/28/17Packaged device with extended structure for forming an opening in the encapsualant
09/28/17Apparatus and methods for multi-die packaging
09/28/17Split gate device with doped region and method therefor
09/28/17Semiconductor devices with an enhanced resistivity region and methods of fabrication therefor
09/28/17Power switch module, smart grid power supply arrangement and method therefor
09/14/17Sector retirement for split-gate memory
09/14/17Packaged semiconductor device having bent leads and forming
09/14/17Regulation circuit having analog and digital feedback and method therefor
09/14/17Linear combination for rach detection
09/07/17Data processing system having dynamic thread control
09/07/17System and adaptive learning time based network traffic manager
08/31/17Integrated capacitive humidity sensor
08/31/17Data processing system having a write request network and a write data network
08/31/17Memory repair system and method therefor
08/31/17Multiple path amplifier with pre-cancellation
08/31/17Passive equalizer capable of use in high-speed data communication
08/24/17Circuit for reducing negative glitches in voltage regulator
08/24/17Fixed-point conjugate gradient digital pre-distortion (dpd) adaptation
08/10/17On-die temperature sensor for integrated circuit
08/10/17Secure clock switch circuit
08/10/17Esd protection circuit
08/10/17Buffer allocation and use for packet cloning and mangling
08/03/17Network application verification at a network processor
08/03/17Multi-dimensional parity checker (mdpc) systems and related methods for external memories
08/03/17Direct interface between sram and non-volatile memory
08/03/17Receiver removal detection in wireless charging systems
07/27/17Magnetic field sensor with multiple sense layer magnetization orientations
07/27/17Magnetic field sensor with skewed sense magnetization of sense layer
07/27/17Magnetic field sensor with permanent magnet biasing
07/27/17System and performing bus transactions
07/27/17Full address coverage during memory array built-in self-test with minimum transitions
07/06/17Current sensing circuit and method
07/06/17Providing task-triggered determinisitic operational mode for simultaneous multi-threaded superscalar processor
07/06/17Semiconductor device with floating field plates
07/06/17System and automatic delay compensation in a radio base station system
06/29/17Computing system with a cache invalidation unit, a cache invalidation unit and a operating a cache invalidation unit in a computing system
06/29/17Transmitter output driver circuits for high data rate applications, and methods of their operation
06/22/17Amplifier devices with in-package bias modulation buffer
06/22/17Hash-based packet classification with multiple algorithms at a network processor
06/22/17Clock gating for x-bounding timing exceptions in ic testing
06/22/17Memory error detection system
06/22/17Memory controller and operating a memory controller
06/22/17Power grid balancing apparatus, system and method
06/22/17Partial, self-biased isolation in semiconductor devices
06/22/17Apparatus for reception and detection of random access channel (rach) data
06/15/17System and modulo addressing vectorization with invariant code motion
06/15/17Memory controller with interleaving and arbitration scheme
06/15/17Designing a density driven integrated circuit
06/15/17Adapative message caches for replay/flood protection in mesh network devices
06/15/17System and automatic load adaptive antenna carrier bandwidth dynamic reconfiguration in radio base station system
06/15/17System and on-the-fly modification of the properties on an active antenna carrier in radio base station communication operation
06/15/17Method and apparatus to accelerate session creation using historical session cache
Patent Packs
06/08/17Low power state retention mode for processor
06/08/17Adaptive instrument cluster
06/08/17Low-power clock repeaters and injection locking protection for high-frequency clock distributions
06/08/17Base transceiver station for reducing congestion in communcation network
06/01/17System and removing hash table entries
06/01/17Antenna assembly for wafer level packaging
05/25/17Integrated circuit with low power scan system
05/25/17System and reducing hibernate and resume time
05/25/17Single inductor, multiple output dc-dc converter
05/25/17Multi-bit flip-flop with soft error suppression
05/25/17Packaged unidirectional power transistor and control circuit therefore
05/18/17Mems device with capacitance enhancement on quadrature compensation electrode
05/18/17Systems and methods for frame presentation and modification in a networking environment
05/18/17Protecting embedded nonvolatile memory from interference
05/18/17Interrupt controlled prefetching and caching mechanism for enhanced processor throughput
Patent Packs
05/18/17Semiconductor device package, electronic device and manufacturing electronic devices using wafer level chip scale package technology
05/18/17Packaged devices with multiple planes of embedded electronic devices
05/11/17Mems device with isolation sub-frame structure
05/11/17Testing multi-core integrated circuit with parallel scan test data inputs and outputs
05/11/17Fft device and performing a fast fourier transform
05/11/17Data clustering employing mapping and merging
05/11/17Method of packaging integrated circuit die and device
05/04/17Pressure sensor with variable sense gap
05/04/17Integrated circuit lifecycle security with redundant and overlapping crosschecks
05/04/17Substrate array for packaging integrated circuits
05/04/17Substrate with routing
05/04/17Self-adjusted isolation bias in semiconductor devices
05/04/17Method and motor lock or stall detection
05/04/17Reconfigurable power splitters and amplifiers, and corresponding methods
05/04/17Method and calibrating a digitally controlled oscillator
05/04/17Multi-rate overlay mode in wireless communication systems
05/04/17Systems and methods for managing high network data rates
04/27/17Mems sensor device having integrated multiple stimulus sensing
04/27/17Multi-port power prediction for power management of data storage devices
04/27/17Non-volatile ram system
04/27/17Integrated circuit using standard cells from two or more libraries
04/27/17Sense path circuitry suitable for magnetic tunnel junction memories
04/27/17Output impedance matching circuit for rf amplifier devices, and methods of manufacture thereof
04/27/17Rf power transistors with video bandwidth circuits, and methods of manufacture thereof
04/27/17Rail-to-rail comparator with shared active load
04/27/17System and processing data packets by caching instructions
04/20/17Mutual capacitance sensing circuit
04/20/17Partitioned memory having pipeline writes
04/20/17Slave device alert signal in inter-integrated circuit (i2c) bus system
04/20/17Ic device having patterned, non-conductive substrate
Social Network Patent Pack
04/20/17Integrated circuits and devices with interleaved transistor elements, and methods of their fabrication
04/13/17Method for packaging an integrated circuit device with stress buffer
04/13/17Packet loss debug system and method
04/06/17Lbist debug controller
04/06/17Esd protection device
04/06/17Configurable correlator for joint timing and frequency synchronization and demodulation
03/30/17Microelectronic packages having mold-embedded traces and methods for the production thereof
03/30/17Mems sensor with reduced cross-axis sensitivity
03/30/17Integrated circuit with secure scan enable
03/30/17Data processing unit having a memory protection unit
Patent Packs
03/30/17Shared cache protocol for parallel search and replacement
03/30/17Interconnect sharing with integrated control for reduced pinout
03/30/17Systems and methods to access memory locations in exact match keyed lookup tables using auxiliary keys
03/30/17Gate length upsizing for low leakage standard cells
03/30/17Memory with read circuitry and operating
03/30/17Full address coverage during memory array built-in self test with minimum transitions
03/30/17Methods to improve bga package isolation in radio frequency and millimeter wave products
03/30/17Hot plugging protection
03/30/17Denial-of-service attack protection for a communication device
03/30/17Methods and system for generating a waveform for transmitting data to a plurality of receivers and for decoding the received waveform
03/30/17Communication device identification
03/30/17Rule lookup using predictive tuples based rule lookup cache in the data plane
03/23/17Safety level specific error response scheme for mixed criticality systems
03/23/17Tree-search temporal-miss handling
03/23/17Integrating diverse sensors in a single semiconductor device
03/23/17Semiconductor device package with seal structure
03/23/17Mems sensor with side port and fabricating same
03/23/17Data processing system with built-in self-test and method therefor
03/23/17System and error detection in a critical system
03/23/17Handling defective non-volatile memory
03/23/17Semiconductor device with graphene encapsulated metal and method therefor
03/23/17Wafer level chip scale package with encapsulant
03/23/17Semiconductor package and manufacturing same
03/23/17Terminal structure for active power device
03/23/17Integrated circuit with power saving feature
03/23/17Localized redistribution layer structure for embedded component package and method
03/23/17Electrostatic discharge protection devices and methods
03/23/17Electronic devices with nanorings, and methods of manufacture thereof
03/23/17Encapsulated semiconductor device package with heatsink opening, and methods of manufacture thereof
03/23/17System and large dimension equalization using small dimension equalizers
Patent Packs
03/23/17Creating and utilizing customized network applications
03/16/17Systems and methods for graphical layer blending
03/16/17System-in-packages containing preassembled surface mount device modules and methods for the production thereof
03/16/17Multi-gate semiconductor devices with improved hot-carrier injection immunity
03/16/17Differential capacitive output pressure sensor and method
03/16/17Method and system to display and browse program trace using source code decoration
03/16/17Automatic memory security
03/16/17Model-based runtime detection of insecure behavior for system on chip with security requirements
03/16/17Monolithic microwave integrated circuits
03/16/17Partially biased isolation in semiconductor devices
03/16/17Segmented field plate structure
03/16/17Partially biased isolation in semiconductor devices
03/16/17Wireless power transmitters with wide input voltage range and methods of their operation
03/16/17High power driver
03/16/17Low power circuit for amplifying a voltage without using resistors
03/16/17Phase shift and attenuation circuits for use with multiple-path amplifiers
03/16/17Method for determining and recovering from loss of synchronization, communication units and integrated circuits therefor
03/09/17Stacked microelectronic package assemblies and methods for the fabrication thereof
03/09/17Compensation and calibration of multiple mass mems sensor
03/09/17Apparatus and placing stressors within an integrated circuit device to manage electromigration failures
Social Network Patent Pack
03/09/17Charge pump circuit for providing multiplied voltage
03/09/17Impedance matching device with coupled resonator structure
03/09/17Input buffer with selectable hysteresis and speed
03/09/17Wireless charger using frequency aliasing fsk demodulation
03/09/17Video stream decoder
03/02/17High capacity i/o (input/output) cells
03/02/17Arbitrary instruction execution from context memory
03/02/17Safe secure bit storage with validation
03/02/17Fast secure boot from embedded flash memory
03/02/17Multiple request notification network for global ordering in a coherent mesh interconnect
03/02/17Static random access memory (sram) with programmable resistive elements
03/02/17Ternary content addressable memory (tcam) with programmable resistive elements
03/02/17Integrated circuit with on-die power distribution bars
03/02/17Universal bga substrate
03/02/17Configurable fir filter with segmented cells
03/02/17Programmable resistive elements as variable tuning elements
03/02/17Multi-bit flip-flop with shared clock switch
03/02/17Substrate bias circuit and biasing a substrate
03/02/17Data processing system with secure key generation
03/02/17Video encoder with adjustable intra-refresh rate
Social Network Patent Pack
02/23/17Electrically conductive barriers for integrated circuits
02/23/17Data processing system having messaging
02/23/17Fast write mechanism for emulated electrically erasable (eee) system
02/23/17Storage element with storage and clock tree monitoring circuit and methods therefor
02/23/17Three-dimensional integrated circuit systems in a package and methods therefor
02/23/17Semiconductor device having a metal oxide metal (mom) capacitor and a plurality of series capacitors and forming
02/23/17Semiconductor device with enhanced 3d resurf
02/23/17Output impedance-matching network having harmonic-prevention circuitry
02/23/17Media display system
02/23/17Recovering from discontinuities in time synchronization in audio/video decoder
02/16/17Microelectronic packages having axially-partitioned hermetic cavities and methods for the fabrication thereof
02/16/17Systems and methods for detecting change in species in an environment
02/16/17Tagged cache for data coherency in multi-domain debug operations
02/16/17Non-volatile dynamic random access memory (nvdram) with programming line
02/16/17Sensing and reference voltage scheme for random access memory
02/16/17Method for making a semiconductor device having an interposer
02/16/17Zero-current crossing detection circuits
02/16/17Phase locked loop circuit, integrated circuit, communication unit and method therefor
02/16/17System and radio base station device hot switching and hot swapping
02/16/17System and radio base station device hot reconnection (hot plugging)
02/16/17Radio frequency coupling and transition structure
02/09/17Display control apparatus and configuring an interface bandwidth for image data flow
02/09/17Semiconductor device with protective material and encapsulating
02/09/17Wireless power source and simultaneous, non-radiative, inductive, wireless power transfer to two or more devices to be charged
02/09/17Electrical energy generation within a vehicle tire
02/09/17Electronic device with capacitor bank linearization and a linearization method
02/02/17Reduction of silicon area for ethernet pfc protocol implementation in queue based network processors
02/02/17Workload balancing in multi-core video decoder
01/26/17Self test for capacitive pressure sensors
01/26/17Mems device with flexible travel stops and fabrication
Social Network Patent Pack
01/26/17Multi-axis inertial sensor with dual mass and integrated damping structure
01/26/17Linear voltage regulator
01/26/17Dma controller for a data processing system, a data processing system and a operating a dma controller
01/26/17Interrupt management system for deferring low priority interrupts in real-time system
01/26/17Simulation of hierarchical circuit element arrays
01/26/17Semiconductor wafers with through substrate vias and back metal, and methods of fabrication thereof
01/26/17Balun transformer
01/26/17Bandwidth estimation circuit, computer system, estimating and predicting the bandwidth and computer readable program product
01/26/17Interconnecting system, video signal transmitter and video signal receiver for transmitting an n-symbol data signal
01/26/17Interconnecting system, video signal transmitter and video signal receiver for transmitting an n-symbol data signal
01/19/17Method and determining a value of a variable parameter
01/19/17Coherent timer management in a multicore or multithreaded system
01/19/17Timer rings having different time unit granularities
01/19/17System and updating firmware in real-time
01/19/17Parallel decoder with inter-prediction of video pictures
01/12/17Woven signal-routing substrate for wearable electronic devices
01/12/17Method of making a packaged semiconductor device
01/05/17Mems sensor devices having a self-test mode
01/05/17Electronic device with demonstration mode
01/05/17Flash memory controller, data processing system with flash memory controller and operating a flash memory controller
01/05/17Cmos device including a non-straight pn-boundary and methods for generating a layout of a cmos device
01/05/17Display system, an integrated circuit for use in the display system, and a displaying at least two images on at least two screens
01/05/17Non-volatile random access memory (nvram)
01/05/17Esd protection structure
01/05/17Semiconductor package having an isolation wall to reduce electromagnetic coupling
01/05/17Noise suppression circuit for a switchable transistor
01/05/17Video buffering and frame rate doubling device and method
12/29/16Semiconductor devices and methods for dead time optimization
12/29/16Integrated circuit including overlapping scan domains

ARCHIVE: New 2017 2016 2015 2014 2013 2012 2011 2010 2009


This listing is an abstract for educational and research purposes is only meant as a recent sample of applications filed, not a comprehensive history. is not affiliated or associated with Freescale Semiconductor Inc in any way and there may be associated servicemarks. This data is also published to the public by the USPTO and available for free on their website. Note that there may be alternative spellings for Freescale Semiconductor Inc with additional patents listed. Browse our Agent directory for other possible listings. Page by