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Link_a_media Devices Corporation
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Link_a_media Devices Corporation patents

Recent patent applications related to Link_a_media Devices Corporation. Link_a_media Devices Corporation is listed as an Agent/Assignee. Note: Link_a_media Devices Corporation may have other listings under different names/spellings. We're not affiliated with Link_a_media Devices Corporation, we're just tracking patents.

ARCHIVE: New 2016 2015 2014 2013 2012 2011 2010 2009 | Company Directory "L" | Link_a_media Devices Corporation-related inventors




Date Link_a_media Devices Corporation patents (updated weekly) - BOOKMARK this page
09/05/13Generating soft read values using bins and/or multiple reads
08/15/13E/p durability by using a sub-range of a full programming range
07/18/13Soft output viterbi detector with error event output
07/11/13Finding optimal read thresholds and related voltages for solid state memory
04/04/13Sova sharing during ldpc global iteration
01/31/13Inter-track interference cancelation in the presence of frequency offset
11/29/12Manufacturing testing for ldpc codes
11/01/12Set partitioning and multilevel coding
10/11/12On demand hard disk drive system on a chip power control scheme
09/27/12Ldpc selective decoding scheduling using a cost function
08/16/12Blind and decision directed multi-level channel estimation
06/28/12Interleaving parity bits into user bits to guarantee run-length constraint
05/24/12Write-precompensation and variable write backoff
05/24/12Binary bch decoders
05/10/12Storage media defect detection
05/10/12Preamble acquisition without second order timing loops
05/03/12Inter-track interference cancelation for shingled magnetic recording
04/26/12Split sector formatting of storage disks
04/05/12E/p durability by using a sub-range of a full programming range
03/29/12Decision directed timing recovery using multi-phase detection
01/26/12Pad bit injection during read operation to improve format efficiency
10/13/11Implementation of ldpc selective decoding scheduling
09/29/11Ecc with out of order completion
08/04/11Quasi-cyclic ldpc encoding and decoding for non-integer multiples of circulant size
07/28/11Ldpc decoding with on the fly error recovery
07/28/11High-speed and agile encoder for variable strength long bch codes
05/26/11E/p durability by using a sub-range of a full programming range
05/19/11Offset compensation scheme using a dac
04/28/11Decoupling magneto-resistive asymmetry and offset loops
04/07/11Baseline wander compensation for perpendicular recording
03/31/11Obtaining parameters for minimizing an error event probability
03/31/11Preamble acquisition without second order timing loops
03/31/11Parallel inversionless error and erasure processing
11/11/10Incremental generation of polynomials for decoding reed-solomon codes
08/05/10Reduced processing in high-speed reed-solomon decoding
03/18/10Soft output viterbi detector with error event output
01/28/10Offset compensation scheme using a dac
01/28/10Offset compensation scheme using a dac







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