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Lntel Corporation patents


Recent patent applications related to Lntel Corporation. Lntel Corporation is listed as an Agent/Assignee. Note: Lntel Corporation may have other listings under different names/spellings. We're not affiliated with Lntel Corporation, we're just tracking patents.

ARCHIVE: New 2018 2017 2016 2015 2014 2013 2012 2011 2010 2009 | Company Directory "L" | Lntel Corporation-related inventors


Multiple register memory access instructions, processors, methods, and systems

A processor includes n-bit registers and a decode unit to receive a multiple register memory access instruction. The multiple register memory access instruction is to indicate a memory location and a register. ... Lntel Corporation

Multiple register memory access instructions, processors, methods, and systems

A processor includes n-bit registers and a decode unit to receive a multiple register memory access instruction. The multiple register memory access instruction is to indicate a memory location and a register. ... Lntel Corporation

Multiple register memory access instructions, processors, methods, and systems

A processor includes n-bit registers and a decode unit to receive a multiple register memory access instruction. The multiple register memory access instruction is to indicate a memory location and a register. ... Lntel Corporation

Multiple register memory access instructions, processors, methods, and systems

A processor includes n-bit registers and a decode unit to receive a multiple register memory access instruction. The multiple register memory access instruction is to indicate a memory location and a register. ... Lntel Corporation

Multiple register memory access instructions, processors, methods, and systems

A processor includes n-bit registers and a decode unit to receive a multiple register memory access instruction. The multiple register memory access instruction is to indicate a memory location and a register. ... Lntel Corporation

Methods and apparatus to use a security coprocessor for firmware protection

A data processing system (dps) provides protection for firmware. The dps comprises (a) a host module comprising a management engine and (b) a security module in communication with the host module. ... Lntel Corporation

Processors, methods, systems, and instructions to consolidate data elements and generate index updates

A decode unit to decode an instruction that indicates a source packed data that includes data elements, and indicates a source mask that includes mask elements. Each of the mask elements corresponds to a different one of the data elements. ... Lntel Corporation

Multiple register memory access instructions, processors, methods, and systems

A processor includes n-bit registers and a decode unit to receive a multiple register memory access instruction. The multiple register memory access instruction is to indicate a memory location and a register. ... Lntel Corporation

Processors, methods, systems, and instructions to support live migration of protected containers

A processor includes a decode unit to decode an instruction that is to indicate a page of a protected container memory, and a storage location outside of the protected container memory. An execution unit, in response to the instruction, is to ensure that there are no writable references to the page of the protected container memory while it has a write protected state. ... Lntel Corporation

Blockchain system with nucleobase sequencing as proof of work

A sequence mining platform (smp) comprises a processor, at least one machine-accessible storage medium responsive to the processor, and a sequence manager in the machine-accessible storage medium. The sequence manager is configured to use processing resources to determine a sequence of nucleobases in a nucleic acid. ... Lntel Corporation

Instruction and logic to provide vector scatter-op and gather-op functionality

Instructions and logic provide vector scatter-op and/or gather-op functionality. In some embodiments, responsive to an instruction specifying: a gather and a second operation, a destination register, an operand register, and a memory address; execution units read values in a mask register, wherein fields in the mask register correspond to offset indices in the indices register for data elements in memory. ... Lntel Corporation

Method and apparatus for performing a shift and exclusive or operation in a single instruction

Method and apparatus for performing a shift and xor operation. In one embodiment, an apparatus includes execution resources to execute a first instruction. ... Lntel Corporation

Drone control registration

A drone includes technology for tracking controllers. A controller registration module (crm) in the drone enables the drone to receive a first controller identifier from a first remote device. ... Lntel Corporation

Malware-proof privacy indicator

A voice command device (vcd) has privacy protection. The vcd comprises a processor, first and second input devices, at least one data line to couple the first and second input devices to the processor, a power supply, and a sensor power line to couple the first and second input devices to the power supply. ... Lntel Corporation

09/07/17 / #20170257277

Mechanism for management controllers to learn the control plane hierarchy in a data center environment

Mechanisms to enable management controllers to learn the control plane hierarchy in data center environments. The data center is configured in a physical hierarchy including multiple pods, racks, trays, and sleds and associated switches. ... Lntel Corporation

09/07/17 / #20170255469

Instructions and logic to provide simd sm3 cryptographic hashing functionality

Instructions and logic provide simd sm3 cryptographic hashing functionality. Some embodiments include a processor comprising: a decoder to decode instructions for a simd sm3 message expansion, specifying first and second source data operand sets, and an expansion extent. ... Lntel Corporation

08/17/17 / #20170235695

Ring protocol for low latency interconnect switch

Methods, systems, and apparatus for implementing low latency interconnect switches between cpu's and associated protocols. Cpu's are configured to be installed on a main board including multiple cpu sockets linked in communication via cpu socket-to-socket interconnect links forming a cpu socket-to-socket ring interconnect. ... Lntel Corporation

08/17/17 / #20170235693

Optimized credit return mechanism for packet sends

Method and apparatus for implementing an optimized credit return mechanism for packet sends. A programmed input/output (pio) send memory is partitioned into a plurality of send contexts, each comprising a memory buffer including a plurality of send blocks configured to store packet data. ... Lntel Corporation

08/03/17 / #20170220351

Processors, methods, systems, and instructions to transcode variable length code points of unicode characters

A processor includes a plurality of packed data registers. The processor also includes a decode unit to decode a packed variable length code point length determination instruction. ... Lntel Corporation

07/20/17 / #20170206088

Mfence and lfence micro-architectural implementation method and system

A system and method for fencing memory accesses. Memory loads can be fenced, or all memory access can be fenced. ... Lntel Corporation

07/13/17 / #20170199726

Multiply add functional unit capable of executing scale, round, getexp, round, getmant, reduce, range and class instructions

A method is described that involves executing a first instruction with a functional unit. The first instruction is a multiply-add instruction. ... Lntel Corporation

06/29/17 / #20170185398

Floating point round-off amount determination processors, methods, systems, and instructions

A method of an aspect includes receiving a floating point round-off amount determination instruction. The instruction indicates a source of one or more floating point data elements, indicates a number of fraction bits after a radix point, and indicates a destination storage location. ... Lntel Corporation

06/22/17 / #20170177516

Sending packets using optimized pio write sequences without sfences

Method and apparatus for sending packets using optimized pio write sequences without sfences. Sequences of programmed input/output (pio) write instructions to write packet data to a pio send memory are received at a processor supporting out of order execution. ... Lntel Corporation

06/15/17 / #20170170957

Methods and apparatus for migrating keys

A destination data processing system (dps) receives a key migration block from a source dps. The key migration block includes an encrypted version of a primary key. ... Lntel Corporation

06/08/17 / #20170160378

Enhanced positioning system using hybrid filter

The disclosure generally relates to an enhanced positioning system and method using a combination or hybrid filter. In one embodiment, time-of-flight (tof) measurements are used to determine an approximate location for a mobile device in relationship to one or more access points. ... Lntel Corporation

05/11/17 / #20170132039

Monitoring accesses of a thread to multiple memory controllers and selecting a thread processor for the thread based on the monitoring

A method of an aspect includes running a plurality of threads on a plurality of thread processors. Memory accesses, of a thread of the plurality that is running on a first thread processor of the plurality, are monitored to both a first memory through a first memory controller and a second memory through a second memory controller. ... Lntel Corporation

05/11/17 / #20170131739

Time-delayed latch

A device, system, and method are described. In one embodiment, the device includes a latch. ... Lntel Corporation

05/04/17 / #20170126330

Rack level pre-installed interconnect for enabling cableless server/storage/networking deployment

Apparatus and methods for rack level pre-installed interconnect for enabling cableless server, storage, and networking deployment. Plastic cable waveguides are configured to couple millimeter-wave radio frequency (rf) signals between two or more extremely high frequency (ehf) transceiver chips, thus supporting millimeter-wave wireless communication links enabling components in the separate chassis to communicate without requiring wire or optical cables between the chassis. ... Lntel Corporation

04/20/17 / #20170109321

Method, apparatus and instructions for parallel data conversions

Method, apparatus, and program means for performing a conversion. In one embodiment, a disclosed apparatus includes a destination storage location corresponding to a first architectural register. ... Lntel Corporation

04/20/17 / #20170109320

Method, apparatus and instructions for parallel data conversions

Method, apparatus, and program means for performing a conversion. In one embodiment, a disclosed apparatus includes a destination storage location corresponding to a first architectural register. ... Lntel Corporation

04/20/17 / #20170109319

Method, apparatus and instructions for parallel data conversions

Method, apparatus, and program means for performing a conversion. In one embodiment, a disclosed apparatus includes a destination storage location corresponding to a first architectural register. ... Lntel Corporation

04/20/17 / #20170109318

Method, apparatus and instructions for parallel data conversions

Method, apparatus, and program means for performing a conversion. In one embodiment, a disclosed apparatus includes a destination storage location corresponding to a first architectural register. ... Lntel Corporation

04/20/17 / #20170109164

Processors, methods, and systems to implement partial register accesses with masked full register accesses

A method includes receiving a packed data instruction indicating a first narrower source packed data operand and a narrower destination operand. The instruction is mapped to a masked packed data operation indicating a first wider source packed data operand that is wider than and includes the first narrower source operand, and indicating a wider destination operand that is wider than and includes the narrower destination operand. ... Lntel Corporation

03/23/17 / #20170085370

Sm4 acceleration processors, methods, systems, and instructions

A processor of an aspect includes a plurality of packed data registers, and a decode unit to decode an instruction. The instruction is to indicate one or more source packed data operands. ... Lntel Corporation

03/16/17 / #20170076422

Methods and apparatus to support dynamic adjustment of graphics processing unit frequency

Disclosed methods support dynamic adjustment of graphics processing unit (gpu) frequency. According to one embodiment, a program comprises workload to execute, at least in part, on a gpu of a data processing system. ... Lntel Corporation

03/16/17 / #20170075409

Techniques for selectively reducing power levels of ports and core switch logic in infiniband switches

Methods for performing power management of infiniband (ib) switches and apparatus and software configured to implement the methods. Power management datagrams (mads) are used to inform ib switches that host servers connected to the ib switch's ports are to transition to a reduced-power or offline state or have returned to a normal operating state. ... Lntel Corporation

03/09/17 / #20170068516

Floating point scaling processors, methods, systems, and instructions

A method of an aspect includes receiving a floating point scaling instruction. The floating point scaling instruction indicates a first source including one or more floating point data elements, a second source including one or more corresponding floating point data elements, and a destination. ... Lntel Corporation

03/09/17 / #20170068283

Control mechanism and method for a hybrid hinge for electronic devices

A control mechanism and method for a hybrid hinge for electronic devices are disclosed. A particular embodiment includes: a hybrid hinge for an electronic device, the hybrid hinge comprising: a pivot; and an auxiliary component including one or more electro-magnetic or electro-mechanical devices and a variable electrical power source, the one or more electro-magnetic or electro-mechanical devices being configured to apply a variable degree of torque force to the pivot based on a degree of electrical power supplied by the electrical power source.. ... Lntel Corporation

03/09/17 / #20170067982

Method and apparatus for cross device automatic calibration

The disclosure relates to automatic calibration for cross devices in wi-fi fingerprint based areas. In an exemplary embodiment, an online device scans and obtains multiple signal strength value (rssioi) from local access points. ... Lntel Corporation

02/09/17 / #20170039066

Method and apparatus for shuffling data

Method, apparatus, and program means for shuffling data. The method of one embodiment comprises receiving a first operand having a set of l data elements and a second operand having a set of l control elements. ... Lntel Corporation

02/02/17 / #20170034618

System and method for data transmission and power supply capability over an audio jack for mobile devices

A system and method for data transmission and power supply capability over an audio jack for mobile devices are disclosed. A particular embodiment includes: a peripheral device including an energy storage component, a microphone using a microphone bias voltage, and a select switch configured to provide a first switch position wherein charging of the energy storage component using the microphone bias voltage via the microphone conductor is enabled, the select switch being configured provide a second switch position wherein charging of the energy storage component using the microphone bias voltage via the microphone conductor is disabled; and a mobile device and an application (app) executable in the mobile device to produce a switching tone on the audio signal conductor of the audio jack, the switching tone causing the select switch to transition to the first switch position or the second switch position.. ... Lntel Corporation

01/26/17 / #20170026300

Method and system for flexible credit exchange within high performance fabrics

Method, apparatus, and systems for implementing flexible credit exchange within high performance fabrics. Available buffer space in a receive buffer on a receive-side of a link is managed and tracked at the transmit-side of the link using credits. ... Lntel Corporation

01/26/17 / #20170026150

Efficient link layer retry protocol utilizing implicit acknowledgements

Methods, apparatus, and systems for implementing a link layer retry protocol utilizing implicit acknowledgements (acks). Peer link interfaces are configured to facilitate confirmed error-free delivery of link-layer packets through use of implicit acks, while also providing retransmission of packets for which errors are detected and guaranteeing the link control data is either successfully received or data transfer over the link is prevented. ... Lntel Corporation

01/26/17 / #20170026149

Lane error detection and lane removal mechanism to reduce the probability of data corruption

Method, apparatus, and systems for detecting lane errors and removing errant lanes in multi-lane links. Data comprising link packets is split into a plurality of bitstreams and transmitted over respective lanes of a multi-lane link in parallel. ... Lntel Corporation

01/19/17 / #20170019876

Method and apparatus for wi-fi location determination

The disclosure generally relates to a method, system and apparatus for autonomous wi-fi location determination by using information from neighboring access points (aps) along with an optional range measurements. In one embodiment, a root ap determines its location as a function of neighboring ap's location and the distance measured between the root ap and each of the corresponding neighbors. ... Lntel Corporation

01/19/17 / #20170019762

Method and apparatus for access point location token

The disclosure generally relates to a method and apparatus for using a location token to locate a mobile device in a mapped environment. In one embodiment, the disclosure relates to identifying an ap in the environment using an ap location token. ... Lntel Corporation

01/19/17 / #20170017488

Processors, methods, systems, and instructions to store consecutive source elements to unmasked result elements with propagation to masked result elements

A processor of an aspect includes a decode unit to decode an instruction indicating a first source packed data operand including at least four data elements, a source mask including at least four mask elements, and a destination storage location. An execution unit, in response to the instruction, stores a result packed data operand having a series of at least two unmasked result data elements. ... Lntel Corporation

01/19/17 / #20170017487

Processors, methods, systems, and instructions to store source elements to corresponding unmasked result elements with propagation to masked result elements

A processor of an aspect includes a decode unit to decode an instruction that indicates a first source packed data operand including a first plurality of data elements, a source mask including a plurality of mask elements, and a destination storage location. An execution unit, in response to the instruction, stores a result packed data operand. ... Lntel Corporation

01/19/17 / #20170017465

Sending packets using optimized pio write sequences without sfences

Method and apparatus for sending packets using optimized pio write sequences without sfences. Sequences of programmed input/output (pio) write instructions to write packet data to a pio send memory are received at a processor supporting out of order execution. ... Lntel Corporation

01/05/17 / #20170003373

Method and apparatus to improve position accuracy for wi-fi technology

The disclosure generally relates to a method, system and apparatus for calibrating a wireless device for accurate time-of-flight (tof) range determination. In one embodiment, the disclosure provides a method for calibrating a device by identifying a plurality of access points (aps) at the device; identifying a first ap of the plurality of aps, the first ap positioned immediately above the device; determining a real-time tof value for the first ap; determining a device calibration coefficient from the real-time tof value for first ap. ... Lntel Corporation








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