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Lsi Corporation patents


      
Recent patent applications related to Lsi Corporation. Lsi Corporation is listed as an Agent/Assignee. Note: Lsi Corporation may have other listings under different names/spellings. We're not affiliated with Lsi Corporation, we're just tracking patents.

ARCHIVE: New 2015 2014 2013 2012 2011 2010 2009 | Company Directory "L" | Lsi Corporation-related inventors



Selectively powering a storage device over a data network

Lsi

Selectively powering a storage device over a data network

Self-adjusting caching system

Lsi

Self-adjusting caching system

Self-adjusting caching system

Lsi

Appliances powered over sas

Search recent Press Releases: Lsi Corporation-related press releases
Count Application # Date Lsi Corporation patents (updated weekly) - BOOKMARK this page
12015002960801/29/15 new patent  Array-reader based magnetic recording systems with frequency division multiplexing
22015003002701/29/15 new patent  Switch device with device-specified bridge domains
32015003023201/29/15 new patent  Image processor configured for efficient estimation and elimination of background information in images
42015003296301/29/15 new patent  Dynamic selection of cache levels
52015003306501/29/15 new patent  Solid state drive emergency pre-boot application providing expanded data recovery function
62015003307401/29/15 new patent  Deadlock detection and recovery in sas
72015002216901/22/15Feedback/feed forward switched capacitor voltage regulation
82015002270401/22/15Orientation-based camera operation
92015002360701/22/15Gesture recognition method and apparatus based on analysis of multiple candidate boundaries
102015002640301/22/15Self-adjusting caching system
112015002641101/22/15Cache system for managing various cache line conditions
122015002648801/22/15Selectively powering a storage device over a data network
132015002650301/22/15Appliances powered over sas
142015002653601/22/15Data decoder with trapping set flip bit mapper
152015001532901/15/15Radio frequency composite class-s power amplifier having discrete power control
162015001598401/15/15Storage media inter-track interference cancellation
172015001598601/15/15Methods and improved threshold adaptation for a euclidean detector
182015001598701/15/15Prioritized spin-up of drives
192015001649701/15/15Clock and data recovery architecture with adaptive digital phase skew
202015001979501/15/15Memory system for shadowing volatile data
212015001981801/15/15Maintaining cache size proportional to power pack charge
222015001982201/15/15System for maintaining dirty cache coherency across reboot of a node
232015000889401/08/15Dynamic start-up circuit for hysteretic loop switched-capacitor voltage regulator
242015001269901/08/15System and versioning cache for a clustering topology
252015001270201/08/15Redundant array of independent disks volume creation
262015001280001/08/15Systems and methods for correlation based data alignment
272015000681501/01/15Backup of cached dirty data during power outages
282014037995912/25/14Map recycling acceleration
292014038022312/25/14User interface comprising radial layout soft keypad
302014036771712/18/14Semiconductor optical emitting device with metallized sidewalls
312014036939512/18/14Error detection based on superheterodyne conversion and direct downconversion
322014036969612/18/14Color coding and optical sub-band communication utilizing color coding
332014037263712/18/14Pcie tunneling through sas
342014037267212/18/14System and providing improved system performance by moving pinned data to open nand flash interface working group modules while the system is in a running state
352014037278312/18/14System and providing dynamic charge current based on maximum card power
362014037282812/18/14Systems and methods for hybrid layer data decoding
372014037283612/18/14Systems and methods for data processing control
382014036228912/11/14Method and increasing frame rate of an image stream using at least one higher frame rate image stream
392014036246312/11/14Timing error detector with diversity loop detector decision feedback
402014035921612/04/14Confirmed divert bitmap to synchronize raid firmware operations with fast-path hardware i/o processing
412014035926612/04/14Optimizing boot time of a storage system
422014035939412/04/14Apparatus for processing signals carrying modulation-encoded parity bits
432014034819711/27/14Semiconductor optical emitting device with lens structure formed in a cavity of a substrate of the device
442014034947511/27/14Moisture barrier for a wire bond
452014035148611/27/14Variable redundancy in a solid state drive
462014035167111/27/14Shift register-based layered low density parity check decoder
472014034078011/20/14Method and system for sliding-window based phase, gain, frequency and dc offset estimation for servo channel
482014034123111/20/14Lane-based multiplexing for physical links in serial attached small computer system interface architectures
492014034449211/20/14Methods and systems for reducing spurious interrupts in a data storage system
502014034461611/20/14Techniques for providing data redundancy after reducing memory writes
512014034496011/20/14Selective control of on-chip debug circuitry of embedded processors
522014033427811/13/14Systems and methods for energy based head contact detection
532014033428011/13/14Systems and methods for characterizing head contact
542014033428111/13/14Systems and methods for data processor marginalization based upon bit error rate
552014033449111/13/14Prediction based methods for fast routing of ip flows using communication/network processors
562014033754011/13/14Method and system for i/o flow management for pcie devices
572014033758311/13/14Intelligent cache window management for storage systems
582014033767611/13/14Systems and methods for processing data with microcontroller based retry features
592014033100111/06/14Command barrier for a solid state drive controller
602014033109611/06/14Cross-decoding for non-volatile storage
612014033110811/06/14Systems and methods for detecting media flaws
622014032511710/30/14Flash translation layer with lower write amplification
632014032514410/30/14Protection information initialization
642014032514510/30/14Cache rebuilds based on tracking data for cache entries
652014032514610/30/14Creating and managing logical volumes from unused space in raid disk groups
662014032530310/30/14Systems and methods for protected data encoding
672014031237210/23/14Semiconductor optical emitting device with grooved substrate providing multiple angled light emission paths
682014031247510/23/14Die reuse in electrical circuits
692014031361010/23/14Systems and methods selective complexity data decoding
702014031394610/23/14Non-linear interference cancellation for wireless transceivers
712014031417610/23/14Non-linear modeling of a physical system using two-dimensional look-up table with bilinear interpolation
722014031418110/23/14Non-linear modeling of a physical system using look-up table with polynomial interpolation
732014031426510/23/14Headphones with rotatable speaker arranged within housing of earpiece assembly
742014031675210/23/14Non-linear modeling of a physical system using direct optimization of look-up table values
752014031716310/23/14Vector processor having instruction set with sliding window non-linear convolutional function
762014031733410/23/14Storage of gate training parameters for devices utilizing random access memory
772014031734610/23/14Redundant array of independent disks systems that utilize spans with different storage device counts for a logical volume
782014031737610/23/14Digital processor having instruction set with complex angle function
792014030734510/16/14Systems and methods for preventing adjacent track erasure
802014030114310/09/14Techniques for controlling recycling of blocks of memory
812014030446410/09/14Methods and systems for performing deduplication in a data storage system
822014030456210/09/14Method for testing paths to pull-up and pull-down of input/output pads
832014029229810/02/14Operational amplifier-based current-sensing circuit for dc-dc voltage converters and the like
842014029812310/02/14Scan chain reconfiguration and repair
852014029812910/02/14Generating partially sparse generator matrix for a quasi-cyclic low-density parity-check encoder
862014029813110/02/14Priori information based post-processing in low-density parity-check code decoders
872014029814810/02/14Trend-analysis scheme for reliably reading data values from memory
882014028591809/25/14Systems and methods for quality based bit error rate prediction
892014028610209/25/14Method of optimizing solid state drive soft retry voltages
902014028614909/25/14Automatic on-drive sync-mark search and threshold adjustment
912014028638509/25/14Systems and methods for multi-dimensional signal equalization
922014028945009/25/14Dynamic log likelihood ratio quantization for solid state drive controllers
932014028955009/25/14Integrated clock architecture for improved testing
942014028958209/25/14Systems and methods for reduced constraint code data processing
952014026633809/18/14Biased bang-bang phase detector for clock and data recovery
962014026639509/18/14Ac coupling circuit with hybrid switches
972014026649709/18/14Ac coupling circuit with hybrid switches and constant load
982014026681509/18/14Lempel-ziv data compression with shortened hash chains based on repetitive patterns
992014026682009/18/14Interleaved multipath digital power amplification
1002014026700409/18/14User adjustable gesture space
1012014026838909/18/14Systems and methods for enhanced sync mark mis-detection protection
1022014026839009/18/14Systems and methods for transition based equalization
1032014026839109/18/14Data sequence detection in band-limited channels using cooperative sequence equalization
1042014026839709/18/14Hardware support of servo format with two preamble fields
1052014026840009/18/14Systems and methods for loop feedback
1062014026840109/18/14Systems and methods for p-distance based priority data processing
1072014026904809/18/14Retention detection and/or channel tracking policy in a flash memory based storage system
1082014026905309/18/14Nonvolatile memory data recovery after power failure
1092014026988809/18/14Adaptive continuous time linear equalizer
1102014026997809/18/14Interleaved multipath digital power amplification
1112014028041709/18/14Linear phase fir biorthogonal wavelet filters with complementarity for image noise reduction
1122014028041809/18/14Numerical method: making the infinite, finite. a universal transform and system of force vector
1132014028042909/18/14Efficient hardware structure for sorting/adding multiple inputs assigned to different bins
1142014028105709/18/14Unified message-based communications
1152014028108309/18/14Enhanced queue management
1162014028110609/18/14Direct routing between address spaces through a nontransparent peripheral component interconnect express bridge
1172014028114309/18/14Reducing flash memory write amplification and latency
1182014028117109/18/14Lock-free communication storage request reordering
1192014028128109/18/14Host command based read disturb methodology
1202014028162709/18/14Device sleep partitioning and keys
1212014028168809/18/14Method and system of data recovery in a raid controller
1222014028170309/18/14Local repair signature handling for repairable memories
1232014028176709/18/14Recovery strategy that reduces errors misidentified as reliable
1242014028178709/18/14Min-sum based hybrid non-binary low density parity check decoder
1252014028181809/18/14Method for format savings in coherently written fragmented sectors
1262014028182209/18/14Method and generation of soft decision error correction code information
1272014028184109/18/14Systems and methods for sync mark mis-detection protection
1282014028314609/18/14Tamper sensor
1292014025320309/11/14Programmable clock spreading
1302014025322209/11/14Preventing electronic device counterfeits
1312014025322609/11/14Power integrity control through active current profile management
1322014025404109/11/14Servo marginalization
1332014025404309/11/14Sampling-phase acquisition based on channel-impulse-response estimation
1342014025459309/11/14Network processor having multicasting protocol
1352014025465509/11/14Adaptation of equalizer settings using error signals sampled at several different phases
1362014025473509/11/14Transmit reference signal cleanup within a synchronous network application
1372014025837509/11/14System and large object cache management in a network
1382014025856509/11/14Smart discovery model in a serial attached small computer system topology
1392014025857209/11/14Preemptive connection switching for serial attached small computer system interface systems
1402014025858709/11/14Self recovery in a solid state drive
1412014025859509/11/14System, method and computer-readable medium for dynamic cache sharing in a flash-based caching solution supporting virtual machines
1422014025859809/11/14Scalable storage devices
1432014025861009/11/14Raid cache memory system with volume windows
1442014025861309/11/14Volume change flags for incremental snapshots of stored data
1452014025862809/11/14System, method and computer-readable medium for managing a cache store to achieve improved cache ramp-up across system reboots
1462014025875509/11/14Storage device power failure infrastructure
1472014025875909/11/14System and de-queuing an active queue
1482014025876909/11/14Partial r-block recycling
1492014024751409/04/14Systems and methods for adc sample based inter-track interference compensation
1502014025024609/04/14Intelligent data buffering between interfaces
1512014025026309/04/14Techniques for reducing memory write operations using coalescing memory buffers and difference information
1522014025026909/04/14Declustered raid pool as backup for raid volumes
1532014025031509/04/14Storage system data hardening
1542014025033809/04/14Virtual function timeout for single root input/output virtualization controllers
1552014025035209/04/14Systems and methods for signal reduction based data processor marginalization
1562014024003308/28/14On-die programming of integrated circuit bond pads
1572014024046708/28/14Image processing elimination of depth artifacts
1582014024086408/28/14Storage device having degauss circuitry configured for generating degauss signal with asymmetric decay envelopes
1592014024087008/28/14Analog tunneling current sensors for use with disk drive storage devices
1602014024102808/28/14Two-bit read-only memory cell
1612014024105608/28/14Reduced complexity reliability computations for flash memories
1622014024106108/28/14Fast access with low leakage and low power technique for read only memory devices
1632014024106208/28/14Modular, scalable rigid flex memory module
1642014024147808/28/14Timing phase estimation for clock and data recovery
1652014024487508/28/14Priority based connection arbitration in a sas topology to facilitate quality of service (qos) in sas transport
1662014024490108/28/14Metadata management for a flash drive
1672014024490208/28/14Fast read in write-back cached memory
1682014024492608/28/14Dedicated memory structure for sector spreading interleaving
1692014024492808/28/14Method and system to provide data protection to raid 0/ or degraded redundant virtual disk
1702014024493608/28/14Maintaining cache coherency between storage controllers
1712014024508608/28/14Test signal generator for low-density parity-check decoder
1722014024509308/28/14Master boot record protection in a solid state drive
1732014024530008/28/14Dynamically balanced credit for virtual functions in single root input/output virtualization
1742014024540808/28/14Biometric approach to track credentials of anonymous user of a mobile device
1752014023312808/21/14Systems and methods for burst demodulation
1762014023312908/21/14Noise predictive filter adaptation for inter-track interference cancellation
1772014023313008/21/14Systems and methods for determining noise components in a signal set
1782014023330208/21/14Write-tracking circuitry for memory devices
1792014023332208/21/14Adaptive architecture in a channel detector for nand flash channels
1802014023356708/21/14High speed network bridging
1812014023361908/21/14Pattern-based loss of signal detector
1822014023366808/21/14Code forwarding and clock generation for transmitter repeaters
1832014023716208/21/14Non-volatile memory channel control using a general purpose programmable processor in combination with a low level programmable sequencer
1842014023716308/21/14Reducing writes to solid state drive cache memories of storage controllers
1852014023716608/21/14Higher-level redundancy information computation
1862014023719308/21/14Cache window management
1872014023731308/21/14Systems and methods for trapping set disruption
1882014023731408/21/14Systems and methods for skip layer data decoding
1892014023732908/21/14Ratio-adjustable sync mark detection system
1902014022566908/14/14Extended variable gain amplification bandwidth with high-frequency boost
1912014022622908/14/14Systems and methods for shared layer data decoding
1922014022623308/14/14Storage device with reflection compensation circuitry
1932014022623408/14/14System and providing controllable steady state current waveshaping in a hard disk drive (hdd) preamplifier
1942014022685408/14/14Three-dimensional region of interest tracking based on key frame matching
1952014022689508/14/14Feature point based robust three-dimensional rigid body registration
1962014022796908/14/14Indium tin oxide loop antenna for near field communication
1972014022807308/14/14Automatic presentation of an image from a camera responsive to detection of a particular type of movement of a user device
1982014022965108/14/14Managing arbitration in mixed link rate wide ports
1992014022965208/14/14Methods and structure for fast context switching among a plurality of expanders in a serial attached scsi domain
2002014022965808/14/14Cache load balancing in storage controllers
2012014022967008/14/14Cache coherency and synchronization support in expanders in a raid topology with multiple initiators
2022014022967608/14/14Rebuild of redundant secondary storage cache
2032014022970008/14/14Systems and methods for accommodating end of transfer request in a data storage device
2042014022973308/14/14System and key wrapping to allow secure access to media by multiple authorities with modifiable permissions
2052014022975708/14/14Restoring expander operations in a data storage switch
2062014022976908/14/14Methods and structure for single root input/output virtualization enhancement in peripheral component interconnect express systems
2072014022977808/14/14At-speed scan testing of interface functional logic of an embedded memory or other circuit core
2082014022979908/14/14Statistical adaptive error correction for a flash memory
2092014022980608/14/14Systems and methods for distributed low density parity check decoding
2102014022994108/14/14Method and controller device for quality of service (qos) caching in a virtualized environment
2112014022995408/14/14Systems and methods for data quality based variable data process scheduling
2122014021902808/07/14Compensation loop for read voltage adaptation
2132014022076008/07/14Integration of shallow trench isolation and through-substrate vias into integrated circuit designs
2142014022307108/07/14Method and system for reducing write latency in a data storage system by using a command-push model
2152014022307208/07/14Tiered caching using single level cell and multi-level cell flash technology
2162014022307508/07/14Physical-to-logical address map to speed up a recycle operation in a solid state drive
2172014022309408/07/14Selective raid protection for cache memory
2182014022310608/07/14Method to throttle rate of data caching for improved i/o performance
2192014022311408/07/14Buffer for managing data samples in a read channel
2202014022313608/07/14Lookup tables utilizing read only memory and combinational logic
2212014022325908/07/14Memory architecture for layered low-density parity-check decoder
2222014022326708/07/14Radix-4 viterbi forward error correction decoding
2232014022327008/07/14Classifying bit errors in transmitted run length limited data
2242014022329508/07/14Geographic based spell check
2252014021133607/31/14Automatic gain control loop adaptation for enhanced nyquist data pattern detection
2262014021133707/31/14Systems and methods for improved short media defect detection
2272014021183907/31/14Receiver having limiter-enhanced data eye openings
2282014021474807/31/14Incremental dfa compilation with single rule granularity
2292014021474907/31/14System and dfa-nfa splitting
2302014021509007/31/14Dfa sub-scans
2312014021512307/31/14Controller-opaque communication with non-volatile memory devices
2322014021514907/31/14File-system aware snapshots of stored data
2332014021519907/31/14Fast-boot list to speed booting an operating system
2342014021528507/31/14Integrated-interleaved low density parity check (ldpc) codes
2352014021534107/31/14Transitioning between pages of content on a display of a user device
2362014020465907/24/14Capacitive coupled sense amplifier biased at maximum gain point
2372014020466007/24/14Memory having sense amplifier for output tracking by controlled feedback latch
2382014020468307/24/14Margin free pvt tolerant fast self-timed sense amplifier reset circuit
2392014020498707/24/14System and determining channel loss in a dispersive communication channel at the nyquist frequency
2402014020499507/24/14Efficient region of interest detection
2412014020500507/24/14Method and mpeg-2 to h.264 video transcoding
2422014020774307/24/14Method for storage driven de-duplication of server memory
2432014020799607/24/14Hybrid hard disk drive having a flash storage processor
2442014020800307/24/14Variable-size flash translation layer
2452014020800407/24/14Translation layer partitioned between host and controller
2462014020800507/24/14System, method and computer-readable medium for providing selective protection and endurance improvements in flash-based cache
2472014020800707/24/14Management of and region selection for writes to non-volatile memory
2482014020802407/24/14System and methods for performing embedded full-stripe write operations to a data volume with data elements distributed across multiple modules
2492014020804607/24/14Storage device out-of-space handling


ARCHIVE: New 2015 2014 2013 2012 2011 2010 2009



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This listing is an abstract for educational and research purposes is only meant as a recent sample of applications filed, not a comprehensive history. Freshpatents.com is not affiliated or associated with Lsi Corporation in any way and there may be associated servicemarks. This data is also published to the public by the USPTO and available for free on their website. Note that there may be alternative spellings for Lsi Corporation with additional patents listed. Browse our Agent directory for other possible listings. Page by FreshPatents.com

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