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Lsi Corporation patents


Recent patent applications related to Lsi Corporation. Lsi Corporation is listed as an Agent/Assignee. Note: Lsi Corporation may have other listings under different names/spellings. We're not affiliated with Lsi Corporation, we're just tracking patents.

ARCHIVE: New 2016 2015 2014 2013 2012 2011 2010 2009 | Company Directory "L" | Lsi Corporation-related inventors




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Date Lsi Corporation patents (updated weekly) - BOOKMARK this page
08/25/16 new patent  Image processor with multi-channel interface between preprocessing layer and one or more higher layers
08/25/16 new patent  Depth image generation utilizing depth information reconstructed from an amplitude image
08/11/16Motion compensation depth images
07/21/16Radio frequency bitstream generator and combiner providing image rejection
05/19/16Data rate and pvt adaptation with programmable bias control in a serdes receiver
03/31/16Systems and methods for power reduced data decoder scheduling
03/24/16Decoder with targeted symbol flipping recovery of miscorrected codewords
03/10/16Adaptive termination tuning with biased phase detector in a serdes receiver
02/25/16Single-sideband transmitter using class-s amplifier
02/04/16Host-based device driver splitting of input/out for redundant array of independent disks systems
02/04/16Host-based device drivers for enhancing operations in redundant array of independent disks systems
02/04/16Slice-based random access buffer for data interleaving
02/04/16Skew-tolerant multiple-reader array in array-reader based magnetic recording
01/28/16Block i/o interface for a host bus adapter that utilizes nvdram
01/28/16Selective mirroring in caches for logical volumes
01/28/16Storage controller and managing metadata operations in a cache
01/28/16Image processor comprising gesture recognition system with static hand pose recognition based on dynamic warping
01/28/16Image processor with edge-preserving noise suppression functionality
01/28/16Systems and methods for rank independent cyclic data encoding
01/28/16Configurable transmitter hardware block and methods
01/21/16Raid system for processing i/o requests utilizing xor commands
01/21/16Systems and methods for self test circuit security
01/21/16Low density parity check decoder with relative indexing
01/14/16Serial port communication for storage device using single bidirectional serial data line
01/07/16Caching systems and methods with simulated nvdram
01/07/16Storage controller and managing modified data flush operations from a cache
01/07/16Caching systems and methods with simulated nvdram
01/07/16Image processor with evaluation layer implementing software and hardware algorithms of different precision
01/07/16Methods and merging depth images generated using distinct depth imaging techniques
12/31/15Adaptive filter-based narrowband interference detection, estimation and cancellation
12/31/15Multi-level enumerative encoder and decoder
12/31/15Eliminating systematic imbalances and reducing circuit parameter variations in high gain amplifiers
12/31/15Configurable generic filter hardware block and methods
12/31/15Adaptive cancellation of voltage offset in a communication system
12/24/15Local reconnection attempts for serial attached small computer system interface expanders
12/24/15On-die error detection and correction during multi-step programming
12/17/15Cell-to-cell program interference aware data recovery when ecc fails with an optimum read reference voltage
12/17/15Write back caching of boot disk in a uefi environment
12/17/15Inter-cell interference estimation based on a pattern dependent histogram
12/10/15Target image generation utilizing a functional based on functions of information from other images
12/03/15Dwell timers for serial attached small computer system interface devices
12/03/15Forced map entry flush to prevent return of old data
12/03/15Storage controller and managing metadata in a cache store
12/03/15Memory banks with shared input/output circuitry
12/03/15Scalable mapping with integrated summing of samples for multiple streams in a radio interface frame
12/03/15Selecting floating tap positions in a floating tap equalizer
12/03/15Pll scan hdtv products
11/26/15Fixed point conversion of llr values based on correlation
11/19/15Method to dynamically update llrs in an ssd drive and/or controller
11/19/15Coordination techniques for redundant array of independent disks storage controllers
11/19/15Sideband logic for monitoring pcie headers
11/19/15Memory cell having built-in read and write assist
11/19/15Voltage comparator
11/12/15System for reducing test time using embedded test compression cycle balancing
11/12/15Storage system having fifo storage and reserved storage
11/12/15Temporal tracking of cache data
11/12/15System and methods for efficient i/o processing using multi-level out-of-band hinting
11/12/15Multi-dimensional optimization of read channel
11/05/15System and life management for low endurance ssd nand devices used as secondary cache
11/05/15Systems and methods for efficient data refresh in a storage device
11/05/15Logical volume migration in single server high availability environments
11/05/15Multiplexed communication in a storage device
11/05/15Multiplexed synchronous serial port communication with skew control for storage device
11/05/15Electromagnetic energy transfer using tunable inductors
11/05/15Slicer trim methodology and device
10/29/15Selectively configuring hard-disk drive system
10/29/15Data recovery once ecc fails to correct the data
10/29/15Data scrambling initialization
10/29/15Decision feedback equalization slicer with enhanced latch sensitivity
10/29/15Simplified and effective offset calibration circuit for rxlos in serdes
10/22/15Flash-based data storage with dual map-based serialization
10/22/15Data storage system with caching using application field to carry data block protection information
10/22/15Front-end architecture for image processing
10/22/15Cross-talk measurement in array reader magnetic recording system
10/22/15Word line decoders for dual rail static random access memories
10/22/15Method and system for an organic light emitting diode structure
10/22/15Systems and methods for puncture based data protection
10/22/15Systems and methods for protected portion data processing
10/15/15Soft read handling of read noise
10/15/15Online histogram and soft information learning
10/08/15Read policy for system data of solid state drives
10/08/15System, method and computer-readable medium for dynamically configuring an operational mode in a storage controller
10/08/15Systems and methods for differential message scaling in a decoding process
10/08/15Error correction code (ecc) selection in nand flash controllers with multiple error correction codes
10/08/15Arbitration monitoring for serial attached small computer system interface systems during discovery
10/08/15Device abstracted zone management of serial attached small computer system interface topologies
10/08/15Bad memory unit detection in a solid state drive
10/01/15Locking a disk-locked clock using timestamps of successive servo address marks in a spiral servo track
10/01/15Systems and methods for skew tolerant multi-head data processing
10/01/15Adaptive calibration of noise predictive finite impulse response filter based on decoder convergence
09/24/15Read disturb handling in nand flash
09/24/15Write redirection in redundant array of independent disks systems
09/24/15Multiple core execution trace buffer
09/24/15System and elastic despreader memory management
09/24/15System and employing signoff-quality timing analysis information concurrently in multiple scenarios to reduce total power within a circuit design
09/24/15Dynamic hand gesture recognition with selective enabling based on detected hand velocity
09/24/15Memory sense amplifier and column pre-charger
09/17/15Data transformations to improve rom yield and programming time
09/17/15Systems and methods for distortion characterization
09/17/15Systems and methods for head position estimation
09/17/15Low power hit bitline driver for content-addressable memory
09/17/15Method and system for reducing memory test time utilizing a built-in self-test architecture
09/17/15Method for fabricating equal height metal pillars of different diameters
09/17/15Method for fabricating equal height metal pillars of different diameters
09/17/15Systems and methods for voltage level shifting in a device
09/17/15Cdr relock with corrective integral register seeding
09/10/15Track misregistration sensitive initialization of joint equalizer
09/10/15Non-decision directed magnetoresistive asymetry estimation
09/10/15Online iteration resource allocation for large sector format drive
09/10/15Bit line write assist for static random access memory architectures
09/10/15Soft decoding of polar codes
09/10/15Integrated pam4/nrz n-way parallel digital unrolled decision feedback equalizer (dfe)
09/10/15Group delay based back channel post cursor adaptation
09/03/15Serdes pvt detection and closed loop adaptation
08/27/15Storage workload hinting
08/27/15System and image processing
08/27/15Systems and methods for multi-head separation determination
08/27/15Systems and methods for synchronization hand shaking in a storage device
08/27/15Reading data from hard disks having reduced preambles
08/27/15Systems and methods for multi-head servo data processing
08/27/15Adjusting log likelihood ratio values to compensate misplacement of read voltages
08/27/15Copper wire bonding apparatus using a purge gas to enhance ball bond reliability
08/27/15Method for flip-chip bonding using copper pillars
08/20/15Baud rate phase detector with no error latches
08/20/15System to control a width of a programming threshold voltage distribution width when writing hot-read data
08/20/15Refresh, run, aggregate decoder recovery
08/20/15Method and pre-cursor intersymbol interference correction
08/13/15Systems and methods for last written page handling in a memory device
08/13/15Decoding electronic non-volatile computer storage apparatus
08/13/15Hot-read data aggregation and code selection
08/13/15Method to facilitate fast context switching for partial and extended path extension to remote expanders
08/13/15Zero phase start estimation in readback signals
08/13/15Read channel sampling utilizing two quantization modules for increased sample bit width
08/13/15Systems and methods for end of fragment marker based data alignment
08/13/15Systems and methods for area efficient data encoding
08/13/15Systems and methods for rank deficient encoding
08/13/15Mitigation of write errors in multi-level cell flash memory through adaptive error correction code decoding
08/06/15Gesture recognition system with finite state machine control of cursor detector and dynamic gesture detector
08/06/15Systems and methods for hard error reduction in a solid state memory device
08/06/15System, method and computer-readable medium for dynamically mapping a non-volatile memory store
08/06/15System for execution of security related functions
08/06/15Image processor with edge selection functionality
08/06/15Reader separation dependent linear and track density push for array reader based magnetic recording
07/30/15Integrated read/write tracking in sram
07/23/15High density mapping for multiple converter samples in multiple lane interface
07/23/15Method and image enhancement and edge verificaton using at least one additional image
07/23/15Area-efficient, high-speed, dynamic-circuit-based sensing scheme for dual-rail sram memories
07/23/15Modular low power serializer-deserializer
07/23/15Multi-core architecture for low latency video decoder
07/16/15System and providing data services in direct attached storage via multiple de-clustered raid pools
07/16/15Interleaving codewords over multiple flash planes
07/16/15Framework for balancing robustness and latency during collection of statistics from soft reads
07/16/15Fault detection and identification in a multi-initiator system
07/16/15Intelligent i/o cache rebuild in a storage controller
07/16/15Enhanced ssd caching
07/16/15Multiple track detection
07/16/15Segmented digital-to-analog converter with overlapping segments
07/09/15System and using clock chain signals of an on-chip clock controller to control cross-domain paths
07/09/15Capacitance coupling parameter estimation in flash memories
07/09/15Receiver with pipelined tap coefficients and shift control
07/09/15Enhancing active link utilization in serial attached scsi topologies
07/02/15Method and detecting the initiator/target orientation of a smart bridge
07/02/15Two-dimensional magnetic recording reader offset estimation
07/02/15Systems and methods for multi-head balancing in a storage device
07/02/15Clock recovery using quantized phase error samples using jitter frequency-dependent quantization thresholds and loop gains
07/02/15Systems and methods for efficient targeted symbol flipping
06/25/15Method to distribute user data and error correction data over different page types by leveraging error rate variations
06/25/15Preventing programming errors from occurring when programming flash memory cells
06/25/15System for efficient caching of swap i/o and/or similar i/o pattern(s)
06/25/15Attribute-based assistance request system for sequentially contacting nearby contacts without having them divulge their presence or location
06/25/15Servo channel with equalizer adaptation
06/25/15Systems and methods of converting detector output to multi-level soft information
06/18/15System and methods for caching a small size i/o to improve caching device endurance
06/18/15Skew-aware disk format for array reader based magnetic recording
06/18/15Systems and methods for ati characterization
06/11/15Systems and methods for multi-dimensional data processor operational marginalization
06/11/15Method and system for programmable sequencer for processing i/o for various pcie disk drives
06/11/15Slice formatting and interleaving for interleaved sectors
06/11/15Multiple retry reads in a read channel of a memory
06/11/15Illumination-based charging system for portable devices
06/11/15Low complexity tone/voice discrimination method using a rising edge of a frequency power envelope
06/04/15System and method to interleave memory
06/04/15Wide port emulation at serial attached scsi expanders
06/04/15Area-efficient process-and-temperature-adaptive self-time scheme for performance and power improvement
05/28/15Integrated frequency multiplier and slot antenna
05/28/15Gesture recognition method and apparatus utilizing asynchronous multithreaded processing
05/28/15Incremental updates for ordered multi-field classification rules when represented by a tree of longest prefix matching tables
05/28/15Eliminating or reducing programming errors when programming flash memory cells
05/28/15Read retry for non-volatile memories
05/28/15Bit-line defect detection using unsatisified parity code checks
05/28/15Decoding with log likelihood ratios stored in a controller
05/28/15Flash channel with selective decoder likelihood dampening
05/21/15Current to voltage converter
05/21/15Interleaved write assist for hierarchical bitline sram architectures
05/21/15Memory architecture with alternating segments and multiple bitlines
05/21/15Global bitline write assist for sram architectures
05/21/15Image processor with static pose recognition module utilizing segmented region of interest
05/21/15I/o request mirroring in a clustered storage system
05/21/15Systems and methods for faid follower decoding
05/21/15Systems and methods for soft decision generation in a solid state memory system
05/14/15Incremental programming pulse optimization to reduce write errors
05/14/15Systems and methods for lost synchronization data set reprocessing
05/14/15Decoupling host and device address maps for a peripheral component interconnect express controller
05/14/15System and write hole protection for a multiple-node storage cluster
05/14/15Dynamic per-decoder control of log likelihood ratio and decoding parameters
05/14/15Detection/erasure of random write errors using converged hard decisions
05/07/15Updated io memory management unit identity settings for dma remapping
05/07/15Reduction or elimination of a latency penalty associated with adjusting read thresholds for non-volatile memory
05/07/15Device quality metrics using unsatisfied parity checks
04/30/15Systems and methods for sub-zero threshold characterization in a memory cell
04/30/15Method and system for session based data monitoring for wireless edge content caching networks
04/30/15Data interface for point-to-point communications between devices
04/30/15Tracking and utilizing second level map index for recycling of solid state drive blocks
04/30/15Method of managing aligned and unaligned data bands in a self encrypting solid state drive
04/30/15Systems and methods for internal disk drive data compression
04/23/15Closed-loop adaptive voltage scaling for integrated circuits
04/23/15Transmitter training using receiver equalizer coefficients
04/23/15Systems and methods for latency based data recycling in a solid state memory system
04/23/15System and detecting server removal from a cluster to enable fast failover of storage
04/23/15Systems and methods for soft data utilization in a solid state memory system
04/23/15Sending failure information from a solid state drive (ssd) to a host device
04/23/15Generating soft decoding information for flash memory error correction using hard decision patterns
04/16/15Memory array architectures having memory cells with shared write assist circuitry
04/16/15Digital frequency band detector for clock and data recovery
04/16/15De-interleaving on an as-needed basis
04/16/15Speculative bit error rate calculator
04/16/15Systems and methods for multi-algorithm concatenation encoding and decoding
04/09/15Voltage follower having a feed-forward device
04/09/15Adaptive power-down of disk drives based on predicted idle time
04/02/15Reducing current variation when switching clocks
04/02/15Non-binary layered low density parity check decoder
04/02/15Flash memory reference voltage detection with tracking of cross-points of cell voltage distributions using histograms
03/26/15System and monitoring preamble signal quality
03/26/15Ping-pong buffer using single-port memory
03/26/15Bit-line discharge assistance in memory devices
03/26/15Method of calibrating a slicer in a receiver or the like
03/26/15Solid state drives that cache boot data
03/26/15Dynamic storage volume configuration based on input/output requests
03/26/15Systems and methods for enhanced data recovery in a solid state memory system
03/19/15Voltage follower amplifier
03/19/15Reduced polar codes
03/19/15Sensing technique for single-ended bit line memory architectures
03/19/15Systems and methods for recovered data stitching
03/19/15In-line deduplication for a network and/or storage platform
03/19/15Systems and methods for fragmented data recovery
03/19/15Method of erase state handling in flash channel tracking
03/19/15Spatially decoupled redundancy schemes for a solid state drive (ssd)
03/12/15Array-reader based magnetic recording systems with mixed synchronization
03/12/15Active recycling for solid state drive



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