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Lsi Corporation
Lsi Corporation_20100107
Lsi Corporation_20100114
Lsi Corporation_20100128
Lsi Corporation_20131212


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Lsi Corporation patents

Recent patent applications related to Lsi Corporation. Lsi Corporation is listed as an Agent/Assignee. Note: Lsi Corporation may have other listings under different names/spellings. We're not affiliated with Lsi Corporation, we're just tracking patents.

ARCHIVE: New 2015 2014 2013 2012 2011 2010 2009 | Company Directory "L" | Lsi Corporation-related inventors

Sending failure information from a solid state drive (ssd) to a host device


Sending failure information from a solid state drive (ssd) to a host device

Search recent Press Releases: Lsi Corporation-related press releases
Count Application # Date Lsi Corporation patents (updated weekly) - BOOKMARK this page
12015010905204/23/15 new patent  Closed-loop adaptive voltage scaling for integrated circuits
22015011016504/23/15 new patent  Transmitter training using receiver equalizer coefficients
32015011320504/23/15 new patent  Systems and methods for latency based data recycling in a solid state memory system
42015011331204/23/15 new patent  System and detecting server removal from a cluster to enable fast failover of storage
52015011331804/23/15 new patent  Systems and methods for soft data utilization in a solid state memory system
62015011333504/23/15 new patent  Sending failure information from a solid state drive (ssd) to a host device
72015011335404/23/15 new patent  Generating soft decoding information for flash memory error correction using hard decision patterns
82015010360404/16/15Memory array architectures having memory cells with shared write assist circuitry
92015010396104/16/15Digital frequency band detector for clock and data recovery
102015010657704/16/15De-interleaving on an as-needed basis
112015010666604/16/15Speculative bit error rate calculator
122015010667504/16/15Systems and methods for multi-algorithm concatenation encoding and decoding
132015009761104/09/15Voltage follower having a feed-forward device
142015010081004/09/15Adaptive power-down of disk drives based on predicted idle time
152015009162004/02/15Reducing current variation when switching clocks
162015009229004/02/15Non-binary layered low density parity check decoder
172015009248904/02/15Flash memory reference voltage detection with tracking of cross-points of cell voltage distributions using histograms
182015008539203/26/15System and monitoring preamble signal quality
192015008558703/26/15Ping-pong buffer using single-port memory
202015008559203/26/15Bit-line discharge assistance in memory devices
212015008595703/26/15Method of calibrating a slicer in a receiver or the like
222015008910203/26/15Solid state drives that cache boot data
232015008913203/26/15Dynamic storage volume configuration based on input/output requests
242015008933003/26/15Systems and methods for enhanced data recovery in a solid state memory system
252015007718803/19/15Voltage follower amplifier
262015007727703/19/15Reduced polar codes
272015007810303/19/15Sensing technique for single-ended bit line memory architectures
282015008162603/19/15Systems and methods for recovered data stitching
292015008164903/19/15In-line deduplication for a network and/or storage platform
302015008211503/19/15Systems and methods for fragmented data recovery
312015008212103/19/15Method of erase state handling in flash channel tracking
322015008212403/19/15Spatially decoupled redundancy schemes for a solid state drive (ssd)
332015007079603/12/15Array-reader based magnetic recording systems with mixed synchronization
342015007432703/12/15Active recycling for solid state drive
352015007432803/12/15Dynamic map pre-fetching for improved sequential reads of a solid-state media
362015007435503/12/15Efficient caching of file system journals
372015007450103/12/15Cascaded viterbi bitstream generator
382015006273003/05/15Array-reader based magnetic recording systems with quadrature amplitude modulation
392015006273203/05/15Systems and methods for two stage tone reduction
402015006273403/05/15Systems and methods for multi-level encoding and decoding
412015006273703/05/15Adaptive pattern detection for pattern-dependent write current control in a magnetic recording system
422015006273803/05/15Systems and methods for variable sector count spreading and de-spreading
432015006321703/05/15Mapping between variable width samples and a frame
442015006725303/05/15Input/output request shipping in a storage system with multiple storage controllers
452015006734903/05/15Virtual bands concentration for self encrypting drives
462015006768503/05/15Systems and methods for multiple sensor noise predictive filtering
472015005524902/26/15Systems and methods for multi-resolution data sensing
482015005564402/26/15Precise timestamping of ethernet packets by compensating for start-of-frame delimiter detection delay and delay variations
492015005577402/26/15Echo cancellation with quantization compensation
502015005853302/26/15Data storage controller and exposing information stored in a data storage controller to a host system
512015005855702/26/15Performance improvements in input / output operations between a host system and an adapter-coupled cache
522015005869302/26/15Systems and methods for enhanced data encoding and decoding
532015004831002/19/15System and providing an electron blocking layer with doping control
542015004240302/12/15High-voltage voltage-switched class-s amplifier
552015004327002/12/15Memory cell having built-in write assist
562015004380702/12/15Depth image compression and decompression utilizing depth and amplitude data
572015004675602/12/15Predictive failure analysis to trigger rebuild of a drive in a raid array
582015003694202/05/15Object recognition and tracking using a classifier comprising cascaded stages of multiple decision trees
592015003978702/05/15Multi-protocol storage controller
602015003979602/05/15Acquiring resources from low priority connection requests in sas
612015003983202/05/15System and caching hinted data
622015003983502/05/15System and hinted cache data removal
632015003993202/05/15Arbitration suspension in a sas domain
642015003997802/05/15Systems and methods for hybrid priority based data processing
652015002960801/29/15Array-reader based magnetic recording systems with frequency division multiplexing
662015003002701/29/15Switch device with device-specified bridge domains
672015003023201/29/15Image processor configured for efficient estimation and elimination of background information in images
682015003296301/29/15Dynamic selection of cache levels
692015003306501/29/15Solid state drive emergency pre-boot application providing expanded data recovery function
702015003307401/29/15Deadlock detection and recovery in sas
712015002216901/22/15Feedback/feed forward switched capacitor voltage regulation
722015002270401/22/15Orientation-based camera operation
732015002360701/22/15Gesture recognition method and apparatus based on analysis of multiple candidate boundaries
742015002640301/22/15Self-adjusting caching system
752015002641101/22/15Cache system for managing various cache line conditions
762015002648801/22/15Selectively powering a storage device over a data network
772015002650301/22/15Appliances powered over sas
782015002653601/22/15Data decoder with trapping set flip bit mapper
792015001532901/15/15Radio frequency composite class-s power amplifier having discrete power control
802015001598401/15/15Storage media inter-track interference cancellation
812015001598601/15/15Methods and improved threshold adaptation for a euclidean detector
822015001598701/15/15Prioritized spin-up of drives
832015001649701/15/15Clock and data recovery architecture with adaptive digital phase skew
842015001979501/15/15Memory system for shadowing volatile data
852015001981801/15/15Maintaining cache size proportional to power pack charge
862015001982201/15/15System for maintaining dirty cache coherency across reboot of a node
872015000889401/08/15Dynamic start-up circuit for hysteretic loop switched-capacitor voltage regulator
882015001269901/08/15System and versioning cache for a clustering topology
892015001270201/08/15Redundant array of independent disks volume creation
902015001280001/08/15Systems and methods for correlation based data alignment
912015000681501/01/15Backup of cached dirty data during power outages
922014037995912/25/14Map recycling acceleration
932014038022312/25/14User interface comprising radial layout soft keypad
942014036771712/18/14Semiconductor optical emitting device with metallized sidewalls
952014036939512/18/14Error detection based on superheterodyne conversion and direct downconversion
962014036969612/18/14Color coding and optical sub-band communication utilizing color coding
972014037263712/18/14Pcie tunneling through sas
982014037267212/18/14System and providing improved system performance by moving pinned data to open nand flash interface working group modules while the system is in a running state
992014037278312/18/14System and providing dynamic charge current based on maximum card power
1002014037282812/18/14Systems and methods for hybrid layer data decoding
1012014037283612/18/14Systems and methods for data processing control
1022014036228912/11/14Method and increasing frame rate of an image stream using at least one higher frame rate image stream
1032014036246312/11/14Timing error detector with diversity loop detector decision feedback
1042014035921612/04/14Confirmed divert bitmap to synchronize raid firmware operations with fast-path hardware i/o processing
1052014035926612/04/14Optimizing boot time of a storage system
1062014035939412/04/14Apparatus for processing signals carrying modulation-encoded parity bits
1072014034819711/27/14Semiconductor optical emitting device with lens structure formed in a cavity of a substrate of the device
1082014034947511/27/14Moisture barrier for a wire bond
1092014035148611/27/14Variable redundancy in a solid state drive
1102014035167111/27/14Shift register-based layered low density parity check decoder
1112014034078011/20/14Method and system for sliding-window based phase, gain, frequency and dc offset estimation for servo channel
1122014034123111/20/14Lane-based multiplexing for physical links in serial attached small computer system interface architectures
1132014034449211/20/14Methods and systems for reducing spurious interrupts in a data storage system
1142014034461611/20/14Techniques for providing data redundancy after reducing memory writes
1152014034496011/20/14Selective control of on-chip debug circuitry of embedded processors
1162014033427811/13/14Systems and methods for energy based head contact detection
1172014033428011/13/14Systems and methods for characterizing head contact
1182014033428111/13/14Systems and methods for data processor marginalization based upon bit error rate
1192014033449111/13/14Prediction based methods for fast routing of ip flows using communication/network processors
1202014033754011/13/14Method and system for i/o flow management for pcie devices
1212014033758311/13/14Intelligent cache window management for storage systems
1222014033767611/13/14Systems and methods for processing data with microcontroller based retry features
1232014033100111/06/14Command barrier for a solid state drive controller
1242014033109611/06/14Cross-decoding for non-volatile storage
1252014033110811/06/14Systems and methods for detecting media flaws
1262014032511710/30/14Flash translation layer with lower write amplification
1272014032514410/30/14Protection information initialization
1282014032514510/30/14Cache rebuilds based on tracking data for cache entries
1292014032514610/30/14Creating and managing logical volumes from unused space in raid disk groups
1302014032530310/30/14Systems and methods for protected data encoding
1312014031237210/23/14Semiconductor optical emitting device with grooved substrate providing multiple angled light emission paths
1322014031247510/23/14Die reuse in electrical circuits
1332014031361010/23/14Systems and methods selective complexity data decoding
1342014031394610/23/14Non-linear interference cancellation for wireless transceivers
1352014031417610/23/14Non-linear modeling of a physical system using two-dimensional look-up table with bilinear interpolation
1362014031418110/23/14Non-linear modeling of a physical system using look-up table with polynomial interpolation
1372014031426510/23/14Headphones with rotatable speaker arranged within housing of earpiece assembly
1382014031675210/23/14Non-linear modeling of a physical system using direct optimization of look-up table values
1392014031716310/23/14Vector processor having instruction set with sliding window non-linear convolutional function
1402014031733410/23/14Storage of gate training parameters for devices utilizing random access memory
1412014031734610/23/14Redundant array of independent disks systems that utilize spans with different storage device counts for a logical volume
1422014031737610/23/14Digital processor having instruction set with complex angle function
1432014030734510/16/14Systems and methods for preventing adjacent track erasure
1442014030114310/09/14Techniques for controlling recycling of blocks of memory
1452014030446410/09/14Methods and systems for performing deduplication in a data storage system
1462014030456210/09/14Method for testing paths to pull-up and pull-down of input/output pads
1472014029229810/02/14Operational amplifier-based current-sensing circuit for dc-dc voltage converters and the like
1482014029812310/02/14Scan chain reconfiguration and repair
1492014029812910/02/14Generating partially sparse generator matrix for a quasi-cyclic low-density parity-check encoder
1502014029813110/02/14Priori information based post-processing in low-density parity-check code decoders
1512014029814810/02/14Trend-analysis scheme for reliably reading data values from memory
1522014028591809/25/14Systems and methods for quality based bit error rate prediction
1532014028610209/25/14Method of optimizing solid state drive soft retry voltages
1542014028614909/25/14Automatic on-drive sync-mark search and threshold adjustment
1552014028638509/25/14Systems and methods for multi-dimensional signal equalization
1562014028945009/25/14Dynamic log likelihood ratio quantization for solid state drive controllers
1572014028955009/25/14Integrated clock architecture for improved testing
1582014028958209/25/14Systems and methods for reduced constraint code data processing
1592014026633809/18/14Biased bang-bang phase detector for clock and data recovery
1602014026639509/18/14Ac coupling circuit with hybrid switches
1612014026649709/18/14Ac coupling circuit with hybrid switches and constant load
1622014026681509/18/14Lempel-ziv data compression with shortened hash chains based on repetitive patterns
1632014026682009/18/14Interleaved multipath digital power amplification
1642014026700409/18/14User adjustable gesture space
1652014026838909/18/14Systems and methods for enhanced sync mark mis-detection protection
1662014026839009/18/14Systems and methods for transition based equalization
1672014026839109/18/14Data sequence detection in band-limited channels using cooperative sequence equalization
1682014026839709/18/14Hardware support of servo format with two preamble fields
1692014026840009/18/14Systems and methods for loop feedback
1702014026840109/18/14Systems and methods for p-distance based priority data processing
1712014026904809/18/14Retention detection and/or channel tracking policy in a flash memory based storage system
1722014026905309/18/14Nonvolatile memory data recovery after power failure
1732014026988809/18/14Adaptive continuous time linear equalizer
1742014026997809/18/14Interleaved multipath digital power amplification
1752014028041709/18/14Linear phase fir biorthogonal wavelet filters with complementarity for image noise reduction
1762014028041809/18/14Numerical method: making the infinite, finite. a universal transform and system of force vector
1772014028042909/18/14Efficient hardware structure for sorting/adding multiple inputs assigned to different bins
1782014028105709/18/14Unified message-based communications
1792014028108309/18/14Enhanced queue management
1802014028110609/18/14Direct routing between address spaces through a nontransparent peripheral component interconnect express bridge
1812014028114309/18/14Reducing flash memory write amplification and latency
1822014028117109/18/14Lock-free communication storage request reordering
1832014028128109/18/14Host command based read disturb methodology
1842014028162709/18/14Device sleep partitioning and keys
1852014028168809/18/14Method and system of data recovery in a raid controller
1862014028170309/18/14Local repair signature handling for repairable memories
1872014028176709/18/14Recovery strategy that reduces errors misidentified as reliable
1882014028178709/18/14Min-sum based hybrid non-binary low density parity check decoder
1892014028181809/18/14Method for format savings in coherently written fragmented sectors
1902014028182209/18/14Method and generation of soft decision error correction code information
1912014028184109/18/14Systems and methods for sync mark mis-detection protection
1922014028314609/18/14Tamper sensor
1932014025320309/11/14Programmable clock spreading
1942014025322209/11/14Preventing electronic device counterfeits
1952014025322609/11/14Power integrity control through active current profile management
1962014025404109/11/14Servo marginalization
1972014025404309/11/14Sampling-phase acquisition based on channel-impulse-response estimation
1982014025459309/11/14Network processor having multicasting protocol
1992014025465509/11/14Adaptation of equalizer settings using error signals sampled at several different phases
2002014025473509/11/14Transmit reference signal cleanup within a synchronous network application
2012014025837509/11/14System and large object cache management in a network
2022014025856509/11/14Smart discovery model in a serial attached small computer system topology
2032014025857209/11/14Preemptive connection switching for serial attached small computer system interface systems
2042014025858709/11/14Self recovery in a solid state drive
2052014025859509/11/14System, method and computer-readable medium for dynamic cache sharing in a flash-based caching solution supporting virtual machines
2062014025859809/11/14Scalable storage devices
2072014025861009/11/14Raid cache memory system with volume windows
2082014025861309/11/14Volume change flags for incremental snapshots of stored data
2092014025862809/11/14System, method and computer-readable medium for managing a cache store to achieve improved cache ramp-up across system reboots
2102014025875509/11/14Storage device power failure infrastructure
2112014025875909/11/14System and de-queuing an active queue
2122014025876909/11/14Partial r-block recycling
2132014024751409/04/14Systems and methods for adc sample based inter-track interference compensation
2142014025024609/04/14Intelligent data buffering between interfaces
2152014025026309/04/14Techniques for reducing memory write operations using coalescing memory buffers and difference information
2162014025026909/04/14Declustered raid pool as backup for raid volumes
2172014025031509/04/14Storage system data hardening
2182014025033809/04/14Virtual function timeout for single root input/output virtualization controllers
2192014025035209/04/14Systems and methods for signal reduction based data processor marginalization
2202014024003308/28/14On-die programming of integrated circuit bond pads
2212014024046708/28/14Image processing elimination of depth artifacts
2222014024086408/28/14Storage device having degauss circuitry configured for generating degauss signal with asymmetric decay envelopes
2232014024087008/28/14Analog tunneling current sensors for use with disk drive storage devices
2242014024102808/28/14Two-bit read-only memory cell
2252014024105608/28/14Reduced complexity reliability computations for flash memories
2262014024106108/28/14Fast access with low leakage and low power technique for read only memory devices
2272014024106208/28/14Modular, scalable rigid flex memory module
2282014024147808/28/14Timing phase estimation for clock and data recovery
2292014024487508/28/14Priority based connection arbitration in a sas topology to facilitate quality of service (qos) in sas transport
2302014024490108/28/14Metadata management for a flash drive
2312014024490208/28/14Fast read in write-back cached memory
2322014024492608/28/14Dedicated memory structure for sector spreading interleaving
2332014024492808/28/14Method and system to provide data protection to raid 0/ or degraded redundant virtual disk
2342014024493608/28/14Maintaining cache coherency between storage controllers
2352014024508608/28/14Test signal generator for low-density parity-check decoder
2362014024509308/28/14Master boot record protection in a solid state drive
2372014024530008/28/14Dynamically balanced credit for virtual functions in single root input/output virtualization
2382014024540808/28/14Biometric approach to track credentials of anonymous user of a mobile device
2392014023312808/21/14Systems and methods for burst demodulation
2402014023312908/21/14Noise predictive filter adaptation for inter-track interference cancellation
2412014023313008/21/14Systems and methods for determining noise components in a signal set
2422014023330208/21/14Write-tracking circuitry for memory devices
2432014023332208/21/14Adaptive architecture in a channel detector for nand flash channels
2442014023356708/21/14High speed network bridging
2452014023361908/21/14Pattern-based loss of signal detector
2462014023366808/21/14Code forwarding and clock generation for transmitter repeaters
2472014023716208/21/14Non-volatile memory channel control using a general purpose programmable processor in combination with a low level programmable sequencer
2482014023716308/21/14Reducing writes to solid state drive cache memories of storage controllers
2492014023716608/21/14Higher-level redundancy information computation

ARCHIVE: New 2015 2014 2013 2012 2011 2010 2009


This listing is an abstract for educational and research purposes is only meant as a recent sample of applications filed, not a comprehensive history. is not affiliated or associated with Lsi Corporation in any way and there may be associated servicemarks. This data is also published to the public by the USPTO and available for free on their website. Note that there may be alternative spellings for Lsi Corporation with additional patents listed. Browse our Agent directory for other possible listings. Page by