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Microsemi Semiconductor Ulc patents

Recent patent applications related to Microsemi Semiconductor Ulc. Microsemi Semiconductor Ulc is listed as an Agent/Assignee. Note: Microsemi Semiconductor Ulc may have other listings under different names/spellings. We're not affiliated with Microsemi Semiconductor Ulc, we're just tracking patents.

ARCHIVE: New 2018 2017 2016 2015 2014 2013 2012 2011 2010 2009 | Company Directory "M" | Microsemi Semiconductor Ulc-related inventors

Clock recovery device with switchable transient non-linear phase adjuster

A clock recovery device recovers a master clock over a packet network from incoming synchronization packets. A frequency locked loop generates a control input to a controlled oscillator, which generates an output clock. ... Microsemi Semiconductor Ulc

Time-to-digital converter with phase-scaled course-fine resolution

A time-to-digital converter (tdc) measures a time interval Δttot between a leading signal and a triggering signal. A phase regulator incorporates a looped delay line to create pre-defined sub-intervals tnor determined by the length of the delay line. ... Microsemi Semiconductor Ulc

Multi-format driver interface

A multi-format signal driver interface has first, second and third pairs of transistors arranged in a back-to-back relationship. First transistors and second transistors of the first and second pairs of transistors form respective first and second parallel arrangement. ... Microsemi Semiconductor Ulc

Method of speeding up output alignment in a digital phase locked loop

To speed up output clock alignment in a digital phase locked loop wherein a controlled oscillator generates synthesizer pulses that are divided to produce output pulses at a predetermined normal spacing and time location, and wherein during an alignment procedure the output pulses are moved in time in response to a delay value obtained by comparing a phase of the output pulses with a phase applied to the controlled oscillator averaged over a number of synthesizer pulses in a feedback circuit to align said output pulses with a reference clock taking into account hardware delay, a group of the output pulses is advanced during the alignment procedure to reduce the spacing between them. After determining the delay value averaged over the group of output pulses subsequent output pulses are restored to their normal spacing and time locations.. ... Microsemi Semiconductor Ulc

Noise reduction in non-linear signal processing

A method for reducing the jitter introduced into a digital signal by a non-linear processing element involves applying an input word representing the digital signal to a first signal path comprising a first non-linear processing element, and a complementary version of the input word to a second signal path comprising a second non-linear processing element. A common mode dither signal is injected into each signal path upstream of the non-linear processing elements. ... Microsemi Semiconductor Ulc

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