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Netlogic Microsystems Inc patents

Recent patent applications related to Netlogic Microsystems Inc. Netlogic Microsystems Inc is listed as an Agent/Assignee. Note: Netlogic Microsystems Inc may have other listings under different names/spellings. We're not affiliated with Netlogic Microsystems Inc, we're just tracking patents.

ARCHIVE: New 2016 2015 2014 2013 2012 2011 2010 2009 | Company Directory "N" | Netlogic Microsystems Inc-related inventors




Date Netlogic Microsystems Inc patents (updated weekly) - BOOKMARK this page
03/12/15Reducing latency associated with timestamps
08/28/14Integrated circuit devices, systems and methods having automatic configurable mapping of input and/or output data connections
08/07/14Power savings in a content addressable memory device using masked pre-compare operations
07/03/14Method and handling data flow in a multi-chip environment using an interchip interface
05/29/14Secure modulation and demodulation
02/06/14System, method, and computer program product for conditionally sending a request for data to a node based on a determination
12/19/13Delegating network processor operations to star topology serial bus interfaces
11/28/13System and performing concatenation of diversely routed channels
09/26/13System and conditionally sending a request for data to a home node
06/20/13Programmable drive strength in memory signaling
05/16/13Methods and circuits for limiting bit line leakage current in a content addressable memory (cam) device
04/11/13Low-power and low-cost adaptive self-linearization system with fast convergence
03/21/13Method and device for reordering video information
01/10/13Multi-phase power system with redundancy
01/10/13Multi-phase power system with redundancy
12/20/12Systems and methods for utilizing an extended translation look-aside buffer having a hybrid memory structure
12/20/12Content addressable memory (cam) device and updating data
11/15/12Secure modulation and demodulation
11/15/12Block mapping circuit and memory device
04/12/12Delegating network processor operations to star topology serial bus interfaces
03/15/12Advanced processor with mechanism for packet distribution at high line rate
02/23/12Model based distortion reduction for power amplifiers
02/02/12System and offloading packet protocol encapsulation from software
02/02/12Distortion cancellation using adaptive linearization
02/02/12Advanced processor translation lookaside buffer management in a multithreaded system
01/19/12Method and implementing cache coherency of a processor
10/20/11Advanced processor with mechanism for fast packet queuing operations
04/14/11Output queued switch with a parallel shared memory, and operating same
01/20/11Advanced telecommunications router and crossbar switch controller
12/16/10Delegating network processor operations to star topology serial bus interfaces
12/16/10Systems and methods for utilizing an extended translation look-aside buffer having a hybrid memory structure
10/07/10System and performing concatenation of diversely routed channels







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