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Nvidia Corporation patents


Recent patent applications related to Nvidia Corporation. Nvidia Corporation is listed as an Agent/Assignee. Note: Nvidia Corporation may have other listings under different names/spellings. We're not affiliated with Nvidia Corporation, we're just tracking patents.

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 new patent  Tablet computer case with dual-hinge suspension

A tablet computer and keyboard are coupled to a tablet computer case. The tablet computer case includes a dual-hinge suspension that allows the tablet computer case to open and close with similar mechanics as a laptop computer. In particular, the dual-hinge suspension includes two hinges that open and close sequentially... Nvidia Corporation

Temporal ensembling for semi-supervised learning

A method, computer readable medium, and system are disclosed for implementing a temporal ensembling model for training a deep neural network. The method for training the deep neural network includes the steps of receiving a set of training data for a deep neural network and training the deep neural network... Nvidia Corporation

Stable ray tracing

A method, computer readable medium, and system are disclosed for performing stable ray tracing. The method includes the steps of identifying a plurality of old hit points used in a previously rendered frame, re-projecting the plurality of old hit points within a current frame to create a plurality of samples... Nvidia Corporation

Monitoring execution in a graphics processing unit

Marker commands are added to a stream of commands that are executed by a graphics processing unit (GPU) in a computing system. While the GPU executes the commands, information is written to a memory location each time a marker is reached in the pipeline. The memory location is accessible to... Nvidia Corporation

Model-based three-dimensional head pose estimation

One embodiment of the present invention sets forth a technique for estimating a head pose of a user. The technique includes acquiring depth data associated with a head of the user and initializing each particle included in a set of particles with a different candidate head pose. The technique further... Nvidia Corporation

Variable refresh rate video capture and playback

A method for rendering and displaying video. The method includes executing an application at a processor. As instructed by the processor when executing the application, the method includes rendering a plurality of image frames at a plurality of graphics processing units (GPUs). The method includes determining information related to relative... Nvidia Corporation

Cooperative thread array granularity context switch during trap handling

Techniques are provided for restoring threads within a processing core. The techniques include, for a first thread group included in a plurality of thread groups, executing a context restore routine to restore from a memory a first portion of a context associated with the first thread group, determining whether the... Nvidia Corporation

Sparse convolutional neural network accelerator

A method, computer program product, and system perform computations using a processor. A first instruction including a first index vector operand and a second index vector operand is received and the first index vector operand is decoded to produce first coordinate sets for a first array, each first coordinate set... Nvidia Corporation

Sparse convolutional neural network accelerator

A method, computer program product, and system perform computations using a sparse convolutional neural network accelerator. A first vector comprising only non-zero weight values and first associated positions of the non-zero weight values within a 3D space is received. A second vector comprising only non-zero input activation values and second... Nvidia Corporation

Sparse convolutional neural network accelerator

A method, computer program product, and system perform computations using a sparse convolutional neural network accelerator. Compressed-sparse data is received for input to a processing element, wherein the compressed-sparse data encodes non-zero elements and corresponding multi-dimensional positions. The non-zero elements are processed in parallel by the processing element to produce... Nvidia Corporation

Fusing multilayer and multimodal deep neural networks for video classification

A method, computer readable medium, and system are disclosed for classifying video image data. The method includes the steps of processing training video image data by at least a first layer of a convolutional neural network (CNN) to extract a first set of feature maps and generate classification output data... Nvidia Corporation

Unified memory systems and methods

The present invention facilitates efficient and effective utilization of unified virtual addresses across multiple components. In one exemplary implementation, an address allocation process comprises: establishing space for managed pointers across a plurality of memories, including allocating one of the managed pointers with a first portion of memory associated with a... Nvidia Corporation

Reinforcement learning for light transport

A method for light transport includes steps of initializing a data structure that is configured to provide an importance value for each incident sample in a three-dimensional (3D) scene and tracing, in a direction from an origin, a ray of a plurality of rays through the 3D scene to intersect... Nvidia Corporation

Tensor processing using low precision format

Aspects of the present invention are directed to computer-implemented techniques for improving the training of artificial neural networks using a reduced precision (e.g., float16) data format. Embodiments of the present invention rescale tensor values prior to performing matrix operations (such as matrix multiplication or matrix addition) to prevent overflow and... Nvidia Corporation

Parallel processor with integrated correlation and convolution engine

A system and method for performing computer algorithms. The system includes a graphics pipeline operable to perform graphics processing and an engine operable to perform at least one of a correlation determination and a convolution determination for the graphics pipeline. The graphics pipeline is further operable to execute general computing... Nvidia Corporation

Architecture and algorithms for data compression

A system architecture conserves memory bandwidth by including compression utility to process data transfers from the cache into external memory. The cache decompresses transfers from external memory and transfers full format data to naive clients that lack decompression capability and directly transfers compressed data to savvy clients that include decompression... Nvidia Corporation

Method and system for distributed shader optimization

Embodiments of the present invention are operable to communicate a list of important shaders and their current best-known compilations to remote client devices over a communications network. Client devices are allowed to produce modified shader compilations by varying optimizations. If a client device produces a modified compilation that beats an... Nvidia Corporation

Portable computing device cover with fully encapsulated stiffeners

A cover for a portable computing device includes a cover panel having a first portion of a solid silicone rubber sheet and a first stiffener panel that is fully encapsulated in the first portion of the solid silicone rubber sheet.... Nvidia Corporation

Real-time video stabilization for mobile devices based on on-board motion sensing

Real-time video stabilization for mobile devices based on on-board motion sensing. In accordance with a method embodiment of the present invention, a first image frame from a camera at a first time is accessed. A second image frame from the camera at a subsequent time is accessed. A crop polygon... Nvidia Corporation

Detecting a tool used on a touch screen

Detecting a tool used on a touch screen. In accordance with a method embodiment of the present invention, a cell value is accessed for each cell of a touch sensing device. The cell value indicates a force applied to the cell. A touch area sample count is determined as a... Nvidia Corporation

Method to control cache replacement for decoupled data fetch

A method, computer readable medium, and system are disclosed for decoupling data pre-fetch from demand loads. The method includes the steps of receiving, by a processor, a set of instructions that includes a load instruction; and executing, by the processor, the load instruction to perform a load operation. The load... Nvidia Corporation

Stereo multi-projection implemented using a graphics processing pipeline

A method, computer readable medium, and system are disclosed for generating multi-view image data. The method includes the steps of processing primitive data of a model to generate processed primitive data that includes multiple position vectors for each vertex in the primitive data, the number of position vectors associated with... Nvidia Corporation

System, method, and computer program product for rendering at variable sampling rates using projective geometric distortion

A system, method, and computer program product are provided for rendering at variable sampling rates. Vertex coordinates for 3D primitive are received from a shader execution unit, and an arithmetic operation is performed on the vertex coordinates by fixed operation circuitry to produce modified vertex coordinates in homogeneous coordinate space.... Nvidia Corporation

Adjusting an image according to ambient light conditions

An image of an object under a first illuminant is captured. The color of the ambient light at a device on which the image is to be displayed is identified. The image data is adjusted to compensate for the color of the ambient light as well as for the color... Nvidia Corporation

Application-specific memory scaling in multi-device systems

One aspect of the current disclosure provides a method for utilizing a plurality of memories associated with a plurality of devices in a computer system. The method includes: 1) receiving a data set for executing an application employing the devices; 2) determining whether the data set is larger than a... Nvidia Corporation

Method and system hybrid stylus

Embodiments of the present invention are directed to systems for improved touch screen user-input devices that combine the benefits of active and passive touch screen implementations. According to one or more embodiments of the present invention, a system is provided that includes a user input touch device (such as a... Nvidia Corporation

System and early packet header verification

A receiver, transmitter and method for early packet header verification are provided. In one embodiment, the method includes: (1) receiving a payload flit of a preceding packet and a header flit of a current packet; and (2) using a Cyclic Redundancy Check (CRC) in the header flit to verify the... Nvidia Corporation

Variable frequency soft-switching control of a buck converter

A system and method are provided for controlling a modified buck converter circuit. A pull-up switching mechanism that is coupled to an upstream terminal of an inductor within a modified buck converter circuit is enabled. A load current at the output of the modified buck regulator circuit is measured. A... Nvidia Corporation

Integrated voltage regulator with in-built process, temperature and aging compensation

A method for regulating voltage for a processor is disclosed. The method comprises requesting a target frequency value, wherein the target frequency value determines a target clock frequency for clocking the processor. The method also comprises comparing the target clock frequency to a first signal to generate an error signal.... Nvidia Corporation

Near-eye microlens array displays

... Nvidia Corporation

Method for data reuse and applications to spatio-temporal supersampling and de-noising

A method, computer readable medium, and system are disclosed for image processing to reduce aliasing using a temporal anti-aliasing algorithm modified to implement variance clipping. The method includes the step of generating a current frame of image data in a memory. Then, each pixel in the current frame of image... Nvidia Corporation

09/14/17 / #20170263041

System, method and computer program product for generating one or more values for a signal patch using neighboring patches collected based on a distance dynamically computed from a noise distribution of the signal patch

A system, method and computer program product are provided for generating one or more values for a signal patch using neighboring patches collected based on a distance dynamically computed from a noise distribution of the signal patch. In use, a reference patch is identified from a signal, and a reference... Nvidia Corporation

09/14/17 / #20170263046

Perceptually-based foveated rendering using a contrast-enhancing filter

A method, computer readable medium, and system are disclosed for rendering images utilizing a foveated rendering algorithm with post-process filtering to enhance a contrast of the foveated image. The method includes the step of receiving a three-dimensional scene, rendering the 3D scene according to a foveated rendering algorithm to generate... Nvidia Corporation

09/07/17 / #20170252644

Gaming controller button performance

Aspects of the present invention are directed to techniques for improving the manufacturing control mechanisms—specifically game controllers—for computerized electronic devices. According to one aspect of the present invention, a button assembly is provided that eliminates the need for dampers or gaskets for shock absorption by implementing the hammer and pad... Nvidia Corporation

09/07/17 / #20170255552

Systems and methods for dynamic random access memory (dram) sub-channels

A method and system for a DRAM having a first bank that includes a first sub-array (SA) and a second SA. The first SA includes a first storage unit coupled to a first row-buffer in a first sub-channel (FSC) and a second storage unit in a second sub-channel (SSC). The... Nvidia Corporation

09/07/17 / #20170256022

Programmable graphics processor for multithreaded execution of programs

A processing unit includes multiple execution pipelines, each of which is coupled to a first input section for receiving input data for pixel processing and a second input section for receiving input data for vertex processing and to a first output section for storing processed pixel data and a second... Nvidia Corporation

08/31/17 / #20170249151

Software-assisted instruction level execution preemption

One embodiment of the present invention sets forth a technique for instruction level execution preemption. Preempting at the instruction level does not require any draining of the processing pipeline. No new instructions are issued and the context state is unloaded from the processing pipeline. Any in-flight instructions that follow the... Nvidia Corporation

08/31/17 / #20170249152

Software-assisted instruction level execution preemption

One embodiment of the present invention sets forth a technique for instruction level execution preemption. Preempting at the instruction level does not require any draining of the processing pipeline. No new instructions are issued and the context state is unloaded from the processing pipeline. Any in-flight instructions that follow the... Nvidia Corporation

08/31/17 / #20170249254
08/31/17 / #20170249401

Modeling point cloud data using hierarchies of gaussian mixture models

A method, computer readable medium, and system are disclosed for generating a Gaussian mixture model hierarchy. The method includes the steps of receiving point cloud data defining a plurality of points; defining a Gaussian Mixture Model (GMM) hierarchy that includes a number of mixels, each mixel encoding parameters for a... Nvidia Corporation

08/31/17 / #20170249920

Variable refresh rate video capture and playback

A method for displaying video. The method includes executing an application at a processor. As instructed by the processor when executing the application, the method includes rendering a plurality of image frames at a plurality of graphics processing units (GPUs). The method includes determining information related to relative timing between... Nvidia Corporation

08/31/17 / #20170251400

Method and system for dynamic regulation and control of wi-fi scans

A method for discovering wireless access. The method includes launching an application in association with a first device. A Wi-Fi scan policy is accessed, wherein the scan policy is associated with the application. The method includes setting parameters for implementing a plurality of Wi-Fi scans from the first device based... Nvidia Corporation

08/24/17 / #20170243006

Secure provisioning of semiconductor chips in untrusted manufacturing factories

One embodiment of the present invention includes a boot read only memory (ROM) with an embedded, private key provision key (KPK) set that enables secure provisioning of chips. As part of taping-out a chip, the chip provider establishes the KPK set and provides the boot ROM exclusive access to the... Nvidia Corporation

08/24/17 / #20170243319

Sub-frame scanout for latency reduction in virtual reality applications

A system, computer readable medium, and method for sub-frame scan-out are disclosed. The method includes the steps of dividing a frame into a plurality of slices. For each slice in the plurality of slices, the steps further include sampling a sensor associated with a head mounted display to generate sample... Nvidia Corporation

08/17/17 / #20170234927

Efficient scan latch systems and methods

Systems and methods for latches are presented. In one embodiment a system includes scan in propagation component, data propagation component, and control component. The scan in propagation component is operable to select between a scan in value and a recirculation value. The data propagation component is operable to select between... Nvidia Corporation

08/17/17 / #20170235491

Migration of peer-mapped memory pages

Techniques are provided by which memory pages may be migrated among PPU memories in a multi-PPU system. According to the techniques, a UVM driver determines that a particular memory page should change ownership state and/or be migrated between one PPU memory and another PPU memory. In response to this determination,... Nvidia Corporation

08/17/17 / #20170235581

Instructions for managing a parallel cache hierarchy

A technique for managing a parallel cache hierarchy that includes receiving an instruction from a scheduler unit, where the instruction comprises a load instruction or a store instruction; determining that the instruction includes a cache operations modifier that identifies a policy for caching data associated with the instruction at one... Nvidia Corporation

08/17/17 / #20170235586

System and retrieving values of captured local variables for lambda functions in java

A system for and method of retrieving values of captured local variables for a lambda function in Java. In one embodiment, the system includes: (1) a Java virtual machine and (2) a captured variable retriever that interacts with the Java virtual machine and configured to retrieve a signature of the... Nvidia Corporation

08/17/17 / #20170235690

Producer/consumer remote synchronization

Remotely synchronizing data communicated in an electronic computing system. Ordered writing of a data set of discrete data packets (data) and a following associated semaphore packet (semaphore) from a source electronic device (source) to a bridge interface device (bridge). Relaxed writing of the data set from the bridge to discrete... Nvidia Corporation

08/17/17 / #20170235930

Content protection via online servers and code execution in a secure operating system

A computer system comprising a processor and a memory for storing instructions, that when executed by the processor performs a copy protection method. The copy protection method comprises executing a software loop of a first software application in a first operating system. A first call is executed in the software... Nvidia Corporation

08/17/17 / #20170236013

System and procedurally synthesizing datasets of objects of interest for training machine-learning models

A system and method for procedurally synthesizing a training dataset for training a machine-learning model. In one embodiment, the system includes: (1) a training designer configured to describe variations in content of training images to be included in the training dataset and (2) an image definer coupled to the training... Nvidia Corporation

08/17/17 / #20170236242

Ultra high resolution pan-scan on displays connected across multiple systems/gpus

A server and methods for performing an ultra-high resolution pan-scan on displays connected across multiple client GPUs are provided. In one embodiment, one of the methods includes: 1) rendering a surface that exceeds resolutions of displays connected to multiple client GPUs; 2) receiving viewport coordinates of one of the displays... Nvidia Corporation

08/17/17 / #20170236321

Customizable state machine for visual effect insertion

A computing system, driver and method for inserting an extra visual effect into a rendering pipeline of an application are provided. In one embodiment, the method includes: 1) loading into a driver a state machine that is customized for a particular application being rendered at a rendering pipeline; 2) identifying... Nvidia Corporation

08/17/17 / #20170236322

Method and a production renderer for accelerating image rendering

A method, a computer program, and a production renderer for accelerating a rendering process of an image are provided. In one embodiment, the method includes intercepting a first invocation of a function from a custom shader during a rendering process of an image, computing a result of the function employing... Nvidia Corporation

08/17/17 / #20170237963

Collecting and processing stereoscopic digital image data to produce a parallax corrected tilted head view

An apparatus for capturing digital stereoscopic images of a scene. The apparatus comprises a first pair of separated camera lens oriented such that a first imaginary line between the first pair of lens is substantially parallel with a horizon line a scene, wherein digital image data is capturable through the... Nvidia Corporation

08/17/17 / #20170237992

Method for rotating macro-blocks of a frame of a video stream

A method for rotating macro-blocks of a frame of a video stream. A degree of rotation for the video stream is accessed. A macro-block of the video stream is accessed. The macro-block is rotated according to the degree of rotation. The macro-block is repositioned to a new position within the... Nvidia Corporation

08/17/17 / #20170237997

Method and system for interpolating base and delta values of associated tiles in an image

A method for performing image decompression. The method includes identifying a pixel in an image, wherein the image comprises a plurality of tiles including color data that is displayed by a plurality of pixels, wherein each tile is associated with a base value, a delta value, and a plurality of... Nvidia Corporation

08/17/17 / #20170238022

Quality aware error concealment video and game streaming and a viewing device employing the same

A viewing device, a method of displaying streamed data frames and a client viewing device are disclosed herein. In one embodiment, the video viewing device includes: (1) a screen, (2) a decoder configured to decode a data frame received in a bitstream from a transmitter to provide a decoded data... Nvidia Corporation

08/10/17 / #20170227764

Holographic reflective slim virtual/augmented reality display system and method

A display method and system are disclosed for virtual/augmented reality. The method includes the steps of generating an image by a projection engine and projecting light rays defining the image onto a diffuser holographic optical element (DHOE) located between an observer and a concave mirror element, where a concave surface... Nvidia Corporation

08/10/17 / #20170227773

Catadioptric on-axis virtual/augmented reality glasses system and method

A method and system for operating a catadioptric glasses system is presented. The method includes the steps of generating an image via a light engine included in a glasses system and projecting the image onto a display that includes a diffusion layer positioned between a curved mirror and a user's... Nvidia Corporation

08/10/17 / #20170228856

Navigation device

In one embodiment, a car navigation device is provided. The device comprises: at least one wide-angle camera; a video correction unit for acquiring video data from the wide-angle lens and correcting the video data; a video merging unit for acquiring corrected video data from video correction unit and merging the... Nvidia Corporation

Patent Packs
08/03/17 / #20170219652

Performing on-chip partial good die identification

In one embodiment, a multiple input signature register (MISR) shadow works with a MISR to compress test responses of a layout partition in a functional region of an integrated circuit. In operation, for each test pattern in a test pattern split, the MISR generates a MISR signature based on the... Nvidia Corporation

08/03/17 / #20170221260

Strain based dynamics for rendering special effects

A strain based dynamic technique, for rendering special effects, includes simulation as a function of a Green-St. Venant strain tensor constraint. The behavior of a soft body may be controlled independent of a mesh structure by assigning different stiffness values to each constraint of the Green-St. Venant strain tensor.... Nvidia Corporation

07/27/17 / #20170212857

System and configuring a channel

An integrated circuit device comprises pin resources, a memory controller circuit, a network interface controller circuit, and transmitter circuitry. The pin resources comprise pads coupled to off-chip pins of the integrated circuit device. The memory controller circuit comprises a first interface and the network interface controller circuit comprises a second... Nvidia Corporation

07/27/17 / #20170213263

Establishing a billing address for a device by determining a location of the device

To establish a target (e.g., billing) address, a device receives a first physical address determined by geolocating the device (e.g., based on an Internet Protocol (IP) address associated with the device). A street-level map that includes an indicator that is rendered at a first location in the map corresponding to... Nvidia Corporation

07/27/17 / #20170213313

Managing event count reports in a tile-based architecture

One embodiment of the present invention sets forth a graphics processing system configured to track event counts in a tile-based architecture. The graphics processing system includes a screen-space pipeline and a tiling unit. The screen-space pipeline includes a first unit, a count memory associated with the first unit, and an... Nvidia Corporation

07/20/17 / #20170205465

Granular dynamic test systems and methods

In one embodiment, a system comprises: a global clock input for receiving a global clock, a plurality of partitions; and a skew tolerant interface configured to compensate for clock skew differences between a global clock from outside at least one of the partitions and a balanced local clock within at... Nvidia Corporation

07/20/17 / #20170206231

Tree traversal with backtracking in constant time

A method, computer readable medium, and system are disclosed for performing tree traversal with backtracking in constant time. The method includes the steps of traversing a tree, maintaining a bit trail variable and a current key variable during the traversing, where the bit trail variable includes a first plurality of... Nvidia Corporation

07/20/17 / #20170206405

Online detection and classification of dynamic gestures with recurrent convolutional neural networks

A method, computer readable medium, and system are disclosed for detecting and classifying hand gestures. The method includes the steps of receiving an unsegmented stream of data associated with a hand gesture, extracting spatio-temporal features from the unsegmented stream by a three-dimensional convolutional neural network (3DCNN), and producing a class... Nvidia Corporation

07/20/17 / #20170206623
07/20/17 / #20170207783

Three state latch

Three state latch. In accordance with a first embodiment, an electronic circuit includes n pairs of cascaded logical gates. Each of the n pairs of cascaded logical gates includes a first logical gate including n−1 first gate inputs and one first gate output, and a second logical gate including two... Nvidia Corporation

07/13/17 / #20170199689

Frame buffer access tracking via a sliding window in a unified virtual memory system

One embodiment of the present invention is a memory subsystem that includes a sliding window tracker that tracks memory accesses associated with a sliding window of memory page groups. When the sliding window tracker detects an access operation associated with a memory page group within the sliding window, the sliding... Nvidia Corporation

07/13/17 / #20170199778

Lazy runahead operation for a microprocessor

Embodiments related to managing lazy runahead operations at a microprocessor are disclosed. For example, an embodiment of a method for operating a microprocessor described herein includes identifying a primary condition that triggers an unresolved state of the microprocessor. The example method also includes identifying a forcing condition that compels resolution... Nvidia Corporation

07/06/17 / #20170192822
07/06/17 / #20170195591

Pre-processing for video noise reduction

Embodiments of the present invention are directed to methods and systems for performing automatic noise reduction in video. According to one aspect of the invention, a video noise-reducing system is provided consisting of a noise estimator, a motion classifier, two stages of filters, each including a spatial and temporal filter,... Nvidia Corporation

06/29/17 / #20170185526
Patent Packs
06/29/17 / #20170186224

Using a geometry shader for variable input and output algorithms

A system and method uses the capabilities of a geometry shader unit within the multi-threaded graphics processor to implement algorithms with variable input and output.... Nvidia Corporation

06/22/17 / #20170177146

Methods and reducing perceived pen-to-ink latency on touchpad devices

A method for reducing line display latency on a touchpad device is disclosed. The method comprises storing information regarding a plurality of prior touch events on a touch screen of the touchpad device into an event buffer. It further comprises determining an average speed and a predicted direction of motion... Nvidia Corporation

06/22/17 / #20170178401

Distributed index fetch, primitive assembly, and primitive batching

One embodiment of the present invention includes a technique for distributing work slices associated with a graphics processing unit for processing. A primitive distribution system receives a draw command related to a graphics object associated with a plurality of indices. The primitive distribution system creates a plurality of work slices,... Nvidia Corporation

06/15/17 / #20170165569

Built-in support of in-game virtual split screens with peer-to peer-video conferencing

Methods of providing in-game virtual split screens with peer-to-peer video conferencing are described for use in online gaming, for instance. In one approach, a live video stream, a live audio stream, and a player viewpoint are sent from a first computer system for receipt by a second computer system. The... Nvidia Corporation

06/15/17 / #20170168598

Magnetic retention of peripheral device for a tablet computer

A peripheral device for a computing device comprises a body configured for insertion into a storage cavity in the computing device, a first magnet, and a second magnet. The first magnet is disposed within the body proximate a first external surface of the body and having a first pole of... Nvidia Corporation

06/15/17 / #20170168839

Branching to alternate code based on runahead determination

The description covers a system and method for operating a micro-processing system having a runahead mode of operation. In one implementation, the method includes providing, for a first portion of code, a runahead correlate. When the first portion of code is encountered by the micro-processing system, a determination is made... Nvidia Corporation

06/15/17 / #20170170869

System and cross-talk cancellation in single-ended signaling

A method for transmitting data advantageously reduces cross-talk in high-speed data transmission. The method comprises receiving an input data word, encoding the input data word into a code word, and driving the code word on to an interconnect for transmission. The code word is generating using a balanced coding scheme,... Nvidia Corporation

06/15/17 / #20170170870

System and cross-talk cancellation in single-ended signaling

A method for transmitting data advantageously reduces cross-talk in high-speed data transmission. The method comprises receiving an input data word, encoding the input data word into a code word, and driving the code word on to an interconnect for transmission. The code word is generating using a balanced coding scheme,... Nvidia Corporation

06/08/17 / #20170161099

Managing copy operations in complex processor topologies

A copy subsystem within a processor includes a set of logical copy engines and a set of physical copy engines. Each logical copy engine corresponds to a different command stream implemented by a device driver, and each logical copy engine is configured to receive copy commands via the corresponding command... Nvidia Corporation

06/08/17 / #20170161100

Managing copy operations in complex processor topologies

A copy subsystem within a processor includes a set of logical copy engines and a set of physical copy engines. Each logical copy engine corresponds to a different command stream implemented by a device driver, and each logical copy engine is configured to receive copy commands via the corresponding command... Nvidia Corporation

06/08/17 / #20170161142

Method for scrubbing and correcting dram memory data with internal error-correcting code (ecc) bits contemporaneously during self-refresh state

In one embodiment, a method for updating a DRAM memory array is disclosed. The method comprises: a) transitioning the DRAM memory array from an idle state to a self-refresh state after a period of inactivity; b) initiating a refresh on the DRAM memory array using DRAM internal control circuitry; and... Nvidia Corporation

06/08/17 / #20170161143

Controller-based memory scrub for drams with internal error-correcting code (ecc) bits contemporaneously during auto refresh or by using masked write commands

A method for updating a DRAM memory array is disclosed. The method comprises: a) transitioning the DRAM memory array from an idle state to a refresh state in accordance with a command from a memory controller; b) initiating a refresh on the DRAM memory array using DRAM internal control circuitry... Nvidia Corporation

06/08/17 / #20170161144

Method for memory scrub of dram with internal error correcting code (ecc) bits during either memory activate and/or precharge operation

A method for updating a DRAM memory array is disclosed. The method comprises: a) receiving a command from a memory controller to initiate an active cycle for activating a memory row in a DRAM memory array; b) performing an Error Correction Code (ECC) scrub on the memory row prior to... Nvidia Corporation

06/08/17 / #20170161206

Replaying memory transactions while resolving memory access faults

One embodiment of the present invention is a parallel processing unit (PPU) that includes one or more streaming multiprocessors (SMs) and implements a replay unit per SM. Upon detecting a page fault associated with a memory transaction issued by a particular SM, the corresponding replay unit causes the SM, but... Nvidia Corporation

06/01/17 / #20170153945

Memory management systems and methods

The present invention facilitates efficient and effective utilization of storage management features. In one embodiment, a memory device comprises a memory interface, an ECC generation component, and storage components. The memory interface is configured to receive an access request to an address at which data is stored. The memory interface... Nvidia Corporation

06/01/17 / #20170154667

Dram with segmented page configuration

This description is directed to a dynamic random access memory (DRAM) array having a plurality of rows and a plurality of columns. The array further includes a plurality of cells, each of which are associated with one of the columns and one of the rows. Each cell includes a capacitor... Nvidia Corporation

05/25/17 / #20170147034

Hybrid optics for near-eye displays

A method for displaying a near-eye light field display (NELD) image is disclosed. The method comprises determining a pre-filtered image to be displayed, wherein the pre-filtered image corresponds to a target image. It further comprises displaying the pre-filtered image on a display. Subsequently, it comprises producing a near-eye light field... Nvidia Corporation

05/25/17 / #20170147299

System and optimizing multiple invocations of graphics processing unit programs in java

A system and method for optimizing multiple invocations of a graphics processing unit (GPU) program in Java. In one embodiment, the system includes: (1) a frontend component in a computer system and configured to compile Java bytecode associated with the a class object that implements a functional interface into Intermediate... Nvidia Corporation

05/25/17 / #20170148203

Multi-pass rendering in a screen space pipeline

A multi-pass unit interoperates with a device driver to configure a screen space pipeline to perform multiple processing passes with buffered graphics primitives. The multi-pass unit receives primitive data and state bundles from the device driver. The primitive data includes a graphics primitive and a primitive mask. The primitive mask... Nvidia Corporation

05/25/17 / #20170148204

Multi-pass rendering in a screen space pipeline

A multi-pass unit interoperates with a device driver to configure a screen space pipeline to perform multiple processing passes with buffered graphics primitives. The multi-pass unit receives primitive data and state bundles from the device driver. The primitive data includes a graphics primitive and a primitive mask. The primitive mask... Nvidia Corporation

05/25/17 / #20170150181

Hybrid parallel decoder techniques

Decoder techniques in accordance with embodiment of the present technology include partially decoding a compressed file on a serial based processing unit to find offsets of each of a plurality of entropy data blocks. The compressed file and offset for each of the plurality of entropy encoded data blocks are... Nvidia Corporation








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