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Nvidia Corporation patents


      
Recent patent applications related to Nvidia Corporation. Nvidia Corporation is listed as an Agent/Assignee. Note: Nvidia Corporation may have other listings under different names/spellings. We're not affiliated with Nvidia Corporation, we're just tracking patents.

ARCHIVE: New 2014 2013 2012 2011 2010 2009 | Company Directory "N" | Nvidia Corporation-related inventors



Nvidia

Communication system and method

Nvidia

Device-ready-status to function-ready-status conversion

Search recent Press Releases: Nvidia Corporation-related press releases
Count Application # Date Nvidia Corporation patents (updated weekly) - BOOKMARK this page
12014023236008/21/14 new patent  Predictive current sensing
22014023236108/21/14 new patent  Pulsed current sensing
32014023236808/21/14 new patent  Electric power conversion with assymetric phase response
42014023254008/21/14 new patent  System, method, and computer program product for implementing a power saving technique using a proximity sensor controlled display
52014023266408/21/14 new patent  Synchronized touch input recognition
62014023272908/21/14 new patent  Power efficient attribute handling for tessellation and geometry shaders
72014023361208/21/14 new patent  Technique for optimizing the phase of a data signal transmitted across a communication link
82014023361608/21/14 new patent  Communication system and method
92014023361708/21/14 new patent  Communication system and method
102014023715308/21/14 new patent  Device-ready-status to function-ready-status conversion
112014023718708/21/14 new patent  Adaptive multilevel binning to improve hierarchical caching
122014023718908/21/14 new patent  Compression status bit cache and backing store
132014022557908/14/14Current-parking switching regulator upstream controller
142014022566208/14/14Low-voltage, high-accuracy current mirror circuit
152014022590208/14/14Image pyramid processor and method of multi-resolution image processing
162014022807708/14/14Mobile computing device with expanded display size
172014022975408/14/14Power telemetry remote monitoring
182014022978308/14/14In-circuit test structure for printed circuit board
192014022993508/14/14Virtual interrupt delivery from a graphics processing unit (gpu) of a computing system without hardware support therefor
202014022995308/14/14System, method, and computer program product for management of dependency between tasks
212014021800108/07/14Current-parking switching regulator downstream controller pre-driver
222014021808408/07/14Approach to clock frequency modulation of a fixed frequency clock source
232014021833208/07/14Flat panel electronic device
242014021837608/07/14System and method for image processing
252014021837908/07/14Device, system and method for transferring network data
262014021839008/07/14Modulated and blended anti-aliasing
272014021878708/07/14Flat panel electronic apparatus and display panel thereof
282014021900708/07/14Dram with segmented page configuration
292014021948208/07/14Flat panel electronic device and audio playing apparatus thereof
302014022105408/07/14Saving power in a mobile terminal
312014022108708/07/14Handheld gaming console
322014022321908/07/14Clock frequency controller for a processor and method of operation thereof
332014022322108/07/14Approach to clock frequency modulation of a fixed frequency clock source
342014022323608/07/14Device for testing a graphics card
352014022342008/07/14Convergence analysis in multithreaded programs
362014020859007/31/14Process for manufacturing a printed circuit board having high density microvias formed in a thick substrate
372014021042907/31/14Current-parking switching regulator with a split inductor
382014021043407/31/14Current-parking switching regulator downstream controller
392014021065607/31/14Circuit for implementing a continuous-time deglitching technique for digital analog converters
402014021169207/31/14Communication system and method
412014021434207/31/14Verification of test program stability and wafer fabrication process sensitivity
422014021523607/31/14Power-efficient inter processor communication scheduling
432014020400507/24/14System, method, and computer program product for distributed processing of overlapping portions of pixels
442014020409807/24/14System, method, and computer program product for graphics processing unit (gpu) demand paging
452014020410607/24/14Shader program attribute storage
462014020465707/24/14Sram voltage assist
472014020468707/24/14System and method for performing address-based sram access assists
482014019883907/17/14Low latency sub-frame level video decoding
492014019892307/17/14Real time audio echo and background noise reduction for a mobile device
502014020005107/17/14Radio frequency identification on mobile computing device
512014019076307/10/14Ported enclosure and automated equalization of frequency response in a micro-speaker audio system
522014019206607/10/14Parallel processor with integrated correlation and convolution engine
532014019300207/10/14Ported enclosure and automated equalization of frequency response in a micro-speaker audio system
542014019559407/10/14Method and system for distributed processing, rendering, and displaying of content
552014019559807/10/14System and method for computer peripheral access from cloud computing devices
562014019591207/10/14Method and system for simultaneous display of video content
572014019604307/10/14System and method for re-factorizing a square matrix into lower and upper triangular matrices on a parallel processor
582014018395107/03/14Super n-phase switching mode power supply
592014018417907/03/14Efficient voltage sensing systems and methods
602014018426807/03/14Power conservation using gray-coded address sequencing
612014018450807/03/14Universal adaptive game controller
622014018451307/03/14Softkey magnification on touch screen
632014018451707/03/14Early drawing system and method to improve touch screen response
642014018458307/03/14Method and apparatus to reduce panel power through horizontal interlaced addressing
652014018460107/03/14System and method for frame buffer decompression and/or compression
662014018460307/03/14Method to improve usability of high pixel density displays
672014018461107/03/14Method and apparatus for sending partial frame updates rendered in a graphics processor to a display using framelock signals
682014018461207/03/14Variable-width differential memory compression
692014018461607/03/14System, method, and computer program product for identifying a faulty processing unit
702014018461707/03/14Mid-primitive graphics execution preemption
712014018462507/03/14Stutter buffer transfer techniques for display systems
722014018462607/03/14Frame times by dynamically adjusting frame buffer resolution
732014018462707/03/14Progressive lossy memory compression
742014018462907/03/14Method and apparatus for synchronizing a lower bandwidth graphics processor with a higher bandwidth display using framelock signals
752014018463207/03/14Method and system for index compression for fixed block size texture formats and for non-linear interpolation of index values along an edge in a tile
762014018463307/03/14Conservative bounding region rasterization
772014018466707/03/14Display device with binary mode amoled pixel pattern
782014018481307/03/14Lens shading calibration for cameras
792014018489407/03/14System, method, and computer program product implementing an image processing pipeline for high-dynamic range images
802014018563307/03/14Flexible threshold counter for clock-and-data recovery
812014018585207/03/14Audio channel mapping in a portable electronic device
822014018595107/03/14Summed area computation using ripmap of partial sums
832014018595207/03/14System, method, and computer program product for implementing a spatially varying unsharp mask noise reduction filter
842014018733107/03/14Latency reduction by sub-frame encoding and transmission
852014018896307/03/14Efficient correction of normalizer shift amount errors in fused multiply add operations
862014018909107/03/14Network adaptive latency reduction through frame rate control
872014018918007/03/14Method and system for changing bus direction in memory systems
882014018926007/03/14Approach for context switching of lock-bit protected memory
892014018931007/03/14Fault detection in instruction translations
902014018931307/03/14Queued instruction re-dispatch after runahead
912014018931607/03/14Execution pipeline data forwarding
922014018932907/03/14Cooperative thread array granularity context switch during trap handling
932014018937507/03/14Distributed power delivery to a processing unit
942014018938607/03/14Supply-voltage control for device power management
952014018945207/03/14System for reducing peak power during scan shift at the local level for scan based tests
962014018945407/03/14Global low power capture scheme for cores
972014018945507/03/14System for reducing peak power during scan shift at the global level for scan based tests
982014018954407/03/14Web-based graphics development system and method of graphics program interaction therewith
992014018964707/03/14System and method for debugging an executing general-purpose computing on graphics processing units (gpgpu) application
1002014018964807/03/14Facilitated quality testing
1012014018969807/03/14Approach for a configurable phase-based priority scheduler
1022014017561906/26/14Stripline and reference plane implementation for interposers using an implant layer
1032014017566506/26/14Chip package using interposer substrate with through-silicon vias
1042014017568106/26/14Absorbing excess under-fill flow with a solder trench
1052014017604106/26/14Semiconductor thermoelectric module charger for mobile computing device
1062014017611606/26/14Quantifying silicon degradation in an integrated circuit
1072014017644006/26/14Apparatus and system for implementing a wireless mouse using a hand-held device
1082014017653206/26/14Method for image correction and an electronic device embodying the same
1092014017654506/26/14System, method, and computer program product implementing an algorithm for performing thin voxelization of a three-dimensional model
1102014017654606/26/14Shadow softening graphics processing unit and method
1112014017654706/26/14Programmable blending via multiple pixel shader dispatches
1122014017654806/26/14Facial image enhancement for video communication
1132014017656806/26/14Programmable blending in multi-threaded processing units
1142014017656906/26/14Graphics processing unit employing a standard processing unit and a method of constructing a graphics processing unit
1152014017657506/26/14System, method, and computer program product for tiled deferred shading
1162014017657706/26/14Method and mechanism for preempting control of a graphics pipeline
1172014017657806/26/14Input output connector for accessing graphics fixed function units in a software-defined pipeline and a method of operating a pipeline
1182014017657906/26/14Efficient super-sampling with per-pixel shader threads
1192014017658806/26/14Technique for storing shared vertices
1202014017658906/26/14Technique for storing shared vertices
1212014017674506/26/14Approach for camera control
1222014017675006/26/14Approach for camera control
1232014017680206/26/14Detection and measurement of video scene transitions
1242014017769306/26/14Influence clock data recovery settling point by applying decision feedback equalization to a crossing sample
1252014017769506/26/14Multipass approach for performing channel equalization training
1262014017771606/26/14Using an average motion vector for a motion search
1272014017937006/26/14System, process, and computer program product for implementing a document scanner in a hand-held device
1282014018133906/26/14Equalization coefficient search algorithm
1292014018134506/26/14Hidden i/o connector assembly for mobile computing devices
1302014018139106/26/14Hardware chip select training for memory using write leveling mechanism
1312014018139206/26/14Hardware chip select training for memory using read commands
1322014018140406/26/14Information coherency maintenance systems and methods
1332014018142906/26/14Multi-dimensional hardware data training between memory controller and memory
1342014018145106/26/14Hardware command training for memory using write leveling mechanism
1352014018145206/26/14Hardware command training for memory using read commands
1362014018146206/26/14Virtual address based memory reordering
1372014018150106/26/14Heterogeneous multiprocessor design for power-efficient and area-efficient computing
1382014018154006/26/14Hybrid battery pack
1392014018154706/26/14Smart charging system for hybrid battery pack
1402014018176906/26/14Netlist cell identification and classification to reduce power consumption
1412014016721606/19/14Low-profile chip package with modified heat spreader
1422014016782806/19/14Small area low power data retention flop
1432014016803406/19/14Near-eye parallax barrier displays
1442014016803506/19/14Near-eye optical deconvolution displays
1452014016809306/19/14Method and system of emulating pressure sensitivity on a surface
1462014016821406/19/14Method of simulating clothing using long range attachments
1472014016822206/19/14Optimizing triangle topology for path rendering
1482014016822706/19/14System and method for versioning buffer states and graphics processing unit incorporating the same
1492014016822806/19/14Fine-grained parallel traversal for ray tracing
1502014016823006/19/14Asynchronous compute integrated into large-scale data rendering using dedicated, separate computing and rendering clusters
1512014016823106/19/14Triggering performance event capture via pipelined state bundles
1522014016823206/19/14Stereo viewpoint graphics processing subsystem and method of sharing geometry data between stereo images in screen-spaced processing
1532014016823806/19/14Fine-grained parallel traversal for ray tracing
1542014016824206/19/14Techniques for setting up and executing draw calls
1552014016824506/19/14Technique for performing memory access operations via texture hardware
1562014016838806/19/14System and method for displaying a three-dimensional image on a video monitor
1572014016878306/19/14Near-eye microlens array displays
1582014016888306/19/14Externally latching i/o housing
1592014016890306/19/14Passive cooling system integrated into a printed circuit board for cooling electronic components
1602014016910806/19/14Mitigating external influences on long signal lines
1612014016947106/19/14Apparatus and method for enhancing motion estimation based on user input
1622014017089106/19/14Externally latching i/o cable
1632014017119006/19/14Implementing a remote gaming server on a desktop computer
1642014017238006/19/14Technique for simulating the dynamics of hair
1652014017300006/19/14System and method for handling message delivery
1662014017314806/19/14Approach for working around starvation problems in a datapath
1672014017319306/19/14Technique for accessing content-addressable memory
1682014017324906/19/14System and method for connecting a system on chip processor and an external processor
1692014017325806/19/14Technique for performing memory access operations via texture hardware
1702014017360606/19/14Streaming processing of short read alignment algorithms
1712014017361106/19/14System and method for launching data parallel and task parallel application threads and graphics processing unit incorporating the same
1722014016001906/12/14Methods for enhancing user interaction with mobile devices
1732014016012406/12/14Visible polygon data structure and method of use thereof
1742014016012606/12/14Computing tessellation coordinates using dedicated hardware
1752014016015106/12/14System and method for compressing bounding box data and processor incorporating the same
1762014016066206/12/14Bracket of add-in card of computer, add-in card system and computer
1772014016087106/12/14System and method for performing sram write assist
1782014016087606/12/14Address bit remapping scheme to reduce access granularity of dram accesses
1792014016117306/12/14System and method for controlling video encoding using content information
1802014016465506/12/14Folded fifo memory generator
1812014016472706/12/14System, method, and computer program product for optimizing the management of thread stack memory
1822014016473606/12/14Lazy runahead operation for a microprocessor
1832014016473806/12/14Instruction categorization for runahead operation
1842014016474306/12/14Reordering buffer for memory access locality
1852014016474506/12/14Register allocation for clustered multi-level register files
1862014016484706/12/14Internal logic analyzer with programmable window capture
1872014016484806/12/14Tracing instruction pointers and data accesses
1882014016504906/12/14Compiler-controlled region scheduling for simd execution of threads
1892014016507206/12/14Technique for saving and restoring thread group operating state
1902014015189206/05/14Three dimensional through-silicon via construction
1912014015265206/05/14Order-preserving distributed rasterizer
1922014015284806/05/14Technique for configuring a digital camera
1932014015334106/05/14Sequential access memory with master-slave latch pairs and method of operating
1942014015363506/05/14Method, computer program product, and system for multi-threaded video encoding
1952014015689106/05/14Systems and methods for automatically generating master-slave latch structures with fully registered flow control
1962014015742306/05/14Code protection using online authentication and encrypted code execution
1972014014604505/29/14System, method, and computer program product for sampling a hierarchical depth map
1982014014605005/29/14System, method, and computer program product for tiled screen space sample scrambling for parallel deterministic consistent light transport simulation
1992014014606205/29/14System, method, and computer program product for debugging graphics programs locally utilizing a system with a single gpu
2002014014606505/29/14Mpi communication of gpu buffers
2012014014662805/29/14Technique for improving static random-access memory sense amplifier voltage differential
2022014014948005/29/14System, method, and computer program product for transposing a matrix
2032014014952805/29/14Mpi communication of gpu buffers
2042014014966805/29/14Prefetching according to attributes of access requests
2052014014967805/29/14Using cache hit information to manage prefetches
2062014014967905/29/14Page crossing prefetches
2072014014972105/29/14Method, computer program product, and system for a multi-input bitwise logical operation
2082014014977005/29/14Low-power states for a computer system with integrated baseband
2092014014978005/29/14Speculative periodic synchronizer
2102014013881105/22/14A semiconductor device including a heat-spreading lid
2112014013881505/22/14Server processing module
2122014013882305/22/14Variable-size solder bump structures for integrated circuit packaging
2132014013882405/22/14Offset integrated circuit packaging interconnects
2142014013927505/22/14Variation-tolerant periodic synchronizer
2152014013927605/22/14Matrix phase detector
2162014014329605/22/14Method and system of transmitting state based input over a network
2172014014329705/22/14Method and system for network driven automatic adaptive rendering impedance
2182014014348505/22/14Technique for optimizing static random-access memory passive power consumption
2192014014356405/22/14Approach to power reduction in floating-point operations
2202014014359905/22/14Test program generator using key enumeration and string replacement
2212014014363505/22/14Techniques for storing ecc checkbits in a level two cache
2222014014374205/22/14Design, layout, and manufacturing techniques for multivariant integrated circuits
2232014014375505/22/14System and method for inserting synchronization statements into a program file to mitigate race conditions
2242014013881105/22/14A semiconductor device including a heat-spreading lid
2252014013881505/22/14Server processing module
2262014013882305/22/14Variable-size solder bump structures for integrated circuit packaging
2272014013882405/22/14Offset integrated circuit packaging interconnects
2282014013927505/22/14Variation-tolerant periodic synchronizer
2292014013927605/22/14Matrix phase detector
2302014014329605/22/14Method and system of transmitting state based input over a network
2312014014329705/22/14Method and system for network driven automatic adaptive rendering impedance
2322014014348505/22/14Technique for optimizing static random-access memory passive power consumption
2332014014356405/22/14Approach to power reduction in floating-point operations
2342014014359905/22/14Test program generator using key enumeration and string replacement
2352014014363505/22/14Techniques for storing ecc checkbits in a level two cache
2362014014374205/22/14Design, layout, and manufacturing techniques for multivariant integrated circuits
2372014014375505/22/14System and method for inserting synchronization statements into a program file to mitigate race conditions
2382014013183405/15/14Decoupling capacitors for interposers
2392014013184705/15/14Thermal performance of logic chip in a package-on-package structure
2402014013223505/15/14Circuit board and power source management system of circuit board
2412014013224505/15/14High-resolution phase detector
2422014013251705/15/14Portable function-expanding device for electronic device
2432014013261105/15/14System and method for data transmission
2442014013261205/15/14Boot display device detection and selection techniques in multi-gpu devices
2452014013308205/15/14Turbofan and graphics card with the turbofan
2462014013308305/15/14Graphics card and base plate and core board for the graphics card
2472014013310505/15/14Method of embedding cpu/gpu/logic chip into a substrate of a package-on-package structure
2482014013368905/15/14Rear cover of flat panel electronic device and flat panel electronic device having the rear cover
2492014013506705/15/14Wireless base station device and communication system including the wireless base station device


ARCHIVE: New 2014 2013 2012 2011 2010 2009



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This listing is an abstract for educational and research purposes is only meant as a recent sample of applications filed, not a comprehensive history. Freshpatents.com is not affiliated or associated with Nvidia Corporation in any way and there may be associated servicemarks. This data is also published to the public by the USPTO and available for free on their website. Note that there may be alternative spellings for Nvidia Corporation with additional patents listed. Browse our Agent directory for other possible listings. Page by FreshPatents.com

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