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Nvidia Corporation patents


      
Recent patent applications related to Nvidia Corporation. Nvidia Corporation is listed as an Agent/Assignee. Note: Nvidia Corporation may have other listings under different names/spellings. We're not affiliated with Nvidia Corporation, we're just tracking patents.

ARCHIVE: New 2014 2013 2012 2011 2010 2009 | Company Directory "N" | Nvidia Corporation-related inventors



Back channel adaptation for transmission under peak power constraints

Nvidia

Back channel adaptation for transmission under peak power constraints

Control of a soft-switched variable frequency multi-phase regulator

Nvidia

Control of a soft-switched variable frequency multi-phase regulator

Control of a soft-switched variable frequency multi-phase regulator

Nvidia

Speculative memory controller

Search recent Press Releases: Nvidia Corporation-related press releases
Count Application # Date Nvidia Corporation patents (updated weekly) - BOOKMARK this page
12014031286010/23/14 new patent  Control of a soft-switched variable frequency buck regulator
22014031286810/23/14 new patent  Control of a soft-switched variable frequency multi-phase regulator
32014031287310/23/14 new patent  Estimating and monitoring the effects of transistor aging
42014031319810/23/14 new patent  System, method, and computer program product for performing path space filtering
52014031381710/23/14 new patent  Sram core cell design with write assist
62014031413810/23/14 new patent  Back channel adaptation for transmission under peak power constraints
72014031736110/23/14 new patent  Speculative memory controller
82014031738210/23/14 new patent  Dynamic configuration of processing pipeline based on determined type of fetched instruction
92014031738510/23/14 new patent  Techniques for determining instruction dependencies
102014031738610/23/14 new patent  Techniques for determining instruction dependencies
112014030668710/16/14System and method for measuring an integrated circuit age
122014030677510/16/14System and method for increasing a voltage range associated with a voltage controlled oscillator
132014030690910/16/14Automatic performance of touch screen related functionality in response to detected stylus position
142014030692810/16/14Stylus signaling for capacitive touch screen panels
152014030692910/16/14Methods and systems for operating a touch screen enabled device with a stylus
162014030711610/16/14Method and system for managing video recording and/or picture taking in a restricted environment
172014030776610/16/14Iteratively scanning equalization coefficients to optimize signal quality in a data communication link
182014031048410/16/14System and method for globally addressable gpu memory
192014031066410/16/14System, method, and computer program product for translating a source database into a common hardware database
202014031066510/16/14System, method, and computer program product for translating a common hardware database into a logic code model
212014031067310/16/14System, method, and computer program product for translating a hardware language into a source database
222014030061810/09/14Regional dimming for power savings
232014030062410/09/14Regional histogramming for global approximation
242014030077810/09/14Technique for reducing the power consumption of a video encoder engine
252014030113410/09/14Ground-referenced single-ended memory interconnect
262014030165810/09/14Per pixel mapping for image enhancement
272014030281510/09/14Recovery from aborted integrity protection change
282014030441710/09/14Establishing communications
292014029227910/02/14System and method for extending useful life of lithium-ion and batteries of similar type
302014029261610/02/14Computer monitor equalization using handheld device
312014029261710/02/14System, method, and computer program product for reducing image artifacts on multiple displays
322014029275110/02/14Rate control bit allocation for video streaming based on an attention area of a gamer
332014029277110/02/14Techniques for locally modifying draw calls
342014029277410/02/14System and method for performing sample-based rendering in a parallel processor
352014029278110/02/14System and method for propagating scene information to renderers in a multi-user, multi-scene environment
362014029280310/02/14System, method, and computer program product for generating mixed video and three-dimensional data to reduce streaming bandwidth
372014029591010/02/14System and method for mitigating shock failure in an electronic device
382014029805110/02/14Feature management system and method of managing access to application programming interface functionality
392014028548809/25/14System, method, and computer program product for compression of a bounding volume hierarchy
402014028550009/25/14Programmable graphics processor for multithreaded execution of programs
412014028639009/25/14Encoder controller graphics processing unit and method of encoding rendered graphics
422014028643809/25/14Quality of service management server and method of managing streaming bit rate
432014028644009/25/14Quality of service management system and method of forward error correction
442014028656909/25/14Robust automatic determination and location of macbeth color checker charts
452014028891109/25/14System and method for simulating integrated circuit performance on a many-core processor
462014026481609/18/14Semiconductor package structure
472014026641609/18/14On-package multiprocessor ground-referenced single-ended interconnect
482014026641709/18/14Ground-referenced single-ended signaling connected graphics processing unit multi-chip module
492014026699609/18/14Low motion blur liquid crystal display
502014026722209/18/14Efficient autostereo support using display controller windows
512014026722409/18/14Handling post-z coverage data in raster operations
522014026723209/18/14Consistent vertex snapping for variable resolution rendering
532014026723809/18/14Conservative rasterization of primitives using an error term
542014026726009/18/14System, method, and computer program product for executing processes involving at least one primitive in a graphics processor, utilizing a data structure
552014026726409/18/14Generating anti-aliased voxel data
562014026726509/18/14Generating anti-aliased voxel data
572014026726609/18/14Generating anti-aliased voxel data
582014026727609/18/14System, method, and computer program product for generating primitive specific attributes
592014026731509/18/14Multi-sample surface processing using one sample
602014026731809/18/14Pixel shader bypass for low power graphics rendering
612014026731909/18/14Technique for improving the performance of a tessellation pipeline
622014026732009/18/14Technique for improving the performance of a tessellation pipeline
632014026733409/18/14Cpu-to-gpu and gpu-to-gpu atomics
642014026734009/18/14Material representation data structure and method of representing a material for digital image synthesis
652014026735509/18/14System, method, and computer program product for processing graphics data associated with shading
662014026735609/18/14Multi-sample surface processing using sample subsets
672014026736609/18/14Target independent rasterization with multiple color samples
682014026737309/18/14Stencil then cover path rendering with shared edges
692014026737409/18/14Stencil then cover path rendering with shared edges
702014026737509/18/14Stencil then cover path rendering with shared edges
712014026737609/18/14System, method, and computer program product for accessing multi-sample surfaces
722014026738209/18/14Efficient round point rasterization
732014026738609/18/14Rendering cover geometry without internal edges
742014026742609/18/14System, method, and computer program product for automatically extending a lasso region in two-dimensional image editors
752014026897609/18/14Ground-referenced single-ended memory interconnect
762014026901009/18/14Ground-referenced single-ended memory interconnect
772014027036409/18/14Performing object detection operations via a graphics processing unit
782014027055109/18/14Performing object detection operations via a graphics processing unit
792014027832809/18/14System, method, and computer program product for constructing a data flow and identifying a construct
802014028041209/18/14System, method, and computer program product for determining a random value
812014028101709/18/14Jitter buffering system and method of jitter buffering
822014028102309/18/14Quality of service management server and method of managing quality of service
832014028111009/18/14Pcie traffic tracking hardware in a unified virtual memory system
842014028125509/18/14Page state directory for managing unified virtual memory
852014028125609/18/14Fault buffer for resolving page faults in unified virtual memory system
862014028125909/18/14Translation lookaside buffer entry systems and methods
872014028126309/18/14Replaying memory transactions while resolving memory access faults
882014028126409/18/14Migration counters for hybrid memories in a unified virtual memory system
892014028129609/18/14Fault buffer for tracking page faults in unified virtual memory system
902014028129709/18/14Migration of peer-mapped memory pages
912014028129909/18/14Opportunistic migration of memory pages in a unified virtual memory system
922014028131909/18/14System and method for protecting data
932014028132309/18/14Migration directives in a unified virtual memory system architecture
942014028132409/18/14Migrating pages of different sizes between heterogeneous processors
952014028135609/18/14Microcontroller for memory management unit
962014028135709/18/14Common pointers in unified virtual memory system
972014028135809/18/14Migration scheme for unified virtual memory system
982014028136409/18/14Microcontroller for memory management unit
992014028136509/18/14Frame buffer access tracking via a sliding window in a unified virtual memory system
1002014028138309/18/14Ground-referenced single-ended signaling connected graphics processing unit multi-chip module
1012014028139209/18/14Profiling code portions to generate translations
1022014028160309/18/14System, method, and computer program product for allowing a head to enter a reduced power mode
1032014028165209/18/14Data synchronization across asynchronous boundaries using selectable synchronizers to minimize latency
1042014028167909/18/14Selective fault stalling for a gpu memory pipeline in a unified virtual memory system
1052014028172709/18/14Grouping and analysis of data access hazard reports
1062014028230909/18/14System, method, and computer program product for constructing a data flow and identifying a construct
1072014028231309/18/14System, method, and computer program product for applying a callback function to data values
1082014028232709/18/14Cutter in diagnosis (cid) a method to improve the throughput of the yield ramp up process
1092014028238209/18/14System, method, and computer program product for altering a line of code
1102014028239009/18/14System, method, and computer program product for creating a compute construct
1112014028256609/18/14System and method for hardware scheduling of indexed barriers
1122014025317509/11/14System, method, and computer program product for automatic two-phase clocking
1132014025334909/11/14Window-enabled time-to-digital converter and method of detecting phase of a reference signal
1142014025341309/11/14System, method, and computer program product for representing a group of monitors participating in a desktop spanning environment to an operating system
1152014025355509/11/14Multiresolution consistent rasterization
1162014025429809/11/14Variable dynamic memory refresh
1172014025776909/11/14Parallel algorithm for molecular dynamics simulation
1182014025869309/11/14System and method for hardware scheduling of conditional barriers and impatient barriers
1192014025901609/11/14System and method for runtime scheduling of gpu tasks
1202014025912809/11/14Access authentication method and system
1212014024702509/04/14Multiphase current-parking switching regulator
1222014023944408/28/14Buried tsv's used for decaps
1232014024001608/28/14Low clock energy double-edge-triggered flip-flop circuit
1242014024032508/28/14Increased expansion port utilization in a motherboard of a data processing device by a graphics processing unit (gpu) thereof
1252014024032908/28/14Graphics processing unit with a texture return buffer and a texture queue
1262014024033008/28/14Display multiplier providing independent pixel resolutions
1272014024033708/28/14Graphics processing unit with a texture return buffer and a texture queue
1282014024091808/28/14Heat sink with an integrated vapor chamber
1292014024146208/28/14Circuit and method for envelope tracking and envelope-tracking transmitter for radio-frequency transmission
1302014024422108/28/14Parallel linear complementarity solver for rigid body dynamics
1312014024422208/28/14Modified effective mass for parallel rigid body simulation
1322014024454808/28/14System, method, and computer program product for classification of silicon wafers using radial support vector machines to process ring oscillator parametric data
1332014024470308/28/14System, method, and computer program product for implementing large integer operations on a graphics processing unit
1342014024492108/28/14Asymmetric multithreaded fifo memory
1352014023236008/21/14Predictive current sensing
1362014023236108/21/14Pulsed current sensing
1372014023236808/21/14Electric power conversion with assymetric phase response
1382014023254008/21/14System, method, and computer program product for implementing a power saving technique using a proximity sensor controlled display
1392014023266408/21/14Synchronized touch input recognition
1402014023272908/21/14Power efficient attribute handling for tessellation and geometry shaders
1412014023361208/21/14Technique for optimizing the phase of a data signal transmitted across a communication link
1422014023361608/21/14Communication system and method
1432014023361708/21/14Communication system and method
1442014023715308/21/14Device-ready-status to function-ready-status conversion
1452014023718708/21/14Adaptive multilevel binning to improve hierarchical caching
1462014023718908/21/14Compression status bit cache and backing store
1472014022557908/14/14Current-parking switching regulator upstream controller
1482014022566208/14/14Low-voltage, high-accuracy current mirror circuit
1492014022590208/14/14Image pyramid processor and method of multi-resolution image processing
1502014022807708/14/14Mobile computing device with expanded display size
1512014022975408/14/14Power telemetry remote monitoring
1522014022978308/14/14In-circuit test structure for printed circuit board
1532014022993508/14/14Virtual interrupt delivery from a graphics processing unit (gpu) of a computing system without hardware support therefor
1542014022995308/14/14System, method, and computer program product for management of dependency between tasks
1552014021800108/07/14Current-parking switching regulator downstream controller pre-driver
1562014021808408/07/14Approach to clock frequency modulation of a fixed frequency clock source
1572014021833208/07/14Flat panel electronic device
1582014021837608/07/14System and method for image processing
1592014021837908/07/14Device, system and method for transferring network data
1602014021839008/07/14Modulated and blended anti-aliasing
1612014021878708/07/14Flat panel electronic apparatus and display panel thereof
1622014021900708/07/14Dram with segmented page configuration
1632014021948208/07/14Flat panel electronic device and audio playing apparatus thereof
1642014022105408/07/14Saving power in a mobile terminal
1652014022108708/07/14Handheld gaming console
1662014022321908/07/14Clock frequency controller for a processor and method of operation thereof
1672014022322108/07/14Approach to clock frequency modulation of a fixed frequency clock source
1682014022323608/07/14Device for testing a graphics card
1692014022342008/07/14Convergence analysis in multithreaded programs
1702014020859007/31/14Process for manufacturing a printed circuit board having high density microvias formed in a thick substrate
1712014021042907/31/14Current-parking switching regulator with a split inductor
1722014021043407/31/14Current-parking switching regulator downstream controller
1732014021065607/31/14Circuit for implementing a continuous-time deglitching technique for digital analog converters
1742014021169207/31/14Communication system and method
1752014021434207/31/14Verification of test program stability and wafer fabrication process sensitivity
1762014021523607/31/14Power-efficient inter processor communication scheduling
1772014020400507/24/14System, method, and computer program product for distributed processing of overlapping portions of pixels
1782014020409807/24/14System, method, and computer program product for graphics processing unit (gpu) demand paging
1792014020410607/24/14Shader program attribute storage
1802014020465707/24/14Sram voltage assist
1812014020468707/24/14System and method for performing address-based sram access assists
1822014019883907/17/14Low latency sub-frame level video decoding
1832014019892307/17/14Real time audio echo and background noise reduction for a mobile device
1842014020005107/17/14Radio frequency identification on mobile computing device
1852014019076307/10/14Ported enclosure and automated equalization of frequency response in a micro-speaker audio system
1862014019206607/10/14Parallel processor with integrated correlation and convolution engine
1872014019300207/10/14Ported enclosure and automated equalization of frequency response in a micro-speaker audio system
1882014019559407/10/14Method and system for distributed processing, rendering, and displaying of content
1892014019559807/10/14System and method for computer peripheral access from cloud computing devices
1902014019591207/10/14Method and system for simultaneous display of video content
1912014019604307/10/14System and method for re-factorizing a square matrix into lower and upper triangular matrices on a parallel processor
1922014018395107/03/14Super n-phase switching mode power supply
1932014018417907/03/14Efficient voltage sensing systems and methods
1942014018426807/03/14Power conservation using gray-coded address sequencing
1952014018450807/03/14Universal adaptive game controller
1962014018451307/03/14Softkey magnification on touch screen
1972014018451707/03/14Early drawing system and method to improve touch screen response
1982014018458307/03/14Method and apparatus to reduce panel power through horizontal interlaced addressing
1992014018460107/03/14System and method for frame buffer decompression and/or compression
2002014018460307/03/14Method to improve usability of high pixel density displays
2012014018461107/03/14Method and apparatus for sending partial frame updates rendered in a graphics processor to a display using framelock signals
2022014018461207/03/14Variable-width differential memory compression
2032014018461607/03/14System, method, and computer program product for identifying a faulty processing unit
2042014018461707/03/14Mid-primitive graphics execution preemption
2052014018462507/03/14Stutter buffer transfer techniques for display systems
2062014018462607/03/14Frame times by dynamically adjusting frame buffer resolution
2072014018462707/03/14Progressive lossy memory compression
2082014018462907/03/14Method and apparatus for synchronizing a lower bandwidth graphics processor with a higher bandwidth display using framelock signals
2092014018463207/03/14Method and system for index compression for fixed block size texture formats and for non-linear interpolation of index values along an edge in a tile
2102014018463307/03/14Conservative bounding region rasterization
2112014018466707/03/14Display device with binary mode amoled pixel pattern
2122014018481307/03/14Lens shading calibration for cameras
2132014018489407/03/14System, method, and computer program product implementing an image processing pipeline for high-dynamic range images
2142014018563307/03/14Flexible threshold counter for clock-and-data recovery
2152014018585207/03/14Audio channel mapping in a portable electronic device
2162014018595107/03/14Summed area computation using ripmap of partial sums
2172014018595207/03/14System, method, and computer program product for implementing a spatially varying unsharp mask noise reduction filter
2182014018733107/03/14Latency reduction by sub-frame encoding and transmission
2192014018896307/03/14Efficient correction of normalizer shift amount errors in fused multiply add operations
2202014018909107/03/14Network adaptive latency reduction through frame rate control
2212014018918007/03/14Method and system for changing bus direction in memory systems
2222014018926007/03/14Approach for context switching of lock-bit protected memory
2232014018931007/03/14Fault detection in instruction translations
2242014018931307/03/14Queued instruction re-dispatch after runahead
2252014018931607/03/14Execution pipeline data forwarding
2262014018932907/03/14Cooperative thread array granularity context switch during trap handling
2272014018937507/03/14Distributed power delivery to a processing unit
2282014018938607/03/14Supply-voltage control for device power management
2292014018945207/03/14System for reducing peak power during scan shift at the local level for scan based tests
2302014018945407/03/14Global low power capture scheme for cores
2312014018945507/03/14System for reducing peak power during scan shift at the global level for scan based tests
2322014018954407/03/14Web-based graphics development system and method of graphics program interaction therewith
2332014018964707/03/14System and method for debugging an executing general-purpose computing on graphics processing units (gpgpu) application
2342014018964807/03/14Facilitated quality testing
2352014018969807/03/14Approach for a configurable phase-based priority scheduler
2362014017561906/26/14Stripline and reference plane implementation for interposers using an implant layer
2372014017566506/26/14Chip package using interposer substrate with through-silicon vias
2382014017568106/26/14Absorbing excess under-fill flow with a solder trench
2392014017604106/26/14Semiconductor thermoelectric module charger for mobile computing device
2402014017611606/26/14Quantifying silicon degradation in an integrated circuit
2412014017644006/26/14Apparatus and system for implementing a wireless mouse using a hand-held device
2422014017653206/26/14Method for image correction and an electronic device embodying the same
2432014017654506/26/14System, method, and computer program product implementing an algorithm for performing thin voxelization of a three-dimensional model
2442014017654606/26/14Shadow softening graphics processing unit and method
2452014017654706/26/14Programmable blending via multiple pixel shader dispatches
2462014017654806/26/14Facial image enhancement for video communication
2472014017656806/26/14Programmable blending in multi-threaded processing units
2482014017656906/26/14Graphics processing unit employing a standard processing unit and a method of constructing a graphics processing unit
2492014017657506/26/14System, method, and computer program product for tiled deferred shading


ARCHIVE: New 2014 2013 2012 2011 2010 2009



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This listing is an abstract for educational and research purposes is only meant as a recent sample of applications filed, not a comprehensive history. Freshpatents.com is not affiliated or associated with Nvidia Corporation in any way and there may be associated servicemarks. This data is also published to the public by the USPTO and available for free on their website. Note that there may be alternative spellings for Nvidia Corporation with additional patents listed. Browse our Agent directory for other possible listings. Page by FreshPatents.com

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