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Sandisk Technologies Inc
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Sandisk Technologies Inc patents


Recent patent applications related to Sandisk Technologies Inc. Sandisk Technologies Inc is listed as an Agent/Assignee. Note: Sandisk Technologies Inc may have other listings under different names/spellings. We're not affiliated with Sandisk Technologies Inc, we're just tracking patents.

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Dummy word line control scheme for non-volatile memory

A memory system includes blocks (or other groupings) of memory cells including data memory cells and dummy memory cells. In order to mitigate program disturb or other issues, the memory system applies a gate voltage based on temperature to all or a subset of the dummy memory cells as part... Sandisk Technologies Inc

Using non-volatile memory bad blocks

A system for using bad blocks in a memory system is proposed. The system includes accessing an identification of a plurality of bad blocks and corresponding error codes which, for example, were generated during a manufacturing test and stored on the memory integrated circuit. The system determines which blocks of... Sandisk Technologies Inc

Multi-die data storage device with in-memory parity circuitry

A data storage device includes a first memory die having memory cells and a first transfer data latch. The data storage device also includes a second memory die having second memory cells and a second transfer data latch. A bus is coupled to the first memory die and the second... Sandisk Technologies Inc

Systems and methods for processing a submission queue

A data storage device includes a memory and a controller coupled to the memory. The controller is configured to select a submission queue from a set of submission queues of an access device based at least in part on availability of space in a completion queue of the access device.... Sandisk Technologies Inc

Methods, systems and computer readable media for optimizing storage device bus and resource utilization by host realignment

A method for optimizing storage device bus and resource utilization using host realignment includes detecting a first write command for writing data from a host device to a storage device. The method further includes determining whether the first write command includes addressing that is misaligned with regard to storage device... Sandisk Technologies Inc

Systems and methods for performing direct memory access (dma) operations

A data storage device includes a memory and a controller coupled to the memory. The controller includes an interface to enable the controller to be coupled to an access device that includes a direct memory access (DMA) engine. The controller is configured to instruct the access device to perform an... Sandisk Technologies Inc

Storage improved command flow

A storage system and method for improved command flow are provided. In one embodiment, a storage system receives a request from a host for an indication of which command(s) stored in the storage system are ready for execution; in response to the request, provides the host with the indication of... Sandisk Technologies Inc

Independent multi-plane read and low latency hybrid read

Read operations are performed in a multi-plane memory device. A state machine interfaces an external controller to each plane of memory cells to allow reading from selected word lines in the planes. In one approach, different types of read operations are performed in different planes, such as a multi-level cell... Sandisk Technologies Inc

Storage recovering data corrupted in a host memory buffer

A storage system and method for recovering data corrupted in a host memory buffer are provided. In one embodiment, a storage system is provided comprising a non-volatile memory and a controller in communication with the non-volatile memory. The controller is configured to receive a logical-to-physical map from a volatile memory... Sandisk Technologies Inc

Memory interface command queue throttling

A storage device with a memory may implement command throttling in order to control power usage. The throttling may be based on modifications of certain memory parameters, such as a reduction in clock rate, bus speed, operating voltage, or command type changes. The throttling may be performed at a back... Sandisk Technologies Inc

Dummy voltage to reduce first read effect in memory

Techniques are provided for improving the accuracy of read operations of memory cells, where the threshold voltage (Vth) of a memory cell can shift depending on when the read operation occurs. In one aspect, a dummy voltage is applied to the word lines to cause a coupling up of the... Sandisk Technologies Inc

Data storage device having internal tagging capabilities

A data storage device includes a memory and a controller. The memory includes a first partition and a second partition. The controller includes a pattern detector that is configured to detect one or more tags in data from an access device to be stored in the first partition. The controller... Sandisk Technologies Inc

Memory erase management

A device includes a memory and a controller coupled to the memory. The controller is configured to maintain a first address translation table associated with the memory and a second address translation table associated with the memory. The controller is further configured to receive a command to erase the memory.... Sandisk Technologies Inc

Out of order read transfer with host memory buffer

A storage device may utilize a host memory buffer for re-ordering commands in a submission queue. Out of order commands in a submission queue that uses host virtual buffers that are not the same size may be difficult to search. Accordingly, commands in a submission queue may be correctly ordered... Sandisk Technologies Inc

Method and system for managing data in non-volatile memory

Methods and systems for managing data storage in a non-volatile memory system are disclosed. The method may include receiving data, determining a data classification for the received data from a predetermined plurality of data classifications, writing the received data to an open block having only data of a same data... Sandisk Technologies Inc

Method and system for compacting data in non-volatile memory

A system and method for compacting data in a non-volatile memory system that may reduce the need for control data updates is described. The method may include copying valid data from a source block to a destination block, and also writing new host data to the destination block, such that... Sandisk Technologies Inc

Filament confinement in reversible resistance-switching memory elements

A method is provided that includes providing a memory device including a first word line, a vertical bit line, a non-volatile memory material disposed between the first word line and the vertical bit line, and a memory cell disposed between the first word line and the vertical bit line. The... Sandisk Technologies Inc

System and erase detection before programming of a storage device

Systems and methods for detecting program disturb and for programming/reading based on the detected program disturb are disclosed. Program disturb comprises unintentionally programming an unselected section of memory during the program operation of the selected section of memory. To reduce the effect of program disturb, the section of memory is... Sandisk Technologies Inc

Three dimensional nand memory device with common bit line for multiple nand strings in each memory block

Two vertical NAND strings can share a common bit line by providing two pairs of drain select transistors. Channels of each vertical NAND string containing an adjoining pair of drain select transistors are incorporated into a respective vertical semiconductor channel, which is adjoined to a respective drain region which is... Sandisk Technologies Inc

Error correction code processing and data shaping

A device includes a memory and a controller including a data shaping engine. The data shaping engine is configured to apply a mapping to input data that includes one or more m-tuples of bits to generate transformed data. The transformed data includes one or more n-tuples of bits, and n... Sandisk Technologies Inc

Data coding

A data storage device includes an encoder and a memory that includes multiple storage elements. The encoder is configured to receive input data and to map at least one input group of bits of the input data to generate output data including at least one output group of bits. Each... Sandisk Technologies Inc

Three-dimensional memory device containing annular etch-stop spacer and making thereof

An etch-stop annular spacer can be formed around a protruding portion of a sacrificial pillar structure that fills a lower memory opening through a first insulating cap layer and through an underlying first alternating stack of first insulating layers and first spacer layers. The etch-stop layer comprises a material that... Sandisk Technologies Inc

Wearable device with receptacle to receive an audio device and operating same

An apparatus includes a first transceiver of a wearable device. The first transceiver is configured to communicate using a first communication network having a first communication range. The apparatus further includes a second transceiver of the wearable device. The second transceiver is configured to communicate using a second communication network... Sandisk Technologies Inc

Data register copying for non-volatile storage array operations

Apparatuses, systems, methods, and computer program products are disclosed for data register copying for a non-volatile storage array. An apparatus may include an array of non-volatile storage cells. A set of write buffer data registers may be configured to store target data for a program operation for an array. Write... Sandisk Technologies Inc

Voltage regulator with fast overshoot settling response

A voltage regulator circuit is provided in which voltage overshoots are quickly dissipated using a discharge path which is connected to an output of the voltage regulator. Circuitry for controlling the discharge path is provided using internal currents of an error amplifier to provide a space-efficient and power-efficient design with... Sandisk Technologies Inc

Adaptive determination of program parameter using program of erase rate

Techniques are provided for optimizing the programming of memory cells by obtaining a metric which indicates a program or erase rate of the memory cells. In one approach, a count of pulses used to program the cells to different verify levels of respective data states is stored. A slope of... Sandisk Technologies Inc

Efficient peak current management in a multi-die stack

Techniques for managing the distribution of power among competing electronic devices such as semiconductor die are presented. Each device may be connected to a common power supply and sources a current on a load bus based on an estimated current consumption of a next desired state. However, before doing this,... Sandisk Technologies Inc

Dynamic-shifting redundancy mapping for non-volatile data storage

Apparatuses, systems, methods, and computer program products are disclosed for redundancy mapping. A controller is configured to determine that one or more defects affect a subset of a first group of cells and a subset of a second group of cells of a non-volatile memory medium. A non-volatile memory medium... Sandisk Technologies Inc

Systems and methods for decoupling host commands in a non-volatile memory system

Systems and methods for decoupling host commands in a non-volatile memory system are disclosed. In one implementation, a non-volatile memory system includes a non-volatile memory and a controller in communication with the non-volatile memory. The controller is configured to translate a first command that is formatted according to a communication... Sandisk Technologies Inc

Memory fast firmware download

A memory system and method for fast firmware download are provided. In one embodiment, a memory system is presented comprising non-volatile memory, volatile memory, and a controller. The controller is configured to receive a boot loader and firmware; store the boot loader and firmware in the volatile memory; execute the... Sandisk Technologies Inc

Non-volatile memory with corruption recovery

A non-volatile storage system is provided that includes a mechanism to restore data that has been corrupted beyond the limits of traditional error correction. The system creates first level parity information for each subset of data to form multiple sets of programmable data, with each set of programmable data including... Sandisk Technologies Inc

Mobile device and synchronizing use of the mobile device's communications port among a plurality of applications

A mobile device and method for synchronizing use of the mobile device's communications port among a plurality of applications are provided. In one embodiment, a mobile device is provided comprising a communications port configured to connect with a mobile device accessory and a processor. The processor is configured to synchronize... Sandisk Technologies Inc

Word line decoder circuitry under a three-dimensional memory array

The total chip area for a three-dimensional memory device can be reduced employing a design layout in which the word line decoder circuitry is formed underneath an array of memory stack structures. The interconnection between the word lines and the word line decoder circuitry can be provided by forming discrete... Sandisk Technologies Inc

Three dimensional memory device containing discrete silicon nitride charge storage regions

Discrete silicon nitride portions can be formed at each level of electrically conductive layers in an alternating stack of insulating layers and the electrically conductive layers. The discrete silicon nitride portions can be employed as charge trapping material portions, each of which is laterally contacted by a tunneling dielectric portion... Sandisk Technologies Inc

08/17/17 / #20170236871

Implementation of vmco area switching cell to vbl architecture

Systems and methods for improving performance of a non-volatile memory that utilizes a Vacancy Modulated Conductive Oxide (VMCO) structure are described. The VMCO structure may include a layer of amorphous silicon (e.g., a Si barrier layer) and a layer titanium oxide (e.g., a TiO2 switching layer). In some cases, the... Sandisk Technologies Inc

08/10/17 / #20170228167

Memory simplifying scheduling on a flash interface module and reducing latencies in a multi-die environment

A memory system and method for simplifying scheduling on a flash interface module and reducing latencies in a multi-die environment are provided. In one embodiment, a memory die is provided comprising a memory array, an interface, at least one register, and circuitry. The circuitry is configured to receive, via the... Sandisk Technologies Inc

08/10/17 / #20170229472

Multi-tier replacement memory stack structure integration scheme

A memory opening can be formed through a multiple tier structure. Each tier structure includes an alternating stack of sacrificial material layers and insulating layers. After formation of a dielectric oxide layer, the memory opening is filled with a sacrificial memory opening fill structure. The sacrificial material layers are removed... Sandisk Technologies Inc

08/03/17 / #20170220267

Apparatus and data sequencing

An apparatus includes a data sequencing engine configured to receive first data and an identification of a first data container associated with the first data and to allocate the first data to a first data stream of multiple data streams based on the identification. The apparatus further includes at least... Sandisk Technologies Inc

08/03/17 / #20170220634

Method and device to access auxiliary mapping data for a data structure

A method includes accessing, in response to initiating an operation targeting data, auxiliary mapping data to determine whether the auxiliary mapping data includes an indication of a key associated with a node of a hierarchical data structure that is associated with the data. In response to the auxiliary mapping data... Sandisk Technologies Inc

08/03/17 / #20170221756

Three-dimensional memory device containing an aluminum oxide etch stop layer for backside contact structure and making thereof

Collateral etching of a dielectric material around a trench during formation of a substrate contact via structure can be avoided employing an aluminum oxide layer. The aluminum oxide layer functions as an etch stop layer during an anisotropic etch that removes horizontal portions of an insulating material layer to form... Sandisk Technologies Inc

07/27/17 / #20170213817

Esd centric low-cost io layout design topology

An integrated circuit may include a plurality of input/output (I/O) cells used for communicating signals, power, and ground to and from a core of the integrated circuit. The I/O cells may each include a bond pad formed in one or more top metal layers. One or more of the bond... Sandisk Technologies Inc

07/13/17 / #20170199536

Fast settling low dropout voltage regulator

Methods and systems for reducing the settling time of a voltage regulator are described. In some cases, the settling time of the voltage regulator may be reduced by detecting that the voltage regulator is transitioning from a standby mode to an active mode and drawing additional current from the output... Sandisk Technologies Inc

07/13/17 / #20170199703

Physical addressing schemes for non-volatile memory systems employing multi-die interleave schemes

A non-volatile memory system may include a plurality of memory dies and a controller that is configured to write data into the memory dies according to a multi-die interleave scheme. A total number of the dies may be a non-multiple of a die component number of the interleave scheme. The... Sandisk Technologies Inc

07/13/17 / #20170200501

Non-volatile memory with efficient programming

A non-volatile memory system includes a plurality of NAND strings (or other arrangements) that form a monolithic three dimensional memory structure, bit lines, word lines, and one or more control circuits. Multiple NAND strings of the plurality of NAND strings have different select gates connected to different select lines. The... Sandisk Technologies Inc

06/29/17 / #20170185472

Parity storage management

Apparatuses, systems, methods, and computer program products are disclosed for parity storage management. A system includes a plurality of storage elements. A system includes a controller that selects a parity storage element from a plurality of storage elements. A parity storage element has an error rate higher than other elements... Sandisk Technologies Inc

06/08/17 / #20170160317

On-die measurement technique for i/o dc parameters vol and voh

A high output voltage VOH level and a low output voltage VOL level parametric test system may include test circuitry coupled to output nodes of input/output (I/O) driver circuits. The test circuitry may source and sink current to the output nodes while the I/O driver circuits are in pull down... Sandisk Technologies Inc

06/08/17 / #20170160931

Writing logical groups of data to physical locations in memory using headers

The various implementations described herein include systems, methods and/or devices for storing data in a storage device. In one aspect, commands are executed, each command for storing in a storage device a logical group of data comprising one or more logical portions and having a logical address. For each command,... Sandisk Technologies Inc

06/08/17 / #20170160932

Reading logical groups of data from physical locations in memory using headers

The various implementations described herein include systems, methods and/or devices for reading data stored in a storage device. In one aspect, read commands are executed, each command for reading a requested logical group of data from a specified logical address comprising one or more logical portions. A first physical location... Sandisk Technologies Inc

06/08/17 / #20170160957

Efficiently managing unmapped blocks to extend life of solid state drive

Systems and methods disclosed herein allow for efficiently managing unmapped blocks to extend life of solid-state drives. In one aspect, a method includes: determining a quantity of unmapped storage units in the storage device and operating the storage device in a first mode of operation while the quantity satisfies a... Sandisk Technologies Inc

06/08/17 / #20170160976

Efficiently managing unmapped blocks to extend life of solid state drive with low over-provisioning

Systems and methods disclosed herein allow for efficiently managing unmapped blocks to extend life of solid-state drives. In one aspect, a method includes: measuring a level of over-provisioning (“OP”) in a storage device and operating it in a first mode of operation while the OP satisfies a first threshold. The... Sandisk Technologies Inc

06/08/17 / #20170162592

Vertical resistor in 3d memory device with two-tier stack

A vertical, columnar resistor in a semiconductor device is provided, along with techniques for fabricating such a resistor. The resistor may be provided in a peripheral area of a 3D memory device which has a two-tier or other multi-tier stack of memory cells. The structure and fabrication of the resistor... Sandisk Technologies Inc

05/25/17 / #20170148800

Three dimensional nand device containing dielectric pillars for a buried source line and making thereof

A three-dimensional memory device includes an alternating stack of electrically conductive layers and insulating layers located over a substrate, an array of memory stack structures, each memory stack structure extending through the alternating stack and including a memory film and a semiconductor channel laterally surrounded by the memory film, and... Sandisk Technologies Inc

05/25/17 / #20170148805

3d semicircular vertical nand string with recessed inactive semiconductor channel sections

A vertical memory device including dual memory cells per level in each memory opening can have dielectric separator dielectric structures that protrude into a facing pair of sidewalls of the memory stack structure within the memory opening. A pair of inactive sections of a vertical semiconductor channel facing the dielectric... Sandisk Technologies Inc

05/18/17 / #20170139590

Memory improving write performance in a multi-die environment

A memory system and method for improving write performance in a multi-die environment are disclosed. In one embodiment, a memory system is provided comprising a plurality of memory dies and a controller. The controller is configured to determine a programming status of each of the plurality of memory dies and... Sandisk Technologies Inc

05/04/17 / #20170123446

On-chip self calibration of io driver impedance for pvt variation using dynamically adjusted internal reference

A PVT calibration system of an electronic device may select a temperature band of a plurality of temperature bands based on a detected device temperature. A comparator of the calibration system may compare a process characterization voltage with one or both of an upper bound level and a lower bound... Sandisk Technologies Inc

05/04/17 / #20170123655

System and managing extended maintenance scheduling in a non-volatile memory

Systems and methods for managing regular maintenance operations in combination with infrequent extended maintenance operations in a non-volatile memory are disclosed. The method may include executing portions of the extended maintenance over the course of multiple regular maintenance operations. A memory system may include non-volatile memory and a controller configured... Sandisk Technologies Inc

05/04/17 / #20170123662

System and data compression

A data storage device includes a shaping engine and a compression engine. The shaping engine is configured to shape first data to generate second data. The compression engine is configured to compress the second data to generate third data.... Sandisk Technologies Inc

05/04/17 / #20170123664

Method and system for programming a multi-layer non-volatile memory having a single fold data path

A method is disclosed for only permitting data from a host to be written to a first non-volatile memory layer and only permitting data to be written into a second non-volatile memory layer via a maintenance operation over a single data path between the layers. The single data path may... Sandisk Technologies Inc

05/04/17 / #20170123666

System and managing maintenance scheduling in a non-volatile memory

Systems and methods for managing programming schedules of programming host data and maintenance operations in a non-volatile memory are disclosed. Foreground maintenance schedule cycles combining host data programming and maintenance operations are described to balance free space generation and consumption in a given non-volatile memory die of a memory system.... Sandisk Technologies Inc

05/04/17 / #20170123682

System and precision interleaving of data writes in a non-volatile memory

Systems and methods for managing programming schedules of programming host data and maintenance operations in a non-volatile memory are disclosed. A method includes determining multiple integer interleave ratios of host data writes to relocation writes of previously programmed data when non-integer interleave situations are determined for a previously programmed source... Sandisk Technologies Inc

05/04/17 / #20170123705

Convertible leaf memory mapping

Systems, methods and/or devices are used to store metadata in a storage system. In one aspect, an indication of data to be stored by the storage system is received by a computing device including non-volatile memory and a tiered data structure. A leaf having a first leaf type is selected... Sandisk Technologies Inc

05/04/17 / #20170123721

System and utilization of a data buffer by command completion in parts

Systems and methods for managing transfer of data into and out of a host data buffer of a host are disclosed. In one implementation, a partial write completion module of a storage system retrieves from the host, stores in a memory, and acknowledges retrieving and storing with a partial write... Sandisk Technologies Inc

05/04/17 / #20170123722

System and utilization of a data buffer

Systems and methods for managing transfer of data into and out of a host data buffer of a host are disclosed. In one implementation, a partial write completion module of a storage system retrieves from the host, stores in a memory, and acknowledges retrieving and storing with a partial write... Sandisk Technologies Inc

05/04/17 / #20170123726

System and rescheduling host and maintenance operations in a non-volatile memory

Systems and methods for balancing maintenance and programming host data across multiple maintenance source blocks in a non-volatile memory are disclosed. A memory system may include non-volatile memory and a controller configured to execute one or more of the steps of selecting a fixed plurality of maintenance source blocks for... Sandisk Technologies Inc

Patent Packs
05/04/17 / #20170123898

Storage device operations based on bit error rate (ber) estimate

A data storage device may include a non-volatile memory and a controller. According to a first aspect, a bit error rate (BER) estimate may be determined at a memory interface of the controller based on hard bit data from the non-volatile memory. The BER estimate may be used to determine,... Sandisk Technologies Inc

05/04/17 / #20170123902

Partial soft bit read

A data storage device includes a non-volatile memory and a controller coupled to the non-volatile memory. The controller includes an error correction coding (ECC) decoder. The non-volatile memory is configured to sense hard bit data and soft bit data corresponding to multiple ECC codewords from a word line of the... Sandisk Technologies Inc

05/04/17 / #20170123971

User space data storage management

Systems, methods, and/or devices are used to store metadata in a storage system. In one aspect, a first user space module sends a logical memory request to a memory management module of a kernel space module. The logical memory request includes data and metadata. A second user space module obtains... Sandisk Technologies Inc

05/04/17 / #20170123972

Garbage collection based on queued and/or selected write commands

A non-volatile memory system may include a write task queue that queues write commands and a garbage collection module that analyzes information about pending write commands in the write task queue in order to perform garbage collection. Based on its analysis of the write task queue, the garbage collection module... Sandisk Technologies Inc

05/04/17 / #20170123991

System and utilization of a data buffer in a storage device

Systems and methods for managing a data buffer of a non-volatile memory system are disclosed. The method may include a controller of a storage system retrieving host data, storing the retrieved data in a data buffer and transferring the data to a non-volatile memory. The controller may then overwrite the... Sandisk Technologies Inc

05/04/17 / #20170123994

Handling of plane failure in non-volatile storage

Technology is described herein for reclaiming a memory device that has a defective plane. A solution allows a memory device with a defective plane to operate as a single plane device. The memory device with the defective plane may be used without any changes to the memory controller. Thus, the... Sandisk Technologies Inc

05/04/17 / #20170124007

Data transfer rate adjustment

A storage device may be configured to adjust a frequency of a clock signal. The clock signal may be associated with a data transfer rate of data to be communicated between a controller and a memory of the storage device. In some implementations, the frequency maybe adjusted responsive to at... Sandisk Technologies Inc

05/04/17 / #20170125068

Device soft-start management for enumeration problems with usb hosts

An electronic device may receive a supply voltage from another external device, and detect when a level of the supply voltage drops below a threshold. In response, a controller of the electronic device may deactivate an interface configured for communication with the other electronic device. The controller may manage time... Sandisk Technologies Inc

05/04/17 / #20170125070

System and hibernation using a delta generator engine

Apparatus and method for hibernating part of a memory device are disclosed. A memory device may seek to reduce its power consumption by entering deep power down (DPD) mode. In DPD mode, power to a section of volatile memory in the memory device may be removed. To that end, the... Sandisk Technologies Inc

05/04/17 / #20170125087

Dynamic threshold voltage compaction for non-volatile memory

Based on performance during programming, the non-volatile memory cells are classified as fast programming memory cells and slow programming memory cells (or other classifications). At a separate time for each programmed state, threshold voltage distributions are compacted based on the classification.... Sandisk Technologies Inc

05/04/17 / #20170125104

Non-volatile memory systems with multi-write direction memory units

Non-volatile memory systems with multi-write direction memory units are disclosed. In one implementation an apparatus comprises a non-volatile memory and a controller in communication with the non-volatile memory. The controller is configured to select an empty memory block of the non-volatile memory for the storage of data; examine an identifier... Sandisk Technologies Inc

05/04/17 / #20170125117

Smart skip verify mode for programming a memory device

Techniques are provided to adaptively determine when to begin verify tests for a particular data state based on a programming progress of a set of memory cells. A count is made in a program-verify iteration of memory cells which pass a verify test of a state N. The count is... Sandisk Technologies Inc

05/04/17 / #20170125430

Field effect transistor with a multilevel gate electrode for integration with a multilevel memory device

A switching field effect transistor and the memory devices can be formed employing a same set of processing steps. An alternating stack of insulating layers and sacrificial material layers is formed over a substrate. Memory stack structures for memory devices and gate dielectric-channel structures for the field effect transistor can... Sandisk Technologies Inc

05/04/17 / #20170125436

Crystalinity-dependent aluminum oxide etching for self-aligned blocking dielectric in a memory structure

A method of forming a device includes forming an alternating stack of insulating layers and sacrificial material layers over a substrate, forming a memory opening extending through the alternating stack, and forming an aluminum oxide layer on sidewall surfaces of the sacrificial material layers and on sidewall surfaces of the... Sandisk Technologies Inc

05/04/17 / #20170125437

Three-dimensional memory devices having a shaped epitaxial channel portion and making thereof

An alternating stack of insulating layers and sacrificial material layers is formed over a substrate. A dielectric collar structure can be formed prior to formation of an epitaxial channel portion, and can be employed to protect the epitaxial channel portion during replacement of the sacrificial material layers with electrically conductive... Sandisk Technologies Inc

Patent Packs
05/04/17 / #20170125438

Three-dimensional memory devices having a shaped epitaxial channel portion

An alternating stack of insulating layers and sacrificial material layers is formed over a substrate. A dielectric collar structure can be formed prior to formation of an epitaxial channel portion, and can be employed to protect the epitaxial channel portion during replacement of the sacrificial material layers with electrically conductive... Sandisk Technologies Inc

05/04/17 / #20170125538

Robust nucleation layers for enhanced fluorine protection and stress reduction in 3d nand word lines

A silicon-containing nucleation layer can be employed to provide a self-aligned template for selective deposition of tungsten within backside recesses during formation of a three-dimensional memory device. The silicon-containing nucleation layer may remain as a silicon layer, converted into a tungsten silicide layer, or replaced with a tungsten nucleation layer.... Sandisk Technologies Inc

05/04/17 / #20170126001

Esd protection circuit with two discharge time periods

An electrostatic discharge protection circuit may include discharge path circuitry to discharge charge on a supply line in response to detection of an ESD event. The charge on the supply line may be discharged through the discharge path circuitry from when a first timing window opens until a second timing... Sandisk Technologies Inc

05/04/17 / #20170126213

Loop delay optimization for multi-voltage self-synchronous systems

A clock-receiving system may receive a host clock signal on a communications bus from a clock-sending system. Circuitry of a critical path of the clock-receiving system may communicate the clock signal to a multiplexer configured directly behind output driver circuitry. Core logic circuitry and data path circuitry may communicate pairs... Sandisk Technologies Inc

05/04/17 / #20170125101

Program sequencing

Apparatuses, systems, methods, and computer program products are disclosed for program sequencing. An apparatus includes a block of non-volatile storage cells having a plurality of word lines. The word lines are organized into a monotonically increasing sequence. The apparatus includes a controller for the block. The controller is configured to... Sandisk Technologies Inc

04/27/17 / #20170116070

Systems and methods of detecting errors during read operations and skipping word line portions

A device includes a non-volatile memory and a controller coupled to the non-volatile memory. The non-volatile memory includes a plurality of blocks and each block of the plurality of blocks includes a plurality of word lines. The controller is configured to receive data read from a word line of a... Sandisk Technologies Inc

04/27/17 / #20170116075

System for handling erratic word lines for non-volatile memory

A non-volatile storage system identifies a word line with an open neighbor word line and determines whether data stored in non-volatile memory cells connected to the identified word line has an error condition. If the data does have an error condition, then an attempt is made to fix the data... Sandisk Technologies Inc

04/27/17 / #20170116077

Pipelined decoder with syndrome feedback path

A device includes a memory a memory configured to store syndromes. The device also includes a pipelined data processing unit and routing circuitry. The routing circuitry includes a first input coupled to the memory and includes a second input coupled to an output of the pipelined data processing unit.... Sandisk Technologies Inc

04/27/17 / #20170116078

Syndrome-based codeword decoding

A device includes a memory device coupled to an error correction code (ECC) decoder. The ECC decoder is configured to generate syndromes corresponding to a representation of a codeword received from the memory device and to perform a single decoding operation on a representation of data included in the representation... Sandisk Technologies Inc

04/27/17 / #20170116117

Identifying storage descriptors based on a metric

A data storage device includes a non-volatile memory device and a controller including a first memory. The first memory stores data indicating a metric. The controller is configured to receive data corresponding to a portion of a second memory of an access device. Multiple portions of the second memory are... Sandisk Technologies Inc

04/27/17 / #20170117021

Multi-level data folding

A device includes a memory including a first set of storage elements and a second set of storage elements. The device further includes circuitry coupled to the memory and configured to perform a data folding operation to fold second data from the second set of storage elements with respect to... Sandisk Technologies Inc

04/27/17 / #20170117024

Bit line charging for a device

An apparatus includes a first bit line coupled to a first storage element and a second bit line coupled to a second storage element. A first bit line charging circuit is coupled to the first bit line and is configured to charge the first bit line to a first bias... Sandisk Technologies Inc

04/27/17 / #20170117053

Systems and methods to compensate for threshold voltage shifts

A data storage device includes a memory including multiple storage elements. The data storage device also includes circuitry configured to determine, for a particular storage element of the multiple storage elements, an indicator associated with a threshold voltage temperature dependence (TVTD) of the particular storage element.... Sandisk Technologies Inc

04/27/17 / #20170117061

Burn-in memory testing

A method performed by a controller includes initiating a first data write operation and an erase operation on a portion of a non-volatile memory. The first data write operation corresponds to a first write resolution. The method includes initiating a second data write operation to write test data to the... Sandisk Technologies Inc

04/27/17 / #20170117289

Methods and three-dimensional nand non-volatile memory devices with side source line and mechanical support

A method of fabricating a monolithic three dimensional memory structure is provided. The method includes forming a stack of alternating word line and dielectric layers above a substrate, forming a source line above the substrate, forming a memory hole extending through the alternating word line and dielectric layers and the... Sandisk Technologies Inc

04/27/17 / #20170117925

Adaptive scheduler for decoding

A decoder includes a processor and a scheduler coupled to the processor. The processor is configured to process a set of nodes related to a representation of a codeword during a first decode iteration. The nodes are processed in a first order. The scheduler is configured to generate a schedule... Sandisk Technologies Inc

04/27/17 / #20170115884

Data folding in 3d nonvolatile memory

Data that is initially stored in Single Level Cell (SLC) blocks is subsequently copied (folded) to a Multi Level Cell (MLC) block where the data is stored in MLC format, the data copied in a minimum unit of a fold-set, the MLC block including a plurality of separately-selectable sets of... Sandisk Technologies Inc

04/27/17 / #20170116076

Bad column management in nonvolatile memory

When the number of bad columns in a memory or plane is less than a threshold number then a first Error Correction Code (ECC) scheme encodes user data in first pages of a first size. If the number of bad columns is greater than the threshold number then a second... Sandisk Technologies Inc

04/20/17 / #20170109040

Systems and methods for sampling data at a non-volatile memory system

Systems and methods for sampling data at a non-volatile memory system are disclosed. In one implementation, a controller of a non-volatile memory system that is coupled with a host device acquires a read level voltage of a first word line of a memory block of a non-volatile memory of the... Sandisk Technologies Inc

04/20/17 / #20170109078

Memory increasing read parallelism of translation pages

A memory system and method are provided for increasing read parallelism of translation pages. In one embodiment, a memory system is provided comprising a plurality of memory dies, where each memory die is configured with storage space for a portion of a logical-to-physical address map that is distributed among the... Sandisk Technologies Inc

04/20/17 / #20170109096

Detection of a sequential command stream

A data storage device includes a non-volatile memory and a controller coupled to the non-volatile memory. The controller is configured to receive a first command from an access device, the first command associated with a first logical block address (LBA). The controller is also configured to, after receiving the first... Sandisk Technologies Inc

04/20/17 / #20170109233

Data encoding using an adjoint matrix

An apparatus includes an encoder configured to receive data and to encode the data based on an adjoint matrix to generate a codeword. The apparatus further includes a memory coupled to the encoder and configured to store the codeword.... Sandisk Technologies Inc

04/20/17 / #20170110464

Ultrathin semiconductor channel three-dimensional memory devices

An alternating stack of insulating layers and sacrificial material layers is formed over a substrate. Memory openings are formed through the alternating stack to the substrate. After formation of memory film layers, a sacrificial cover material layer can be employed to protect the tunneling dielectric layer during formation of a... Sandisk Technologies Inc

04/20/17 / #20170110470

Methods for manufacturing ultrathin semiconductor channel three-dimensional memory devices

An alternating stack of insulating layers and sacrificial material layers is formed over a substrate. Memory openings are formed through the alternating stack to the substrate. After formation of memory film layers, a sacrificial cover material layer can be employed to protect the tunneling dielectric layer during formation of a... Sandisk Technologies Inc








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