Real Time Touch



new TOP 200 Companies filing patents this week

new Companies with the Most Patent Filings (2010+)




Real Time Touch

Sandisk Technologies Llc patents


Recent patent applications related to Sandisk Technologies Llc. Sandisk Technologies Llc is listed as an Agent/Assignee. Note: Sandisk Technologies Llc may have other listings under different names/spellings. We're not affiliated with Sandisk Technologies Llc, we're just tracking patents.

ARCHIVE: New 2018 2017 2016 2015 2014 2013 2012 2011 2010 2009 | Company Directory "S" | Sandisk Technologies Llc-related inventors


 new patent  Storage operation queue

Apparatuses, systems, methods, and computer program products are disclosed for queuing storage operations. An integrated circuit memory element receives a storage operation command associated with a bank of storage locations of a memory element. An integrated circuit memory element queues a storage operation command for execution on a bank of... Sandisk Technologies Llc

 new patent  Interface for non-volatile memory

Apparatuses, systems, methods, and computer program products are disclosed for accessing non-volatile memory. An apparatus includes one or more memory die. A memory die includes an array of non-volatile memory cells, a set of ports, and an on-die controller. The set of ports includes a first port and a second... Sandisk Technologies Llc

 new patent  Command queue for storage operations

Apparatuses, systems, methods, and computer program products are disclosed for queueing commands for storage operations. An apparatus includes a command queue configured to queue storage commands received at a storage device and a controller for the storage device. A controller is configured to receive a storage command on a first... Sandisk Technologies Llc

 new patent  Command control for multi-core non-volatile memory

Apparatuses, systems, and methods are disclosed for controlling commands for non-volatile memory. An apparatus includes one or more memory die. A memory die includes a command/address buffer, an on-die controller, and a plurality of non-volatile memory cores that share a data path. A core includes an array of non-volatile memory... Sandisk Technologies Llc

 new patent  Interface for non-volatile memory

Apparatuses, systems, methods, and computer program products are disclosed for accessing non-volatile memory. An apparatus includes one or more memory die. A memory die includes an array of non-volatile memory cells, a set of ports, and an on-die controller. A set of ports includes a first port and a second... Sandisk Technologies Llc

 new patent  Storage providing gray levels of read security

A storage system and method for providing gray levels of read security are provided. In one embodiment, a storage system is provided comprising a memory and a controller in communication with the memory. The controller is configured to perform a test of a security feature of the storage system; and... Sandisk Technologies Llc

 new patent  Three-dimensional memory device with self-aligned drain side select gate electrodes and making thereof

A three-dimensional memory device including self-aligned drain select level electrodes is provided. Memory stack structures extend through an alternating stack of insulating layers and spacer material layers. Each of the memory stack structures includes a memory film and a memory level channel portion. Drain select level channel portions are formed... Sandisk Technologies Llc

 new patent  Three-dimensional memory device having a multilevel drain select gate electrode and making thereof

A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate and memory stack structures extending through the alternating stack. Each memory stack structure includes a memory film and a vertical semiconductor channel. An isolation trench laterally extends along a horizontal direction... Sandisk Technologies Llc

 new patent  Three-dimensional memory device having select gate electrode that is thicker than word lines and making thereof

A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, the alternating stack having a memory array region and a contact region containing stepped surfaces, and memory stack structures having a semiconductor channel and a memory film extending through the memory... Sandisk Technologies Llc

 new patent  Methods and three-dimensional nonvolatile memory

A method is provided that includes forming a bit line above a substrate, forming a word line above the substrate, and forming a non-volatile memory cell between the bit line and the word line. The non-volatile memory cell includes a non-volatile memory material coupled in series with an isolation element.... Sandisk Technologies Llc

Method and wear-levelling non-volatile memory

Apparatus and method for performing wear leveling are disclosed. An ordered list of references to each of a set of memory blocks is stored. A set of memory blocks in the ordered list is sequentially allocating. The allocated set of memory blocks in the ordered list are erased in the... Sandisk Technologies Llc

Storage temperature throttling for block reading

A storage system and method for temperature throttling for block reading are provided. In one embodiment, a storage system is provided comprising a memory comprising a plurality of word lines and a controller in communication with the memory. The controller is configured to determine whether a temperature of the memory... Sandisk Technologies Llc

Method and system for write amplification analysis

A method and system for write amplification analysis are provided. In one embodiment, a method is provided that is performed in a computing device. The method comprises determining an amount of data written from the computing device to a storage system over a time period, wherein the storage system comprises... Sandisk Technologies Llc

Optimizing reclaimed flash memory

A memory system or flash card may optimize usage of reclaimed memory. The optimization may include lists for Uncorrectable Error Correction Code (UECC) and Correctable Error Correction Code (CECC) that can be used along with a dual programming scheme. Dual programming may be utilized for blocks on the lists, but... Sandisk Technologies Llc

Method and decoder to adjust an error locator polynomial based on an error parity

A method of operation of a decoder includes receiving first data at the decoder. The method further includes generating second data at the decoder based on the first data. The second data is generated by adjusting an error locator polynomial based on an error parity of the first data.... Sandisk Technologies Llc

Three-dimensional memory device with electrically isolated support pillar structures and making thereof

A first tier structure including a first alternating stack of first insulating layers and first sacrificial material layers is formed over a substrate. First support openings and first memory openings are formed through the first tier structure. A dielectric material portion providing electrical isolation from the substrate is formed in... Sandisk Technologies Llc

Multi-level temperature detection with offset-free input sampling

An electronic system may include a controller that measures a plurality of temperatures of the electronic system. Each of the plurality of temperatures may be indicated by one of a plurality of temperature voltages, each of which is generated across the same voltage-generation circuit. The controller and the voltage-generation circuit... Sandisk Technologies Llc

Erase for partially programmed blocks in non-volatile memory

An erase operation includes one or more erase depth checks to detect the occurrence of shallow erased memory cells at the end of an erase process. Memory cells are subjected to erase and erase verification until erase verification success is achieved. At the end of successful erase verification, a subset... Sandisk Technologies Llc

Non-volatile memory with reduced program speed variation

A three-dimensional non-volatile memory is provided with reduced programming variation across word lines. The gate lengths of word lines decrease from the top to the bottom of the memory hole. Increased programming speeds due to a narrow memory hole are offset by a smaller gate length at corresponding positions. A... Sandisk Technologies Llc

Bulb-shaped memory stack structures for direct source contact in three-dimensional memory device

A etch stop semiconductor rail is formed within a source semiconductor layer. A laterally alternating stack of dielectric rails and sacrificial semiconductor rails is formed over the source semiconductor layer and the etch stop semiconductor rail. After formation of a vertically alternating stack of insulating layers and spacer material layers,... Sandisk Technologies Llc

Bulb-shaped memory stack structures for direct source contact in three-dimensional memory device

Sacrificial semiconductor material portions are connected by a sacrificial semiconductor line extending along a different horizontal direction and protruding into an underlying source conductive layer. After formation of a vertically alternating stack of insulating layers and spacer material layers, memory stack structures are formed through the vertically alternating stack and... Sandisk Technologies Llc

Bulb-shaped memory stack structures for direct source contact in three-dimensional memory device

The contact area between a source strap structure of a buried source layer and semiconductor channels within memory structures can be increased by laterally expanding a source-level volume in which the memory stack structures are formed. In one embodiment, sacrificial semiconductor pedestals can be formed in source-level memory openings prior... Sandisk Technologies Llc

Loop delay optimization for multi-voltage self-synchronous systems

A clock-receiving system may receive a host clock signal on a communications bus from a clock-sending system. Circuitry of a critical path of the clock-receiving system may communicate the clock signal to a multiplexer configured directly behind output driver circuitry. Core logic circuitry and data path circuitry may communicate pairs... Sandisk Technologies Llc

First read solution for memory

Techniques are provided for improving the accuracy of read operations of memory cells, where the threshold voltage of a memory cell can shift depending on when the read operation occurs. A memory cell is sensed by discharging a sense node into a bit line and detecting an amount of discharge... Sandisk Technologies Llc

System and managing multiple file systems in a memory

A system and method for managing multiple file systems on a single non-volatile memory system is described. The system may include a non-volatile memory system with non-volatile memory having first and second file systems, each associated with respective files, and having a common pool of free space. The controller may... Sandisk Technologies Llc

Command sequence for first read solution for memory

Techniques are provided for improving the accuracy of read operations of memory cells, where the threshold voltage of a memory cell can shift depending on when the read operation occurs. A command is issued for performing a conditioning operation which helps to transition the memory cells so that their threshold... Sandisk Technologies Llc

Systems and methods for efficient power state transitions

A memory device may be configured to leverage memory resources of a host computing device to efficiently transition between different power states. In some embodiments, the memory device stores resume data within a host memory buffer (HMB) before transitioning to a low-power state, and uses the resume data stored within... Sandisk Technologies Llc

Three-dimensional memory device with leakage reducing support pillar structures and making thereof

Memory openings and support openings can be formed through an alternating stack of insulating layers and sacrificial material layers. A set of dielectric layers and at least one semiconductor material layer can be sequentially deposited in each of the memory openings and the support openings. The at least one semiconductor... Sandisk Technologies Llc

Non-volatile memory system with wide i/o memory die

A non-volatile storage system includes a plurality of memory dies and an interface circuit. Each memory die includes a wide I/O interface electrically coupled to another wide I/O interface of another memory die of the plurality of memory dies. The interface circuit is physically separate from the memory dies. The... Sandisk Technologies Llc

Select transistors with tight threshold voltage in 3d memory

Disclosed herein is a 3D memory with a select transistor, and method for fabricating the same. The select transistor may have a conductive floating gate, a conductive control gate, a first dielectric between the conductive floating gate and the conductive control gate, and a second dielectric between a body and... Sandisk Technologies Llc

Airflow guide assembly and enclosure

In an electronics system, an adjustable airflow guide assembly and methods of deploying it facilitate dissipating heat. The assembly includes an extendable plate having a first coupling capable of rotatably attaching the extendable plate to a chassis, a link, including a second coupling, capable of translatably attaching the link to... Sandisk Technologies Llc

Three-dimensional memory device having drain select level isolation structure and making thereof

A layer stack including an alternating stack of insulating layers and sacrificial material layers is formed over a substrate. After formation of memory stack structures, backside trenches are formed through the layer stack. The sacrificial material layers are replaced with electrically conductive layers. Drain select level dielectric isolation structures are... Sandisk Technologies Llc

Non-volatile memory with read modes

A non-volatile memory system receives a request to read data. That request includes a quality of service indication. The memory system performs a read process that satisfies the quality of service indication and identifies a set of data with errors. The memory system returns the set of data with errors... Sandisk Technologies Llc

Configuration parameter management for non-volatile data storage

Apparatuses, systems, and methods are disclosed for managing configuration parameters for non-volatile data storage. A control module is configured to limit erase dwell times for blocks of a non-volatile memory medium to satisfy a threshold. A block classification module is configured to group blocks of a non-volatile memory medium based... Sandisk Technologies Llc

Three-dimensional memory device containing word lines formed by selective tungsten growth on nucleation controlling surfaces and methods of manufacturing the same

A method of forming a memory device includes forming an alternating stack of insulating layers and sacrificial material layers over a substrate forming memory stack structures through the alternating stack, forming a first backside trench and a second backside trench through the alternating stack, forming backside recesses by removing the... Sandisk Technologies Llc

03/22/18 / #20180083764

Tuning circuitry and operations for non-source-synchronous systems

A non-source-synchronous system may include a clock-sending device and a clock-receiving device that communicate via a communications bus. The clock-sending device and the clock-receiving device may perform a tuning operation, in which the clock-receiving device sends one or more data signals on one or more data lines of the communications... Sandisk Technologies Llc

03/15/18 / #20180074891

Storage reducing xor recovery time

A storage system and method for reducing XOR recovery time are provided. In one embodiment, a storage system is provides comprising a memory and a controller. The controller is configured to generate a first exclusive-or (XOR) parity for pages of data written to the memory; after the first XOR parity... Sandisk Technologies Llc

03/15/18 / #20180075919

Block health monitoring using threshold voltage of dummy memory cells

Techniques are provided for measuring the endurance of a set of data memory cells by evaluating the threshold voltage (Vth) of associated dummy memory cells. A cell has a high endurance or good data retention if it is able to maintain the charges. However, there can be a variation in... Sandisk Technologies Llc

03/08/18 / #20180067684

Data storage at an access device

A device includes a non-volatile memory, first circuitry configured to communicate with the non-volatile memory, and second circuitry configured to communicate with an access device. The second circuitry is configured to retrieve data and metadata associated with the data from a volatile memory of the access device based on a... Sandisk Technologies Llc

03/08/18 / #20180067799

System and detecting and correcting mapping table errors in a non-volatile memory system

A system and method is disclosed for detecting and correcting for errors in mapping table information stored in volatile memory of a non-volatile memory system. The method may include checking for mapping entry errors when retrieving mapping data for the non-volatile memory from a volatile memory cache. When an error... Sandisk Technologies Llc

03/08/18 / #20180067800

System and protecting firmware integrity in a multi-processor non-volatile memory system

A system and method is disclosed for managing firmware in a non-volatile memory system having a multi-processor controller. The controller may be configured with a plurality of processors. Each of the plurality of processors may retrieve and check the integrity of firmware for a respective one of the other processors... Sandisk Technologies Llc

03/01/18 / #20180059933

Electrically-buffered nv-dimm and use therewith

An electrically-buffered NV-DIMM and method for use therewith are provided. In one embodiment, a storage system is provided comprising a plurality of non-volatile memory devices; a controller in communication with the plurality of non-volatile memory devices; a plurality of data buffers in communication with the controller and configured to store... Sandisk Technologies Llc

03/01/18 / #20180059943

Media controller and management of cpu-attached non-volatile memory

A media controller and method for management of CPU-attached non-volatile memory are provided. In one embodiment, a storage system is provided comprising a plurality of non-volatile memory devices and a controller in communication with the plurality of non-volatile memory devices. The controller is configured to receive a read command from... Sandisk Technologies Llc

03/01/18 / #20180059944

Storage system with several integrated components and use therewith

A storage system with several integrated components and method for use therewith are provided. In one embodiment, a storage system comprising: a plurality of non-volatile memory devices; a controller in communication with the plurality of non-volatile memory devices; a plurality of data buffers in communication with the controller and configured... Sandisk Technologies Llc

03/01/18 / #20180059945

Media controller with response buffer for improved data bus transmissions and use therewith

A media controller with response buffer for improved data bus transmissions and method for use therewith are provided. In one embodiment, a storage system is provided comprising a plurality of non-volatile memory devices; a controller in communication with the plurality of non-volatile memory devices; a plurality of data buffers in... Sandisk Technologies Llc

03/01/18 / #20180059976

Storage system with integrated components and use therewith

A storage system with integrated components and method for use therewith are provided. In one embodiment, a storage system is provided comprising a plurality of non-volatile memory devices; a controller in communication with the plurality of non-volatile memory devices; a plurality of data buffers in communication with the controller and... Sandisk Technologies Llc

03/01/18 / #20180060230

Dynamic anneal characteristics for annealing non-volatile memory

Apparatuses, systems, methods, and computer program products are disclosed for annealing non-volatile memory. A controller identifies one or more life cycle characteristics of a non-volatile storage element. The controller selects an anneal duration and an anneal temperature for annealing the non-volatile storage element. The anneal duration and the anneal temperature... Sandisk Technologies Llc

03/01/18 / #20180060232

Flush command consolidation

A data storage device includes a write cache, a non-volatile memory and a controller coupled to the write cache and to the non-volatile memory. The controller is configured to, responsive to receiving a plurality of flush commands, write all data from the write cache to the non-volatile memory while executing... Sandisk Technologies Llc

03/01/18 / #20180061505

Leakage current detection in 3d memory

Technology is described herein for detecting a leakage current between a block select line and a conductive region that exists in multiple blocks of memory cells in a plane. The conductive region may be shared by at least one memory cell in multiple blocks. One example of the conductive region... Sandisk Technologies Llc

03/01/18 / #20180061850

Three-dimensional memory device with angled word lines and making thereof

A mesa structure is formed over peripheral devices on a substrate. An alternating stack of insulating layers and spacer material layers is formed over the substrate and the mesa structure. A region of the alternating stack overlying the mesa structure is removed to provide a region in which the layers... Sandisk Technologies Llc

03/01/18 / #20180062666

Column-layered message-passing ldpc decoder

In an illustrative example, a decoder includes a variable node unit (VNU) that includes a variable-to-check lookup table circuit configured to output a variable-to-check message corresponding to a check node. The VNU also includes a hard-decision lookup table circuit configured to output a hard decision value corresponding to a variable... Sandisk Technologies Llc

03/01/18 / #20180062970

Methods, systems, and computer readable media for utilizing loopback operations to identify a faulty subsystem layer in a multilayered system

Methods, systems, and computer readable media for utilizing loopback operations to identify a faulty subsystem layer in a multilayered system are disclosed. One method includes executing a plurality of loopback operations at a respective plurality of loopback points positioned among subsystem layers of a multilayered system and detecting a failed... Sandisk Technologies Llc

02/22/18 / #20180053562

Non-volatile memory with read disturb detection for open blocks

A non-volatile memory system includes technology for detecting read disturb in open blocks. In one embodiment, the system determines whether a particular block of non-volatile memory cells has been subjected to a minimum number of open block read operations and performs sensing operations for memory cells connected to an open... Sandisk Technologies Llc

02/15/18 / #20180046231

Adaptive temperature and memory parameter throttling

A storage device with a memory may modify throttling to reduce cross temperature effects. The decision to throttle may be based on a memory device temperature (i.e. temperature throttling) or may be based on the memory device's health, usage, or performance (e.g. hot count or bit error rate). Temperature throttling... Sandisk Technologies Llc

02/15/18 / #20180046527

Memory system with a weighted read retry table

A storage device with a memory may utilize an optimized read retry operation. A read retry table includes a number of read retry cases with updated read thresholds. The read thresholds in the read retry table may be used to avoid errors caused by shifting of charge levels. The optimization... Sandisk Technologies Llc

02/08/18 / #20180039538

Data integrity

A device includes a memory device and a controller. The controller is configured to receive data to be stored in the non-volatile memory and to store a first copy of the data and a second copy of the data to a volatile memory. The controller is configured, in response to... Sandisk Technologies Llc

02/08/18 / #20180039541

Data relocation

A data storage device includes a memory device and a controller coupled to the memory device. The controller is configured, during execution of a relocation operation that includes storage of data to a memory buffer of an access device and retrieval of the data including data bits and first error... Sandisk Technologies Llc

02/08/18 / #20180040623

Three-dimensional memory device with semicircular metal-semiconductor alloy floating gate electrodes and methods of making thereof

Azimuthally-split metal-semiconductor alloy floating gate electrodes can be formed by providing an alternating stack of insulating layers and spacer material layers, forming a dielectric separator structure extending through the alternating stack, and forming memory openings that divides the dielectric separator structure into a plurality of dielectric separator structures. The spacer... Sandisk Technologies Llc

02/08/18 / #20180040627

Ridged word lines for increasing control gate lengths in a three-dimensional memory device

After formation of a memory opening through an alternating stack of insulating layers and sacrificial material layers, a blocking dielectric having a greater thickness at levels of the insulating layers than at levels of the sacrificial material layers is formed around, or within, the memory opening. A memory stack structure... Sandisk Technologies Llc

02/08/18 / #20180041411

Method and system for interactive aggregation and visualization of storage system operations

A method and system for interactive aggregation and visualization of storage system operations are provided. In one embodiment, the method is performed by a server in communication with a client and comprises: receiving, from the client, data regarding storage system operations that were performed by a storage system over time,... Sandisk Technologies Llc

02/01/18 / #20180032122

System and adjusting device performance based on sensed host current sourcing capability

A system and method is disclosed for an electronic device, such as a non-volatile memory associated with a host, to determine a current sourcing capability of the host and to adjust performance characteristics of the electronic device based on the determined current sourcing capability. The system may include an input... Sandisk Technologies Llc

02/01/18 / #20180032282

Systems and methods of memory reads

A data storage device includes a non-volatile memory and a controller coupled to the non-volatile memory. The controller is configured to initiate a read operation to retrieve data from the non-volatile memory. The controller is also configured to suspend the read operation and to determine context information associated with the... Sandisk Technologies Llc

02/01/18 / #20180032396

Generalized syndrome weights

A device includes a memory device and a controller. The controller is configured to determine, based on data read from the memory device, a first count of bits of the data that are associated with at least a first number of unsatisfied parity checks of the data and a second... Sandisk Technologies Llc

02/01/18 / #20180033646

Three-dimensional memory device containing composite word lines including a metal silicide and an elemental metal and making thereof

Word lines for a three-dimensional memory device can be formed by forming a stack of alternating layers comprising insulating layers and sacrificial material layers and memory stack structures vertically extending therethrough. Backside recesses are formed by removing the sacrificial material layers through a backside via trench. A metal silicide layer... Sandisk Technologies Llc

02/01/18 / #20180033794

Non-volatile memory with reduced program speed variation

A three-dimensional non-volatile memory is provided with reduced programming variation across word lines. The gate lengths of word lines decrease from the top to the bottom of the memory hole. Increased programming speeds due to a narrow memory hole are offset by a smaller gate length at corresponding positions. A... Sandisk Technologies Llc

Patent Packs
02/01/18 / #20180033798

Non-volatile memory with reduced variations in gate resistance

A three-dimensional non-volatile memory comprises a plurality of word line layers arranged alternatingly with a plurality of dielectric layers in a stack over a substrate. Higher word lines are implemented to be thicker than lower word lines in order to reduce variation in resistance among word lines.... Sandisk Technologies Llc

02/01/18 / #20180034477

Decoder with parallel decoding paths

A device includes a memory configured to store syndromes, a first data processing unit coupled to the memory, and a second data processing unit coupled to the memory. The first data processing unit is configured to process a first value corresponding to a first symbol of data to be decoded.... Sandisk Technologies Llc

01/25/18 / #20180024375

Reticle with reduced transmission regions for detecting a defocus condition in a lithography process

A reticle for a semiconductor lithography process includes a glass plate having regions with a reduced optical transmission factor. The regions may include arrays of elements comprising defects such as cracks or voids which are formed by laser pulses. The regions may be adjacent to openings in an opaque material... Sandisk Technologies Llc

01/25/18 / #20180024581

Space and power-saving multiple output regulation circuitry

Regulator circuitry may include a plurality of output circuits to generate a plurality of regulated output voltages. The regulator circuitry may include a single operational amplifier and a single feedback loop for regulation, which may reduce space and power consumed by the regulator circuitry. A transconductor and current mirror circuitry... Sandisk Technologies Llc

01/25/18 / #20180024777

Selectively throttling host reads for read disturbs in non-volatile memory system

The various implementations described herein include systems, methods, and/or devices used to selectively throttle host reads in memory devices. The method includes: (1) identifying a storage location in the non-volatile memory system with high read disturbs vulnerable to reliability issues, (2) determining if the identified storage location is being throttled... Sandisk Technologies Llc

01/25/18 / #20180024880

Bad column handling in flash memory

In a flash memory, redundant columns are used alternatively as replacement columns for replacing bad columns or to provide additional redundancy for ECC encoding. Locations of bad columns are indicated to a soft-input ECC decoder so that data bits from bad columns are treated as having a lower reliability than... Sandisk Technologies Llc

01/25/18 / #20180024920

System and tracking block level mapping overhead in a non-volatile memory

A system and method is disclosed for tracking block mapping overhead in a non-volatile memory. The system may include a non-volatile memory having multiple memory blocks and a processor configured to track a block level mapping overhead for closed blocks of the multiple memory blocks. The processor may be configured... Sandisk Technologies Llc

01/25/18 / #20180024948

Bad column management with data shuffle in pipeline

Systems and methods for controlling data flow and data alignment using data expand and compress circuitry arranged between a variable data rate bi-directional first in, first out (FIFO) buffer and one or more memory arrays to compensate for bad column locations within the one or more memory arrays are described.... Sandisk Technologies Llc

01/25/18 / #20180024950

Ring bus architecture for use in a memory module

Ring bus architectures for use in a memory module are disclosed. A memory module may include a primary ring bus; a ring bus controller positioned on the primary ring bus; a secondary ring bus in communication with the primary ring bus via a first bus bridge; and a tertiary ring... Sandisk Technologies Llc

01/25/18 / #20180025776

System and burst programming directly to mlc memory

Apparatus and method for performing burst mode programming in a memory system are disclosed. A memory system may program data in different modes, such as normal mode programming and burst mode programming. Burst mode programming programs data into the memory device faster than normal mode programming. MLC Blocks for burst... Sandisk Technologies Llc

01/25/18 / #20180025777

High-reliability memory read technique

A data storage device includes a non-volatile memory and a controller coupled to the non-volatile memory. The controller is configured, based on a metric associated with a portion of the non-volatile memory, to store a read technique indicator that indicates that the portion is to be read using a high-reliability... Sandisk Technologies Llc

01/25/18 / #20180026646

Multiple-output oscillator circuits

A phase-locked loop (PLL) circuit may be configured to generate a plurality of oscillating signals based on a single control voltage generated based on a phase difference between an input signal and a feedback signal. One of the plurality of oscillating signals may be used to generate the feedback signal.... Sandisk Technologies Llc

01/18/18 / #20180018101

Methods, systems, and computer readable media for write classification and aggregation using host memory buffer (hmb)

A method for write aggregation using a host memory buffer includes fetching write commands and data specified by the write commands from a host over a bus to a non-volatile memory system coupled to the host. Writing the data specified by the write commands from the non-volatile memory system over... Sandisk Technologies Llc

01/18/18 / #20180019256

Selective tungsten growth for word lines of a three-dimensional memory device

Void formation in tungsten lines in a three-dimensional memory device can be prevented by providing polycrystalline aluminum oxide liners in portions of lateral recesses that are laterally spaced from backside trenches by a distance grater than a predefined lateral offset distance. Tungsten nucleates on the polycrystalline aluminum oxide liners prior... Sandisk Technologies Llc

01/11/18 / #20180012667

Word line dependent pass voltages in non-volatile memory

Sensing in non-volatile memory is performed using bias conditions that are dependent on the position of a selected memory cell within a group of non-volatile memory cells. During sensing, a selected memory cell receives a reference voltage while the remaining memory cells receive a read or verify pass voltage. For... Sandisk Technologies Llc

Patent Packs
01/04/18 / #20180004981

Preventing access of a host device to malicious data in a portable device

A storage device comprising a memory, a controller, and a host interface operative to connect with a host. The memory containing data locations access to which are controllable by a protection application which is executable on a host. When the host interface operatively coupled to a host data locations in... Sandisk Technologies Llc

01/04/18 / #20180006041

Method of making three-dimensional semiconductor memory device having uniform thickness semiconductor channel

A method of manufacturing a semiconductor device includes forming a stack of alternating layers comprising insulating layers and spacer material layers over a substrate, forming a memory opening through the stack, forming a layer stack including a memory material layer, a tunneling dielectric layer, and a first semiconductor material layer... Sandisk Technologies Llc

01/04/18 / #20180006049

Three-dimensional memory device containing annular etch-stop spacer and making thereof

A monolithic three-dimensional memory device includes a first alternating stack of first insulating layers and first electrically conductive layers located over a top surface of a substrate, an insulating cap layer overlying the first alternating stack, a second alternating stack of second insulating layers and second electrically conductive layers and... Sandisk Technologies Llc

01/04/18 / #20180006054

Methods and three-dimensional nand non-volatile memory devices with side source line and mechanical support

A method of fabricating a monolithic three dimensional memory structure is provided. The method includes forming a stack of alternating word line and dielectric layers above a substrate, forming a source line above the substrate, forming a memory hole extending through the alternating word line and dielectric layers and the... Sandisk Technologies Llc

12/28/17 / #20170371559

Systems and methods for optimizing media read times

The various embodiments described herein include methods, systems, and devices for optimizing media read times. In one aspect, a method is performed at a device at a storage device with one or more processors and memory coupled to the one or more processors. The method includes: (i) predicting a read... Sandisk Technologies Llc

12/28/17 / #20170371588

Storage burst mode management using transfer ram

A storage system uses consumption of transfer RAM as a trigger to enter and exit burst mode. In one embodiment, the storage system stores, in volatile memory, data to be written in non-volatile memory; monitors an allocation level of the volatile memory to determine a first amount of time that... Sandisk Technologies Llc

12/28/17 / #20170371744

Non-volatile storage system using two pass programming with bit error control

A first phase of a programming process is performed to program data into a set of non-volatile memory cells using a set of verify references and allowing for a first number of programming errors. After completing the first phase of programming, an acknowledgement is provided to the host that the... Sandisk Technologies Llc

12/28/17 / #20170371755

Non-volatile memory with dynamic repurpose of word line

A non-volatile memory system includes a plurality of non-volatile data memory cells arranged into groups of data memory cells, a plurality of select devices connected to the groups of data memory cells, a selection line connected to the select devices, a plurality of data word lines connected to the data... Sandisk Technologies Llc

12/28/17 / #20170372789

Erase speed based word line control

Apparatuses, systems, methods, and computer program products are disclosed for erase depth control. One apparatus includes a block of non-volatile storage cells. A controller is configured to perform a first erase operation on a block of non-volatile storage cells. A controller for a block is configured to determine a first... Sandisk Technologies Llc

12/28/17 / #20170373078

Inter-plane offset in backside contact via structures for a three-dimensional memory device

A three-dimensional memory device includes a plurality of planes, each having a respective alternating stack, strings of memory stack structures which extends through the respective alternating stack, and backside contact via structures vertically extending through the respective alternating stack, extending generally along the first horizontal direction, and laterally separating neighboring... Sandisk Technologies Llc

12/28/17 / #20170373079

Three dimensional memory device containing multilayer wordline barrier films and making thereof

Memory stack structures are formed through an alternating stack of insulating layers and sacrificial material layers. Backside recesses are formed by removal of the sacrificial material layers selective to the insulating layers and the memory stack structures. A barrier layer stack including a crystalline electrically conductive barrier layer and an... Sandisk Technologies Llc

12/28/17 / #20170373086

Amorphous silicon layer in memory device which reduces neighboring word line interference

Techniques for fabricating a memory device which has reduced neighboring word line interference, and a corresponding memory device. The memory device comprises a stack of alternating conductive and dielectric layers, where the conductive layers form word lines or control gates of memory cells. In one aspect, rounding off of the... Sandisk Technologies Llc

12/28/17 / #20170373087

Offset backside contact via structures for a three-dimensional memory device

Die cracking of a three dimensional memory device may be reduced by adding offsets to backside contact via structures. Each backside contact via structure can include laterally extending portions that extend along a first horizontal direction adjoined by adjoining portions that extend along a horizontal direction other than the first... Sandisk Technologies Llc

12/28/17 / #20170373197

Three-dimensional memory device with amorphous barrier layer and making thereof

Memory stack structures are formed through an alternating stack of insulating layers and sacrificial material layers. Backside recesses are formed by removal of the sacrificial material layers selective to the insulating layers and the memory stack structures. An electrically conductive, amorphous barrier layer can be formed prior to formation of... Sandisk Technologies Llc

12/28/17 / #20170374186

Mobile device with unified media-centric user interface

A mobile device with a unified media-centric user interface is provided. In one embodiment, the user interface contains one or more of the following features: a unified view of the home screen, navigating between various storage locations, dragging items to collection/folder, pinch and zoom feature, stats shown for each file... Sandisk Technologies Llc

12/21/17 / #20170364276

Storage dynamic duty cycle correction

A storage system and method for dynamic duty cycle correction are disclosed. In one embodiment, a controller of a storage system provides a clock signal to the memory, receives the clock signal back from the memory, monitors the duty cycle of the clock signal received back from the memory, and... Sandisk Technologies Llc

12/21/17 / #20170365349

Dynamic tuning of first read countermeasures

Techniques are provided for improving the accuracy of read operations of memory cells, where the threshold voltage (Vth) of a memory cell can shift depending on when the read operation occurs. Countermeasures are provided for a first read situation in which a memory is read after a power on event... Sandisk Technologies Llc

12/21/17 / #20170365613

Three-dimensional memory device having epitaxial germanium-containing vertical channel and making thereof

An alternating stack of insulating layers and spacer material layers is formed over a semiconductor substrate. Memory openings are formed through the alternating stack. An optional silicon-containing epitaxial pedestal and a memory film are formed in each memory opening. After forming an opening through a bottom portion of the memory... Sandisk Technologies Llc

12/14/17 / #20170358354

Three-dimensional nand non-volatile memory and dram memory devices on a single substrate

A method is provided that includes forming a three-dimensional NAND stacked non-volatile memory array on a substrate, and forming a DRAM memory array on the substrate. The three-dimensional NAND stacked non-volatile memory array and the DRAM memory array are formed using a single integrated circuit fabrication process.... Sandisk Technologies Llc

12/14/17 / #20170358365

Cell current based bit line voltage

Apparatuses, systems, methods, and computer program products are disclosed for read level determination. A block of non-volatile storage cells has a plurality of bit lines. A controller for a block is configured to perform a first read on a set of storage cells using a first read level for the... Sandisk Technologies Llc

12/14/17 / #20170358593

Within-array through-memory-level via structures and making thereof

A semiconductor structure includes a memory-level assembly located over a substrate and including at least one alternating stack and memory stack structures vertically extending through the at least one alternating stack. Each of the at least one an alternating stack includes alternating layers of respective insulating layers and respective electrically... Sandisk Technologies Llc

12/14/17 / #20170358594

Method of forming a staircase in a semiconductor device using a linear alignmnent control feature

A linear mark extending perpendicular to a primary step direction of stepped terrace for a three-dimensional memory device can be employed as a reference feature for aligning a trimming material layer before initiating an etch-and-trim process sequence. The linear mark can be formed as a linear trench or a linear... Sandisk Technologies Llc








ARCHIVE: New 2018 2017 2016 2015 2014 2013 2012 2011 2010 2009



###

This listing is an abstract for educational and research purposes is only meant as a recent sample of applications filed, not a comprehensive history. Freshpatents.com is not affiliated or associated with Sandisk Technologies Llc in any way and there may be associated servicemarks. This data is also published to the public by the USPTO and available for free on their website. Note that there may be alternative spellings for Sandisk Technologies Llc with additional patents listed. Browse our Agent directory for other possible listings. Page by FreshPatents.com

###