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Sandisk Technologies Llc patents

Recent patent applications related to Sandisk Technologies Llc. Sandisk Technologies Llc is listed as an Agent/Assignee. Note: Sandisk Technologies Llc may have other listings under different names/spellings. We're not affiliated with Sandisk Technologies Llc, we're just tracking patents.

ARCHIVE: New 2016 2015 2014 2013 2012 2011 2010 2009 | Company Directory "S" | Sandisk Technologies Llc-related inventors




Date Sandisk Technologies Llc patents (updated weekly) - BOOKMARK this page
04/20/17 new patent  Independent sense amplifier addressing and quota sharing in non-volatile memory
04/06/17Three-dimensional memory structure having a back gate electrode
04/06/17Vertical bit line non-volatile memory systems and methods of fabrication
03/30/17Methods, systems and computer readable media for intelligent fetching of data storage device commands from submission queues
03/30/17Memory die temperature adjustment based on a power condition
03/23/17Reference voltage generator for temperature sensor with trimming capability at two temperatures
03/23/17Adaptive operation of 3d nand memory
03/23/17Adaptive operation of 3d memory
03/23/17Dense arrays and charge storage devices
03/16/17Power cord retainer
03/16/17Programming of nonvolatile memory with verify level dependent on memory state and programming loop count
03/09/17System and selectively routing cached objects
03/02/17Nand boosting using dynamic ramping of word line voltages
03/02/17Heat dissipation for substrate assemblies
02/16/17Process for word line connections in 3d memory
02/09/17Persistent memory manager
02/09/17Non-volatile semiconductor memory device adapted to store a multi-valued data in a single memory cell
02/09/173d memory having vertical switches with surround gates and method thereof
02/02/17Three dimensional nand memory having improved connection between source line and in-hole channel material as well as reduced damage to in-hole layers
02/02/17High voltage generation using low voltage devices
01/26/17Determination of word line to word line shorts between adjacent blocks
01/26/17Three-dimensional junction memory device and method reading thereof using hole current detection
01/19/17Ultrahigh density vertical nand memory device and making thereof
01/05/17Systems and methods for performing data recovery in a memory system
01/05/17Three-dimensional array of re-programmable non-volatile memory elements having vertical bit lines and a single-sided word line architecture
12/29/16Multi-layer memory system having multiple partitions in a layer
12/22/16Memory power management
12/22/16Three dimensional nand device with channel contacting conductive source line and making thereof
12/15/16Data storage system with dynamic erase block grouping mechanism and operation thereof
12/08/16Reducing hot electron injection type of read disturb in 3d non-volatile memory for edge word lines
12/01/16Content addressable memory cells, memory arrays and methods of forming the same
12/01/16Cobalt-containing conductive layers for control gate electrodes in a memory structure
11/10/16Three dimensional memory device having well contact pillar and making thereof
11/03/16Multiheight contact via structures for a multilevel interconnect structure
10/27/16Rewritable multibit non-volatile memory with soft decode optimization
10/20/16Patterning low-k inter-metal dielectrics and associated semiconductor device
10/20/16Multiheight contact via structures for a multilevel interconnect structure
10/20/16Three dimensional nand device with channel located on three sides of lower select gate and making thereof
10/20/16Vertical thin film transistor selection devices and methods of fabrication
10/06/16Vertical floating gate nand with selectively deposited ald metal films
09/29/16Nand memory strings and methods of fabrication thereof
09/29/16Method of manufacturing semiconductor device and semiconductor device having unequal pitch vertical channel transistors
09/29/16Vertical thin film transistors in non-volatile storage systems
09/22/16Systems and methods for performing adaptive host memory buffer caching of transition layer tables
09/22/16Multilevel interconnect structure and methods of manufacturing the same
09/15/16System and distributed computing in non-volatile memory
09/15/16Method of operating memory array having divided apart bit lines and partially divided bit line selector switches







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