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Siltronic Ag
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Siltronic Ag patents


Recent patent applications related to Siltronic Ag. Siltronic Ag is listed as an Agent/Assignee. Note: Siltronic Ag may have other listings under different names/spellings. We're not affiliated with Siltronic Ag, we're just tracking patents.

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Epitaxially coated semiconductor wafer, and method for producing an epitaxially coated semiconductor wafer

Epitaxial wafers with a high concentration of bmd nuclei or developed bmds just below a denuded zone, and having low surface roughness, are produced by forming an oxynitride layer on a purposefully oxidized epitaxial layer by a short rta treatment in a nitriding atmosphere, removing the oxynitride layer, and then polishing the epitaxial surface.. . ... Siltronic Ag

Semiconductor wafer comprising a monocrystalline group-iiia nitride layer

Problems associated with the mismatch between a silicon substrate and a group-iiia nitride layer are addressed by employing a silicon substrate processed to have a surface comprising closely spaced tips extending from the surface, depositing a group-iiib silicide layer on the tips, then depositing a group-iiib nitride layer, and then depositing a group-iiia nitride.. . ... Siltronic Ag

Method for depositing a layer on a semiconductor wafer by vapor deposition in a process chamber

A method for depositing a layer on a semiconductor wafer by vapor deposition in a process chamber, involves removing native oxide from a surface of the wafer; and then depositing an epitaxial layer with a thickness of at least 40 μm on the surface of the wafer by introducing a silicon containing gas and a carrier gas into the process chamber, wherein the flow rate of the silicon containing gas is lower than 10 standard liters per minute and the flow rate of the carrier gas is at least 40 standard liters per minute.. . ... Siltronic Ag

Susceptor for holding a semiconductor wafer having an orientation notch, a method for depositing a layer on a semiconductor wafer, and semiconductor wafer

A semiconductor wafer processing susceptor for holding a wafer having an orientation notch during deposition of a layer on the wafer, having a placement surface for supporting the semiconductor wafer in the rear edge region of the wafer, the placement surface having a stepped outer delimitation, and an indentation of the outer delimitation of the placement surface for placement of the partial region of the edge region of the rear side of the wafer in which the orientation notch is located onto a partial region of the placement surface delimited by the indentation of the outer delimitation of the placement surface. The susceptor is used in a method for depositing a layer on a wafer having an orientation notch, and wafers made of monocrystalline silicon upon which layers are deposited using the susceptor have greater local flatness on both front and rear sides proximate the orientation notch.. ... Siltronic Ag








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