Real Time Touch



new TOP 200 Companies filing patents this week

new Companies with the Most Patent Filings (2010+)




Real Time Touch

Similar
Filing Names

Sk Hynix Inc
Sk Hynix Inc_20131212

Sk Hynix Inc patents


Recent patent applications related to Sk Hynix Inc. Sk Hynix Inc is listed as an Agent/Assignee. Note: Sk Hynix Inc may have other listings under different names/spellings. We're not affiliated with Sk Hynix Inc, we're just tracking patents.

ARCHIVE: New 2018 2017 2016 2015 2014 2013 2012 2011 2010 2009 | Company Directory "S" | Sk Hynix Inc-related inventors


 new patent  Memory system and operation the same

A memory system includes a memory device including a plurality of memory arrays, each of which includes a plurality of memory blocks, and a controller suitable for setting super blocks each including respective memory blocks that belong to two or more memory arrays among the plurality of the memory arrays... Sk Hynix Inc

 new patent  Memory device, memory system including the same and operation the memory system

A memory system includes: a first memory device including a first internal voltage generation circuit; and a second memory device including a second internal voltage generation circuit, wherein the first memory device and the second memory device receive an identical chip enable signal, and when the chip enable signal is... Sk Hynix Inc

 new patent  Nonvolatile memory device, data storage device and operating method thereof

A nonvolatile memory device includes a target memory area; a control unit configured to apply a program pulse one or more times to the target memory area in response to a program command, until program verification passes; and a status storage unit configured to store a program status information for... Sk Hynix Inc

 new patent  Memory system and operating method thereof

A memory system may include: a memory device including a plurality of memory dies, each die including a plurality of memory blocks, each block including a plurality of pages; and a controller suitable for performing a command operation for the memory device and storing segments of user data and metadata... Sk Hynix Inc

 new patent  Memory system and operating method thereof

A memory system may include: a memory device including a plurality of memory blocks, each of the memory blocks including a plurality of pages; and a controller suitable for: storing user data corresponding to a write command, in the memory blocks; storing map data corresponding to the stored user data,... Sk Hynix Inc

 new patent  Memory controller, memory system including the same and operation memory controller

An operating method of a memory controller may include determining a physical page to be accessed in a plurality of memory devices by mapping a logical address to a physical address; and determining a distribution pattern in which data of the physical page are distributed to the plurality of memory... Sk Hynix Inc

 new patent  Memory system

Provided herein is a memory device including a memory cell array, a peripheral circuit configured to perform a first operation for the memory cell array, and a control circuit configured to generate an operation status code and output the operation status code. The first operation includes a plurality of second... Sk Hynix Inc

 new patent  Electronic device and operating method thereof

Disclosed is an operating method of an electronic device which includes a semiconductor memory having a plurality of resistive storage cells. The operating method may include: writing data to the resistive storage cells using a write current of a set condition; determining whether the writing of data to the resistive... Sk Hynix Inc

 new patent  Semiconductor devices and semiconductor systems

A semiconductor system including a first semiconductor device and a second semiconductor device may be provided. The first semiconductor device may be configured to outputs commands and addresses. The first semiconductor device may be configured to output or receive data. The second semiconductor device may be configured to store addresses... Sk Hynix Inc

 new patent  Electronic device and fabricating the same

An electronic device is provided. An electronic device according to an implementation of the disclosed technology is an electronic device including a semiconductor memory, wherein the semiconductor memory includes: a substrate including a first region in which a plurality of memory cells are disposed and a second region adjacent to... Sk Hynix Inc

 new patent  Data processing systems and a plurality of memory modules

A data processing system may include a memory/storage circuit and a host. The memory/storage circuit may include a first memory module and a second memory module. Each of the first and second memory modules may include a controller and a memory device. The host may have access to the memory... Sk Hynix Inc

 new patent  Semiconductor device and semiconductor system

A semiconductor system includes a controller operatively coupled to a semiconductor device, the controller being suitable in a training mode for receiving an external signal and a first data signal from an external device and for transmitting the received external signal and the first data signal to the semiconductor device;... Sk Hynix Inc

 new patent  Memory device having negative voltage generator

Provided herein is a voltage generating circuit including: a negative voltage pump configured to generate a first negative voltage; and a negative voltage regulator configured to generate a second negative voltage using the first negative voltage and output the second negative voltage through an output terminal. The negative voltage regulator... Sk Hynix Inc

 new patent  Semiconductor test device and semiconductor test method

A semiconductor test device and a semiconductor test method are disclosed. A semiconductor test device may include a DQ signal receiver, a test mode register set signal processor, and a test mode command generator. The DQ signal receiver may receive a first DQ signal through a first DQ pin. The... Sk Hynix Inc

 new patent  Semiconductor memory device for performing a post package repair operation and operating method thereof

A semiconductor memory device includes a fuse array circuit including a row fuse region and a column fuse region, and suitable for outputting fuse information from row fuse sets and from column fuse sets and outputting programmed row and column addresses as row and column fail data, during a boot-up... Sk Hynix Inc

 new patent  Non-volatile memory device and fabricating the same

Provided are a non-volatile memory device and a method of fabricating the same. The non-volatile memory includes a channel layer, a data storage layer disposed on the channel layer, a plurality of control gates arranged on the data storage layer and spaced apart from one another, and conductive cover layers... Sk Hynix Inc

 new patent  Stretchable semiconductor packages and semiconductor devices including the same

A semiconductor package includes an extendible molding member, a chip embedded in the molding member to have a warped shape, and connectors disposed in the molding member. First surfaces of the connectors are exposed at a surface of the molding member, and second surfaces of the connectors are coupled to... Sk Hynix Inc

 new patent  Three-dimensional semiconductor integrated circuit device and manufacturing the same

A semiconductor integrated circuit device may include an isolating layer, a buried gate, source and drain regions, a dielectric layer having a high dielectric constant and an insulating interlayer. The isolating layer may be formed on a semiconductor substrate to define an active region. The buried gate may be formed... Sk Hynix Inc

 new patent  Impedance calibration circuit and semiconductor apparatus including the same

An impedance calibration circuit includes a first detection unit configured to generate a first pull-up impedance detection signal according to a resistance value of an internal reference resistor, a second detection unit configured to generate a second pull-up impedance detection signal according to a resistance value of an external reference... Sk Hynix Inc

 new patent  Frequency divider regarding variable division ratio

A frequency divider may be provided. The frequency divider may be configured to generate a division signal having a variable cycle according to transition timing information and a division ratio signal.... Sk Hynix Inc

 new patent  Pixel signal readout device, method thereof, and cmos image sensor including the same

A pixel signal readout device includes a unit pixel including a drive transistor and a reset transistor; and a column select transistor suitable for outputting a voltage applied to one terminal thereof, to a common terminal of the drive transistor and the reset transistor through the other terminal thereof, in... Sk Hynix Inc

Memory system and operating method thereof

A memory system includes: a memory device including a plurality of memory blocks configured to store data; and a controller configured to determine a power level for an operation corresponding to a command received from a host, and provide the determined power level to a memory block which is subject... Sk Hynix Inc

Memory system and operating method thereof

A semiconductor memory device according to the present disclosure includes: a memory cell array including a plurality of planes; a command processing unit configured to generate an internal command to be executed by at feast one plane among the plurality of planes on the basis of external commands received from... Sk Hynix Inc

Semiconductor apparatus, memory system and repair method thereof

A semiconductor apparatus may include a fuse cell array, an address generation circuit, a control circuit, and a command generation circuit. The fuse cell array may store a fail address. The address generation circuit may generate a copy address according to test information containing the fail address. The control circuit... Sk Hynix Inc

Nonvolatile memory system and error determination method thereof

A memory system may be provided. The memory system may include a memory apparatus including a plurality of memory cells. The memory system may include and a controller configured to control a write operation and a read operation with respect to the memory apparatus, detect an error occurrence position by... Sk Hynix Inc

Eprom device for storing multi-bit data and read circuit of eprom device

An EPROM device may include a unit cell, a switching unit, a decoder, and a comparing unit. The unit cell may be disposed between a ground voltage terminal and a bit line coupled to a program voltage supply line. The switching unit may control an electrical coupling of the program... Sk Hynix Inc

Semiconductor memory device

Provided herein is a semiconductor memory device. The semiconductor memory device includes: a memory cell array including a plurality of memory blocks; a voltage generation circuit configured to generate a plurality of operating voltages; a decoder circuit configured to transmit the plurality of operating voltages to the memory cell array... Sk Hynix Inc

Memory system and operating method thereof

A memory system may include: a memory device including a plurality of pages, each page including a plurality of memory cells coupled with a word line, a plurality of memory blocks in which the pages are included, a plurality of planes which include the memory blocks, and a plurality of... Sk Hynix Inc

Semiconductor device and manufacturing the same

A semiconductor device and a method for manufacturing the same are disclosed, which guarantee an overlay margin between a contact and a metal line. A method for manufacturing a semiconductor device includes: forming a stacked insulation film in which a first interlayer insulation film, an etch stop film, and a... Sk Hynix Inc

Semiconductor device and manufacturing the same

A semiconductor device may include a first pattern. The semiconductor device may include a second pattern intersecting with the first pattern and including an intersection region with the first pattern and a non-intersection region.... Sk Hynix Inc

Manufacturing semiconductor device including barrier pattern

The invention is related to a method for manufacturing a semiconductor device having a barrier pattern. The method includes alternately forming first sacrificial layers and insulating layers forming channel patterns penetrating the first sacrificial layers and the insulating layers, and forming a slit penetrating the first sacrificial layers and the... Sk Hynix Inc

Semiconductor device and manufacturing the same

Disclosed is a method of manufacturing a semiconductor device, including: forming a slacked structure including first material layers and second material layers alternately stacked on each other; forming a pillar passing through the stacked structure, the pillar including a protruding portion protruding above an uppermost surface of the stacked structure;... Sk Hynix Inc

Electronic device

An electronic device is provided to comprise a semiconductor memory unit that comprises: a substrate including active regions, which are extended in a second direction and disposed from each other in a first direction; a plurality of gates extended in the first direction and across with the active regions; a... Sk Hynix Inc

Data storage device and operating method thereof

A data storage device includes a nonvolatile memory device including a plurality of memory blocks each of which includes a plurality of pages; and a controller suitable for obtain block physical to logical (P2L) data corresponding to a first memory block among the plurality of memory blocks, determine first and... Sk Hynix Inc

Semiconductor memory device and operating the same

Provided herein are a semiconductor memory device and a method of operating the semiconductor memory device, which have an improved processing speed for a suspend operation. The semiconductor memory device includes a memory cell array, a peripheral circuit configured to perform a data operation corresponding to an externally provided command... Sk Hynix Inc

01/04/18 / #20180004429

Memory device for high speed data transfer

A memory device may include a data output controller for generating a first clock signal and a second clock signal in response to a read enable clock signal, a page buffer for storing data, and outputting the data to the data output controller in synchronization with the first clock signal,... Sk Hynix Inc

01/04/18 / #20180004439

Memory system and operating method thereof

A memory system may include: a memory device including a plurality of memory blocks, each memory block including a plurality of pages, each page including a plurality of memory cells operatively coupled to a word line for storing data; and a controller including a memory, the controller being suitable for... Sk Hynix Inc

01/04/18 / #20180004440

Memory system and operating method thereof

A memory system may include: a memory device comprising a plurality of pages, which include a plurality of memory cells coupled to a plurality of word lines, and in which data is stored, a plurality of memory blocks in which the pages are included, a plurality of planes including the... Sk Hynix Inc

01/04/18 / #20180004446

Memory controller, memory buffer chip and memory system

A memory system may be provided. The memory system may include a memory buffer chip coupled to one or more memory chips. The memory system may include a memory controller configured to control the memory buffer chip to input/output data to/from the one or two or more memory chips. The... Sk Hynix Inc

01/04/18 / #20180004677

Memory operating the same

A memory system includes a memory device including a memory block, the memory block including a plurality of memory cell groups, an address translator that maps a logical address of a data to a physical address of the memory block, and a controller configured to divide the plurality of memory... Sk Hynix Inc

01/04/18 / #20180005673

Electronic device and driving the same

An electronic device includes a semiconductor memory that includes: a memory cell coupled between first and second lines and having a specific resistance state; a first read circuit suitable for supplying a predetermined pattern of a read voltage to the first line to generate a cell current corresponding to the... Sk Hynix Inc

01/04/18 / #20180005675

Input circuit and semiconductor device including the same

An input circuit may include: an internal bias generation unit suitable for generating first and second bias voltages in response to a first enable signal; a buffer control unit suitable for comparing a reference voltage to the first and second bias voltages, and generating a plurality of buffer control signals... Sk Hynix Inc

01/04/18 / #20180005696

Method of programming semiconductor memory device

In a method of programming a semiconductor memory device, during a standby period, a standby voltage is applied to word lines coupled to a plurality of memory cells included in a selected memory cell string, and, during a first program period, a first pre-bias voltage is applied to a word... Sk Hynix Inc

01/04/18 / #20180006047

Semiconductor device

A semiconductor device includes a common source region formed in a semiconductor substrate, a bit line formed over the semiconductor substrate, first and second vertical channel layers coupled between the bit line and the common source region, wherein the first and second vertical channel layers are alternately arranged on the... Sk Hynix Inc

01/04/18 / #20180006052

Manufacturing semiconductor device

There are provided a manufacturing method of a semiconductor device. A manufacturing method of a semiconductor device includes forming a preliminary source stack structure including a first source layer, a first protective layer, a sacrificial layer, a second protective layer, and a second source layer, which are sequentially stacked in... Sk Hynix Inc

01/04/18 / #20180006077

Image sensor having photodiodes sharing one color filter and one micro-lens

An image sensor is provides. The image sensor may include first and second photodiodes, a first color filter shared by the first and the second photodiodes, and first and second floating diffusion regions coupled to the first and the second photodiodes, respectively.... Sk Hynix Inc

01/04/18 / #20180006642

Control circuits of collector current of substrate bipolar junction transistors and circuits of compensating for base current for generating a proportional to absolute temperature (ptat) voltage using the control circuits

A circuit for controlling a collector current of a substrate bipolar junction transistor (BJT) is provided. The circuit includes a first current mirror configured to generate a first mirroring base current corresponding to a replicate current of a base current of the substrate BJT, a current transmitter configured to transmit... Sk Hynix Inc

12/28/17 / #20170371548

Memory system and operating memory system

A memory system may include: a memory system may include: a memory device suitable for storing user data and corresponding metadata; and a controller including a memory, the controller being suitable for storing user data and corresponding metadata in the memory and for controlling the memory device for storing therein... Sk Hynix Inc

12/28/17 / #20170371575

Memory system and operating the same

Provided herein are a memory system and method of operating the memory system, which have improved reliability. A method of operating a controller for controlling a semiconductor memory device including a plurality of memory blocks, the method comprising generating a program command and a program address for performing a program... Sk Hynix Inc

12/28/17 / #20170371745

Semiconductor device and semiconductor system

A semiconductor device may include an operation control circuit configured to generate a detection signal based on an internal temperature of the semiconductor device. The semiconductor device may include an error correction circuit configured to output read data as output data with or without performing an error correction operation and... Sk Hynix Inc

12/28/17 / #20170371746

Methods of correcting data errors and semiconductor devices used therein

A semiconductor device correcting data errors using a hamming code is provided. The hamming code is realized by an error check matrix, and the error check matrix includes a first sub- matrix and a second sub-matrix. The first sub-matrix includes column vectors having an odd weight. The second sub-matrix includes... Sk Hynix Inc

12/28/17 / #20170371800

Memory system, and address mapping method and access method thereof

Provided is a method for mapping a logical address to a physical address, including: identifying whether a logical address is identical to a round value; mapping the logical address to a first physical address identical to an interval value when the logical address is identical to the round value; mapping... Sk Hynix Inc

12/28/17 / #20170371817

Interface circuit relating to variable delay, and semiconductor apparatus and system including the same

A semiconductor apparatus may include an interface circuit. The interface circuit may sense level variations of a first signal and a second signal. The interface circuit may generate first and second output signals by variably delaying the first and second signals depending on a sensing result. The interface circuit may... Sk Hynix Inc

12/28/17 / #20170372759

Active control circuit, internal voltage generation circuit, memory apparatus and system using the same

A memory apparatus may include an active control circuit and an internal voltage generation circuit. The active signal generation circuit may enable an internal active signal after a level of a second external power supply voltage is stabilized even when a normal active signal is enabled. The internal voltage generation... Sk Hynix Inc

12/28/17 / #20170372760

Semiconductor devices

A semiconductor device includes a first rank and a second rank. The first rank operates in synchronization with a clock signal in response to a first rank selection signal, and the second rank operates in synchronization with the clock signal in response to a second rank selection signal. The first... Sk Hynix Inc

12/28/17 / #20170372767

Semiconductor memory device and operating method thereof

A semiconductor memory device including a weak cell storage circuit suitable for programming therein weak cell information, and outputting the weak cell information in an initialization operation; a cell array region including a first cell region which stores the weak cell information received from the weak cell storage circuit, in... Sk Hynix Inc

12/28/17 / #20170372770

Semiconductor memory device and operating the same

A semiconductor memory device includes: a high frequency signal control unit for receiving an external command address signal, removing noise and glitch from the external command address signal and outputting a first command address signal; a pulse width control unit for controlling a pulse width of the first command address... Sk Hynix Inc

12/28/17 / #20170372778

Resistance change memory device and sensing the same

A method of sensing a resistance change memory device includes preparing a memory cell including a variable resistance element storing different data on the basis of a variable resistance, and a switching element connected to the variable resistance element and performing a threshold switching operation, measuring a first cell current... Sk Hynix Inc

12/28/17 / #20170372786

Semiconductor memory device and operating method thereof

The present disclosure relate a method of operating a semiconductor memory device including at least two memory blocks sharing one block word line. The method including applying an erase voltage to a source line commonly coupled to the memory blocks, one of which is a selected memory block and applying... Sk Hynix Inc

12/28/17 / #20170372792

Test apparatus, memory test system, and test method

A memory test system may include a memory apparatus and a test apparatus. The test apparatus may be configured to generate a code distribution of noble cells. The test apparatus may be configured to generate a mass data code distribution and a test result based on the code distribution of... Sk Hynix Inc

12/28/17 / #20170372796

Semiconductor devices

A semiconductor device may include a syndrome generation circuit and a failure detection circuit. The syndrome generation circuit may generate a syndrome signal corresponding to a pattern of an output data signal. The failure detection circuit may detect the syndrome signal and sequentially store the syndrome signal to generate a... Sk Hynix Inc

12/28/17 / #20170373010

Package-on-package type semiconductor device including fan-out memory package

A semiconductor device may include a bottom package embedded with a first semiconductor chip. The semiconductor device may include a middle package stacked over the bottom package, and embedded with at least two second semiconductor chips in a fan-out structure. The semiconductor device may include a top package stacked over... Sk Hynix Inc

12/28/17 / #20170373041

Method of manufacturing wafer level package and wafer level package manufactured thereby

Provided are a wafer level package and a manufacturing method thereof. A reconfigured substrate may be formed by disposing a first semiconductor die on a dummy wafer, and forming a molding layer and a mold covering layer. A second semiconductor die may be stacked on the first semiconductor die and... Sk Hynix Inc

12/28/17 / #20170373088

Semiconductor device and manufacturing the same

A semiconductor device may include a first cell structure, a second cell structure, a pad structure, a circuit, and one or more openings. The pad structure may be disposed between the first cell structure and the second cell structure, and may be electrically coupled to the first and second cell... Sk Hynix Inc

12/28/17 / #20170373108

Image sensor including transfer gates in deep trenches

An image sensor is described. The image sensor includes a photodiode that is formed in a substrate, a floating diffusion region that vertically overlaps with a first portion of the photodiode, a shallow trench isolation (STI) region that vertically overlaps with a second portion of the photodiode and has an... Sk Hynix Inc

Patent Packs
12/28/17 / #20170373706

Data dependency mitigation in parallel decoders for flash storage

A memory device can include a memory array, a processor coupled to the memory array, and a decoding apparatus. The decoding apparatus is configured to perform parallel decoding of codewords. Each of the codewords has a plurality of data blocks, each data block having a number of data bits. The... Sk Hynix Inc

12/28/17 / #20170374308

Group selection circuit, and column readout device and method thereof

A group selection circuit includes an input block suitable for receiving a last column select signal of a previous column switch group and a last column select signal of a current column switch group; and a group selection block suitable for generating a group select signal that is activated from... Sk Hynix Inc

12/21/17 / #20170364108

Circuits for setting reference voltages and semiconductor devices including the same

A circuit for setting a reference voltage is provided. The circuit includes a reference voltage information storage unit and a reference voltage input/output (I/O) control unit. The reference voltage information storage unit is configured to set a level of a reference voltage according to information stored in a first register... Sk Hynix Inc

12/21/17 / #20170364286

Data storage device and operating method thereof

A data storage device includes a nonvolatile memory device; a control unit configured to generate a descriptor in which works for controlling the nonvolatile memory device are written; a memory control unit configured to provide control signals and write data to the nonvolatile memory device based on the descriptor; and... Sk Hynix Inc

12/21/17 / #20170364306

Electronic device and fabricating the same

A method for fabricating an electronic device including a semiconductor memory includes: forming a memory layer over a substrate; forming a memory element by selectively etching the memory layer, wherein forming the memory element includes forming an etching residue on a sidewall of the memory element, the etching residue including... Sk Hynix Inc

12/21/17 / #20170365303

Methods, semiconductor devices, and semiconductor systems

A semiconductor device may be provided. The semiconductor device may be configured to shift storage positions of data and error information on the data to store the data into shifted storage positions based on the address signals having a certain combination being inputted a predetermined number of times.... Sk Hynix Inc

12/21/17 / #20170365307

Data storage device and operating method thereof

A method for operating a data storage device includes determining appropriateness of a first read bias for adjacent target threshold voltage distributions among threshold voltage distributions for a plurality of memory cells; and if it is determined that the first read bias is inappropriate, determining a second read bias.... Sk Hynix Inc

12/21/17 / #20170365311

Semiconductor device and semiconductor system

A semiconductor device may include a division control circuit and a latch circuit. The division control circuit may be configured to divide an external clock to generate a first preliminary divided clock and a second preliminary divided clock. The division control circuit may be configured to output the first and... Sk Hynix Inc

12/21/17 / #20170365312

Semiconductor integrated circuit

A semiconductor integrated circuit including first semiconductor chip and second semiconductor chip that vertically stacked, wherein the first semiconductor chip includes a first column data driving circuit configured to transmit internal data to the second semiconductor chip in a DDR (double data rate) scheme based on an internal strobe signal,... Sk Hynix Inc

12/21/17 / #20170365363

Rupture control device and semiconductor device to improve yield

A rupture control device may include an address control circuit configured to generate a rupture address in response to a first rupture command signal, a rupture mask signal and an external address, wherein the rupture address is generated according to whether the rupture mask signal is activated, and wherein an... Sk Hynix Inc

12/21/17 / #20170365630

Image sensor having nano voids and fabricating the same

An image sensor includes a plurality of photodiodes formed in a substrate; nano void regions formed in the substrate adjacent to sides of each photodiode of the plurality of photodiodes; and a plurality of nano voids formed in each nano void region of the nano void regions.... Sk Hynix Inc

12/21/17 / #20170365635

Image sensor including phase difference detectors

An image sensor may include a main photodiode formed in a substrate, a first inter-layer dielectric layer formed over a lower surface of the substrate, and phase difference detectors formed over the first inter-layer dielectric layer. The phase difference detectors include a left phase difference detector that is vertically overlapping... Sk Hynix Inc

12/21/17 / #20170365640

Switch and fabricating the same, and resistive memory cell and electronic device, including the same

A switch includes a first electrode layer, a second electrode layer disposed over the first electrode layer, and a selecting element layer interposed between the first electrode layer and the second electrode layer. The selecting element layer includes a gas region in which a current flows or does not flow... Sk Hynix Inc

12/21/17 / #20170366003

Device for protecting semiconductor circuit

A semiconductor circuit protection device for protecting an input/output circuit include an ultra-low electrostatic discharging block suitable for discharging ultra-low electrostatic charges before migrating to the input/output circuit.... Sk Hynix Inc

12/21/17 / #20170366169

Impedance calibration circuit

An impedance calibration circuit is disclosed, which relates to a technology for improving precision of pad resistance. The impedance calibration circuit includes: a first On Die Termination (ODT) circuit selected by a first selection signal, configured to tune its own resistance using a first code signal, and output a first... Sk Hynix Inc

Patent Packs
12/21/17 / #20170366195

Injection-locked oscillator and semiconductor device including the same

An injection-locked oscillator includes an oscillator and an injection circuit. The oscillator includes a first oscillation node through which a first oscillation signal is output and a second oscillation node through which a second oscillation signal is output, the second oscillation signal having a phase opposite to that of the... Sk Hynix Inc

12/14/17 / #20170357447

Memory system and operation method thereof

An operation method for a memory system may include: an accessing a plurality of memory devices, each including a plurality of dies, in an interleaving manner, and performing program operations; and performing at least one internal read operation to read data from the plurality of dies accessed in the interleaving... Sk Hynix Inc

12/14/17 / #20170357458

Memory system and operating method thereof

A memory system may include: a memory device comprising a plurality of memory blocks, each memory block comprising a plurality of pages; a controller suitable for performing a command operation on the memory blocks, the command operation including checking one or more parameters of each of the memory blocks, selecting... Sk Hynix Inc

12/14/17 / #20170357461

Data storage device and operating method thereof

A data storage device includes a nonvolatile memory device; and a controller suitable for controlling the nonvolatile memory device. The controller includes a status storage unit suitable for storing a status information on the nonvolatile memory device; and a reset unit suitable for selectively performing a reset operation for the... Sk Hynix Inc

12/14/17 / #20170357466

Data storage device and operating method thereof

A data storage device includes a nonvolatile memory device; and a controller configured to generate a read command based on information on a memory region of the nonvolatile memory device corresponding to a read request and at least one memory region of the nonvolatile memory device corresponding to at least... Sk Hynix Inc

12/14/17 / #20170358335

Page buffer and memory device including the same

Provided herein are a page buffer and a memory device having the same. The page buffer may include: a latch circuit comprising a first node configured to be set to a first level in response to a sense amplifier strobe signal when an operation of setting up a bit line... Sk Hynix Inc

12/14/17 / #20170358337

Comparison circuits and semiconductor devices employing the same

A comparison circuit may be provided. The comparison circuit may include a number of first logic circuits and a number of second logic circuits. The first logic circuits and second logic circuits may be configured to compare logic levels of a plurality of input signals with each other to generate... Sk Hynix Inc

12/14/17 / #20170358341

Semiconductor device having input/output line drive circuit and semiconductor system including the same

A semiconductor system includes a first semiconductor device and a second semiconductor device. The first semiconductor device outputs a command/address signal. The second semiconductor device extracts an active signal, a pre-charge signal, and addresses from the command/address signal, performs an active operation on a memory cell corresponding to the addresses,... Sk Hynix Inc

12/14/17 / #20170358342

Semiconductor device having input/output line drive circuit and semiconductor system including the same

A semiconductor system includes a first semiconductor device and a second semiconductor device. The first semiconductor device outputs a command/address signal. The second semiconductor device extracts an active signal, a pre-charge signal, and addresses from the command/address signal, performs an active operation on a memory cell corresponding to the addresses,... Sk Hynix Inc

12/14/17 / #20170358346

Read threshold optimization in flash memories

A memory device includes a plurality of memory blocks, each block with multiple memory cells. Each memory block has an address and a block read threshold. The plurality of memory blocks is partitioned into clusters based on block read thresholds. The memory device also has a look-up table for storing... Sk Hynix Inc

12/14/17 / #20170358350

Memory device, operation the same, and operation memory controller

A method for operating a memory device comprising a plurality of memory cells, the method may include: performing a first refresh operation comprising sequentially applying a recovery pulse to each of the plurality of memory cells and repeating the sequential application of the recovery pulse to each of the plurality... Sk Hynix Inc

12/14/17 / #20170358351

Memory apparatus and reference voltage setting method thereof

A memory apparatus includes a write driver, a sense amplifier and a reference voltage setting circuit. The write driver programs a set data or a reset data into a memory cell. The sense amplifier generates an output signal by sensing data stored in the memory cell. The reference voltage setting... Sk Hynix Inc

12/14/17 / #20170358356

Semiconductor device and manufacturing the same

A semiconductor device may be provided. The semiconductor device may include a sub-channel layer located over a conductive layer. The semiconductor device may include a hole source layer interposed between the conductive layer and the sub-channel layer. The semiconductor device may include source select lines located over the sub-channel layer.... Sk Hynix Inc

12/14/17 / #20170358362

Semiconductor device and manufacturing the same

A semiconductor device may include an insulating layer, a bulk pattern, a stack structure, and a channel pattern. A first trench may be formed in the insulating layer. A bulk pattern may be located in the first trench and includes a metal pattern and an electron hole source. The stack... Sk Hynix Inc

12/14/17 / #20170358591

Semiconductor integrated circuit device relating to resistance characteristics and manufacturing the same

A semiconductor integrated circuit device may include a structure, a first capping layer, a channel layer and a second capping layer. The structure may have an opening formed in the structure. The first capping layer may be formed in the opening of the structure. The channel layer may be arranged... Sk Hynix Inc

12/14/17 / #20170358739

Electronic device and fabricating the same

A method for fabricating an electronic device including a semiconductor memory includes: forming a variable resistance element including material layers over a substrate; forming a hard mask layer including a metal over the material layers; selectively etching the hard mask layer to form an etched hard mask layer; etching the... Sk Hynix Inc

12/14/17 / #20170358743

Resistive random access memory device

A resistive random access memory device is provided. The resistive random access memory device includes a first electrode, a second electrode, and an electrolyte layer disposed between the first electrode and the second electrode. One of the first electrode and the second electrode includes an ion supply layer providing two... Sk Hynix Inc

12/14/17 / #20170359084

Semiconductor devices and semiconductor systems

A semiconductor system may be provided. The semiconductor system may include a first semiconductor device and a second semiconductor device. The first semiconductor device may be configured to perform an error correction operation. The second semiconductor device may be configured to perform an error correction operation. The semiconductor system may... Sk Hynix Inc

12/14/17 / #20170359521

Pixel signal transfer device and method thereof and cmos image sensor including the same

A pixel signal transfer device includes a transfer block suitable for transferring a pixel output voltage according to an amount of a charge generated from a pixel; a correction block suitable for correcting the pixel output voltage using a threshold voltage of an amplification transistor; and a conversion gain adjusting... Sk Hynix Inc

12/14/17 / #20170359543

Circuit for reading-out voltage variation of floating diffusion area, method thereof and cmos image sensor using the same

A circuit for reading-out a voltage variation of a floating diffusion area includes a reference capacitor suitable for causing a voltage variation of the floating diffusion area based on a charge transfer signal and a read-out block including the floating diffusion area, and suitable for initializing the floating diffusion area,... Sk Hynix Inc

12/07/17 / #20170351290

Reference voltage generation circuit and driving the same

A reference voltage generation circuit includes a loading block suitable for generating a reference current and first and second mirroring currents obtained by mirroring the reference current based on a power source voltage, a biasing block suitable for generating a first bias voltage controlled corresponding to variations in the power... Sk Hynix Inc

12/07/17 / #20170351449

Memory system

A memory system includes a memory apparatus including a write driver and a memory controller configured to control the memory apparatuses. The memory controller includes a command comparison circuit configured to compare word line addresses, bit line addresses, and pieces of write data of a first write command and a... Sk Hynix Inc

12/07/17 / #20170351460

Memory apparatus relating to on die termination

A memory apparatus may include a plurality of ranks commonly coupled to an input/output (I/O) terminal. Non-target ranks other than a target rank among the plurality of ranks may be configured to perform an on die termination operation based on a read operation of the target rank.... Sk Hynix Inc

12/07/17 / #20170352400

Semiconductor memory device and refresh semiconductor memory device

A semiconductor memory device may include a row address generating circuit, a row active pulse generating circuit and a word line activating circuit. The row address generating circuit may generate a row address in response to a refresh command, a row active pulse, and a normal address. The row active... Sk Hynix Inc

12/07/17 / #20170352404

Refresh control device, and memory device including the same

A refresh control device, and a memory device may be provided. The latch controller may include a first oscillator configured to generate a first oscillation signal, and a second oscillator configured to generate a second oscillation signal. The latch controller may be configured to receive a precharge signal and prevent... Sk Hynix Inc

12/07/17 / #20170352405

Semiconductor device and semiconductor system

A semiconductor system includes a semiconductor device suitable for not performing an internal refresh operation when entering a self-refresh mode in response to a self-refresh command, and cutting off input of an auto-refresh command when exiting the self-refresh mode.... Sk Hynix Inc

12/07/17 / #20170352552

Method of manufacturing semiconductor device

A method of manufacturing a semiconductor device may include forming a first stack structure by alternately stacking first material layers and second material layers, forming first holes penetrating the first stack structure and a first slit located between the first holes, forming channel patterns in the first holes and a... Sk Hynix Inc

12/07/17 / #20170352612

Semiconductor packages including heat spreaders and methods of manufacturing the same

There may be provided a method of manufacturing a semiconductor package. The method may include disposing a first semiconductor device and through mold ball connectors (TMBCs) on a first surface of an interconnection structure layer, forming a molding layer on the first surface of the interconnection structure layer to expose... Sk Hynix Inc

12/07/17 / #20170352642

Apparatus for bonding a semiconductor chip and forming a semiconductor device

An apparatus for bonding a semiconductor chip to a package substrate, the apparatus comprising: a die-bonding unit configured to attach the semiconductor chip to the package substrate; a load-measuring unit installed at the die-bonding unit, the load-measuring unit including a panel having a plurality of regions and a plurality of... Sk Hynix Inc

12/07/17 / #20170352667

Pattern forming method and semiconductor device manufacturing method using the same

A method for forming patterns includes forming an etch target layer; etching the etch target layer to form a pre-pattern having a line forming portion and a plurality of pad portions; forming a plurality of spacers which extend across the pad portions and the line forming portion; forming, over the... Sk Hynix Inc

Social Network Patent Pack
12/07/17 / #20170352673

Semiconductor device and manufacturing method thereof

A semiconductor device includes a second channel layer in a first column and a second channel layer in a second column disposed biased to one side of a first channel layer in a first column and a first channel layer in a second column, respectively. The one side of the... Sk Hynix Inc

12/07/17 / #20170352682

Semiconductor device with high integration

The present disclosure may provide a semiconductor device having a stable structure and a low manufacturing degree of the difficulty. The device may include conductive layers and insulating layers which are alternately stacked; a plurality of pillars passing through the conductive layers and the insulating layers; and a plurality of... Sk Hynix Inc

12/07/17 / #20170352683

Semiconductor device with high integration

The present disclosure may provide a semiconductor device having a stable structure and a low manufacturing degree of the difficulty. The device may include conductive layers and insulating layers which are alternately stacked; a plurality of pillars passing through the conductive layers and the insulating layers; and a plurality of... Sk Hynix Inc

12/07/17 / #20170352805

Electronic device and fabricating the same

An electronic device including a semiconductor memory is provided. The semiconductor memory includes an interlayer dielectric layer disposed over a substrate, and having a recess which exposes a portion of the substrate; a bottom contact partially filling the recess; and a resistance variable element including a bottom layer which fills... Sk Hynix Inc

12/07/17 / #20170352807

Method of fabricating switching element and manufacturing resistive memory device

A method of manufacturing a switching element includes forming a first electrode layer over a substrate, forming a switching structure on the first electrode layer, and forming a second electrode layer on the switching structure. The switching structure includes a plurality of unit switching layers that includes a first unit... Sk Hynix Inc

12/07/17 / #20170353677

Analog-digital converting device and method, and image sensor including the same

An analog-digital converting device includes a comparison block generating at least one first comparison signal by comparing pixel signals with each other, and for generating second comparison signals by comparing each of the plurality of pixel signals with a ramp signal through a single ramping operation; a feedback control unit... Sk Hynix Inc








ARCHIVE: New 2018 2017 2016 2015 2014 2013 2012 2011 2010 2009



###

This listing is an abstract for educational and research purposes is only meant as a recent sample of applications filed, not a comprehensive history. Freshpatents.com is not affiliated or associated with Sk Hynix Inc in any way and there may be associated servicemarks. This data is also published to the public by the USPTO and available for free on their website. Note that there may be alternative spellings for Sk Hynix Inc with additional patents listed. Browse our Agent directory for other possible listings. Page by FreshPatents.com

###