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Sk Hynix Inc
Sk Hynix Inc_20131212

Sk Hynix Inc patents


Recent patent applications related to Sk Hynix Inc. Sk Hynix Inc is listed as an Agent/Assignee. Note: Sk Hynix Inc may have other listings under different names/spellings. We're not affiliated with Sk Hynix Inc, we're just tracking patents.

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Trimming circuit and operating method thereof

Disclosed herein is a method for trimming a voltage regulator by a trimming circuit comprising a voltage divider configured to divide a divide reference voltage according to a divider code and to output a first divider output voltage, a comparator configured to receive the first divider output voltage and a... Sk Hynix Inc

Bus architecture with reduced skew and peak power consumption

Disclosed herein is a bus architecture for transferring data from a bus signal generator to a receiver comprises a plurality of bus lines comprising a plurality of odd bus lines and a plurality of even bus lines, each of the even bus lines being arranged between adjacent odd bus lines;... Sk Hynix Inc

Memory system and operation the same

A memory system includes: a non-volatile memory device that includes a plurality of memory blocks each of which includes a plurality of pages; and a controller suitable for programming write data together with corresponding write order information in the plurality of the pages during a write operation, wherein when two... Sk Hynix Inc

Latch control signal generation circuit and semiconductor devices

A semiconductor device may be provided. The semiconductor device may include a latch control signal generation circuit configured to compare a count signal counted according to the number of times that a command is inputted to the latch control signal generation circuit with a random signal having a random combination... Sk Hynix Inc

Semiconductor devices

A semiconductor device may include a valid command generation circuit and a training control circuit. The valid command generation circuit may be configured to latch an internal chip selection signal and an internal control signal in synchronization with a division clock signal to generate a latch chip selection signal and... Sk Hynix Inc

Electronic device

In one implementation, an electronic device is provided to include a semiconductor memory, wherein the semiconductor memory may include: a variable resistance element including a Magnetic Tunnel Junction (MTJ) structure including a free layer having a changeable magnetization direction free layer, a pinned layer having a fixed magnetization direction and... Sk Hynix Inc

Resistance change memory

According to an embodiment, a resistance change memory includes a semiconductor substrate, a transistor having a control terminal, a first terminal and a second terminal, the transistor provided on the semiconductor substrate, an insulating layer covering the transistor, a first conductive line connected to the first terminal and provided on... Sk Hynix Inc

Data storage device and operating method thereof

A data storage device includes a nonvolatile memory device including a reference memory region and a normal memory region, and suitable for determining whether to perform a refresh operation, based on the reference memory region; and a controller suitable for determining a first memory region in the normal memory region... Sk Hynix Inc

Memory device and operating the memory device

A memory device includes a memory cell array including a plurality of blocks, a power supply unit suitable for generating at least one erase voltage and supplying the at least one erase voltage to the memory cell array, a control logic suitable for receiving multi-block erase information for the same... Sk Hynix Inc

Methods of testing cell arrays and semiconductor devices executing the same

A semiconductor device includes a pattern data generation circuit generating pattern data, a data comparison circuit receiving read data which are outputted from cell arrays included in a core area by a read operation and comparing the read data with the pattern data to generate a fail code, and a... Sk Hynix Inc

Fuse circuit, repair control circuit, and semiconductor apparatus including the same

A fuse circuit may include a plurality of first fuse sets and a plurality of second fuse sets. The plurality of first fuse sets may be used to store a defect address detected before packaging of a semiconductor apparatus. The plurality of second fuse sets may be used to store... Sk Hynix Inc

Semiconductor device

A semiconductor device may be provided. The semiconductor device may include conductive patterns surrounding a channel film. The conductive patterns may be stacked and spaced apart from one another. The semiconductor device may include a gate contact plug coupled to one of the conductive patterns. The semiconductor device may include... Sk Hynix Inc

Memory device and manufacturing method thereof

There are provided a memory device and a manufacturing method thereof. A method of manufacturing a memory device may include forming, on a substrate, a conductive layer, a sacrificial layer, and a stack structure. The method may include forming a plurality of vertical holes by etching a portion of the... Sk Hynix Inc

Image sensor

An image sensor includes: a pixel array including a plurality of unit pixels that are arrayed in two dimensions, wherein each of the plurality of the unit pixels includes: a substrate that including a photoelectric conversion element; a recess pattern formed in the substrate to overlap with the photoelectric conversion... Sk Hynix Inc

Transmitter and system including the same

A transmitter may include a first transmission driver configured to drive a first transmission line according to a first input signal, a second transmission driver configured to drive a second transmission line according to a second input signal, a third transmission driver configured to drive a third transmission line according... Sk Hynix Inc

Electronic device and manufacturing the same

A method for manufacturing an electronic device includes forming a first source layer including a trench, forming a first sacrificial layer in the trench, forming a first structure over the first source layer, wherein the first structure includes first material layers and second material layers which are alternately stacked over... Sk Hynix Inc

Precharge control device and semiconductor device including the same

A precharge control device includes a pulse generator, a bank address controller, and a precharge signal generator. The pulse generator generates a write precharge signal in response to a write burst end signal activated after a write burst operation and a read precharge signal in response to a read burst... Sk Hynix Inc

Semiconductor device and operating method thereof

A semiconductor device includes: first to Nth non-volatile memory areas, each including a plurality of cells positioned at cross points between row lines and column lines; a storage circuit including a plurality of unit latches suitable for storing data transferred from the first to Nth non-volatile memory areas; and an... Sk Hynix Inc

Semiconductor device and manufacturing the same

The semiconductor device includes a stacked structure having alternately stacked conductive patterns and interlayer insulating patterns, a through-hole passing through the stacked structure, a channel pattern formed in the through-hole and protruding from an inside of the through hole over the through-hole, and a capping conductive pattern formed to be... Sk Hynix Inc

Electronic device and manufacturing the same

A method for manufacturing an electronic device includes forming a first source layer including a trench, forming a first sacrificial layer in the trench, forming a first structure over the first source layer, wherein the first structure includes first material layers and second material layers which are alternately stacked over... Sk Hynix Inc

Semiconductor device and manufacturing method thereof

Provided herein is a semiconductor device including: a channel layer; a data storage layer surrounding the channel layer and extending along the channel layer; interlayer insulating layers surrounding the data storage layer and stacked along the channel layer, wherein the interlayer insulating layers are spaced apart from each other, wherein... Sk Hynix Inc

Memory system and operating the same

A memory system includes a memory device including one or more memory blocks, and configured to store data in a plurality of pages included in each memory block through a write operation, and a memory controller configured to count an operation number of write operations performed on the memory block,... Sk Hynix Inc

Memory module and method system including the same

A memory module includes: a front interface suitable for performing a serial-to-parallel conversion of a command, an address, and data that are received from a host memory controller; a module controller suitable for communicating with the host memory controller through the front interface; and a memory device suitable for receiving... Sk Hynix Inc

Operation convolutional neural network

Disclosed herein is a convolutional neural network (CNN) operation apparatus, including at least one channel hardware set suitable for performing a feature extraction layer operation and a classification layer operation based on input data and weight data, and a controller coupled to the channel hardware set. The controller may control... Sk Hynix Inc

Apparatus and controlling memory

This technology relates to a memory control apparatus for processing data into a memory device and an operating method of the memory control apparatus. A method for controlling a memory may include converting received program data with a first address into compressed data, searching a deduplication table including compressed data,... Sk Hynix Inc

Semiconductor device and semiconductor system

A semiconductor device includes a comparison circuit suitable for comparing a reference voltage and a strobe signal, and generating a first comparison strobe signal. The semiconductor device also includes a reference voltage training circuit suitable for sequentially changing a voltage level of the reference voltage if a training mode is... Sk Hynix Inc

Semiconductor device and method thereof

A semiconductor device may be provided. The semiconductor device may include an address conversion circuit configured for generating a converted address. The semiconductor device may include a column decoder configured for generating a first output select signal or a second output select signal from a column address based on the... Sk Hynix Inc

Semiconductor device relating to generate target address to execute a refresh operation

A semiconductor device may be provided. The semiconductor device may include a target address storage circuit and a first row address generation circuit. The target address storage circuit may be configured to count the number of times that blocks are selected by a plurality of logic level combinations of an... Sk Hynix Inc

Refresh control device

A refresh control device may include a first oscillator configured to generate a first oscillation signal, a second oscillator configured to generate a second oscillation signal having a different cycle from the first oscillation signal, a first address controller configured to latch an address in response to the first oscillation... Sk Hynix Inc

Semiconductor memory device and operating the same

Provided herein are a semiconductor memory device and a method of operating the semiconductor memory device. The semiconductor memory device includes a memory cell array including a memory cell array including a plurality of memory cells, a peripheral circuit configured to perform a program operation, which includes a plurality of... Sk Hynix Inc

Memory device and operating method thereof

There are provided a memory device and an operating method thereof. A memory device may include a memory block, peripheral circuits, and a control logic. The memory block may include a plurality of memory cells. The peripheral circuits may perform a program operation on the memory cells. The control logic... Sk Hynix Inc

Boot-up control circuit and semiconductor apparatus including the same

A boot-up control circuit may be provided. The boot-up control circuit may include a fuse array including a one or more normal fuses and one or more dummy fuses. The boot-up control circuit may include a fuse array controller configured to determine whether or not to start a normal boot-up... Sk Hynix Inc

Semiconductor memory device and operating the same

Provided herein are a semiconductor memory device and a method of operating the same. The semiconductor memory device includes: a memory cell array including a plurality of memory cells; a peripheral circuit configured to control the memory cell array, the peripheral circuit including a first region disposed under the memory... Sk Hynix Inc

Semiconductor memory device and operating method thereof

A semiconductor memory device includes: a memory array region including normal memory cells and redundant memory cells; a fuse circuit including fuse cells for programming repair addresses, outputting fuse data including the programmed repair addresses and fuse enable signals in response to a boot-up signal; a fuse information storage including... Sk Hynix Inc

Isolation structure and manufacturing the same

A method for manufacturing a semiconductor device includes forming a first trench and a second trench in a substrate, the first and the second trenches communicate with each other, the second trench may be formed wider than the first trench; forming a liner layer over an inner surface of the... Sk Hynix Inc

03/29/18 / #20180090383

Stack type semiconductor memory device

A stack type memory device and a method of manufacturing the same are provided. The stack type memory device includes a semiconductor substrate, a plurality of active layers stacked on the semiconductor substrate, and a gate structure overlapping the plurality of active layers. The gate structure includes a side gate... Sk Hynix Inc

03/29/18 / #20180090534

Image sensor including depletion inducing layer

An image sensor may include a pixel array where a plurality of unit pixels are arranged in a two dimensional matrix, wherein each of the unit pixels includes: a substrate including a photoelectric conversion element; one or more depletion inducing layers formed in the photoelectric conversion element; an inter-layer dielectric... Sk Hynix Inc

03/29/18 / #20180091120

Voltage generation circuits, semiconductor devices including the same, and methods of generating voltages

A voltage generation circuit includes a current source connected to a first node to generate a first internal current corresponding to a constant current, a comparison circuit generating a drive voltage whose level is controlled according to a voltage difference between the first node whose voltage level is controlled by... Sk Hynix Inc

03/29/18 / #20180091124

Buffer circuit, reciever and system using the same

A buffer circuit may include an amplification circuit, a main load circuit, and a sub-load circuit. The amplification circuit and the main load circuit may generate first and second output signals by amplifying first and second input signals. The sub-load circuit may compensate mismatch between rising timing and falling timing... Sk Hynix Inc

03/29/18 / #20180091171

Memory controller, semiconductor memory system and operating method thereof

An operation method of a memory controller may include performing a first decoding operation to a message of an internal region included in a codeword received from a semiconductor memory device by using an internal parity, wherein the message and the internal parity are included in the internal region in... Sk Hynix Inc

03/29/18 / #20180091753

Count circuit, driving count circuit, and image sensor including count circuit

A count circuit includes a count block suitable for generating count code signals for a predetermined count period including a first period and a second period; and a storage block suitable for storing first bit signals among a plurality of bit signals included in the count code signals, for the... Sk Hynix Inc

03/22/18 / #20180081545

Resistance variable memory apparatus, and circuit and operating therefor

A resistance variable memory apparatus may include a memory circuit configured to include a plurality of blocks, each including a plurality of memory cells. The resistance variable memory apparatus may include a disturbance preventing circuit configured to be driven based on a counting signal corresponding to the number of write... Sk Hynix Inc

03/22/18 / #20180081551

Memory system and operating method thereof

A memory system may include: a memory device including a plurality of memory blocks each memory block having a plurality of pages; and a controller suitable for performing a program operation of storing data segments and meta segments in the pages, and recording a checkpoint information for the program operation... Sk Hynix Inc

03/22/18 / #20180081552

Memory system and operating method thereof

A memory system may include: a memory device including a plurality of memory blocks each memory block having a plurality of pages; and a controller suitable for performing a plurality of operations to first memory blocks among the memory blocks at a first time, recording a checkpoint information for the... Sk Hynix Inc

03/22/18 / #20180081576

Memory system and operating method thereof

A memory system may include: a memory device including a plurality of memory blocks each memory block having a plurality of pages; and a controller suitable for checking parameters and deviations of the parameters for the respective memory blocks, which are recorded in a count information, and selecting source memory... Sk Hynix Inc

03/22/18 / #20180081582

Data storage device and operating method thereof

A data storage device includes a nonvolatile memory device; a control unit suitable for generating a descriptor in which works for controlling the nonvolatile memory device are described; a memory control unit suitable for performing a control operation for the nonvolatile memory device and a data input operation, based on... Sk Hynix Inc

03/22/18 / #20180082723

Semiconductor memory apparatus

A semiconductor memory apparatus includes a write control circuit suitable for generating a write cancel signal and a rewrite signal in response to a voltage level of a write voltage in a write operation, and a driving circuit suitable for transferring data to a data storage region in response to... Sk Hynix Inc

03/22/18 / #20180082727

Electronic device including a semiconductor memory

This technology provides an electronic device. An electronic device in accordance with an implementation of this document includes semiconductor memory, and the semiconductor memory includes a contact plug; a first stack structure disposed over the contact plug and coupled to the contact plug, wherein the first stack structure includes a... Sk Hynix Inc

03/22/18 / #20180082731

Semiconductor memory device and operating method thereof

A semiconductor memory device and an operating method thereof. The semiconductor memory device includes a memory cell array, a peripheral circuit and a control logic. The memory cell array includes a plurality of memory cells. The peripheral circuit performs a program operation for the plurality of memory cells in the... Sk Hynix Inc

03/22/18 / #20180082734

Semiconductor memory device

Provided herein is a semiconductor memory device. The semiconductor memory device may include a memory cell array including a plurality of memory cells coupled to a plurality of bit lines and a page buffer circuit coupled to the plurality of bit lines and including a plurality of page buffers, wherein... Sk Hynix Inc

03/22/18 / #20180082736

Refresh control device

A refresh control device for reducing power consumption during a target row refresh operation is disclosed. The refresh control device includes a refresh address generator configured to generate a refresh address by selecting any one of a target row refresh address and a normal refresh address according to a target... Sk Hynix Inc

03/22/18 / #20180082737

Address decoder and active control circuit and semiconductor memory including the same

An address decoder includes decoding logic configured to generate a decoding address by decoding one of a first die ID having a value according to a first operation mode, a second die ID having a value according to a second operation mode, and a bank address according to a signal... Sk Hynix Inc

03/22/18 / #20180082739

Voltage controlling circuit

A voltage controlling circuit may include a first voltage terminal, a second voltage terminal and a plurality of Ovonic threshold switch (OTS) units. The second voltage terminal may have a voltage different from that of the first voltage terminal. The OTS devices may be connected between the first voltage terminal... Sk Hynix Inc

03/22/18 / #20180082740

Resistance variable memory apparatus

A resistance variable memory apparatus includes a memory cell array region and a peripheral region disposed along an edge of the memory cell region. The memory cell array region may have a plurality of memory banks each of which includes at least one memory block. The resistance variable memory apparatus... Sk Hynix Inc

03/22/18 / #20180082741

Resistive memory apparatus and line selection circuit thereof

A resistive memory apparatus includes a memory cell array, a local switch, and a global switch. The memory cell array may include a plurality of resistive memory cells coupled to a plurality of connection lines. The local switch may select a target connection line coupled to a target memory cell... Sk Hynix Inc

03/22/18 / #20180082744

Semiconductor memory device

Disclosed is a semiconductor memory device. The semiconductor memory device includes: a first memory block; and a second memory block sharing a block word line with the first memory block, in which the block word line includes a first block word line disposed so as to overlap the first memory... Sk Hynix Inc

03/22/18 / #20180082748

Control circuit, peripheral circuit, semiconductor memory device and operating the same

Provided herein may be a control circuit, peripheral circuit, semiconductor memory device and methods of operating the device and circuits. The method of operating a semiconductor memory device may include applying a control signal having a form, in which a step pulse is combined with a ramp signal, to a... Sk Hynix Inc

03/22/18 / #20180082749

Eprom device for storing multi-bit data and read circuit of eprom device

An EPROM device may include a unit cell, a switching unit, a multiplexer, and a comparator. The unit cell may be disposed between a bit line, which is coupled to a program voltage supply line, and a ground voltage terminal. The switching unit may be disposed between the bit line... Sk Hynix Inc

03/22/18 / #20180082752

Semiconductor memory device and operating method thereof

Provided herein is a semiconductor memory device and an operating method thereof. The semiconductor memory device includes a memory cell array and a control logic. The memory cell array includes a plurality of memory blocks. The control logic groups the memory blocks, determines driving voltages to be respectively applied to... Sk Hynix Inc

03/22/18 / #20180082754

Semiconductor device

A semiconductor device may be provided. The semiconductor device may be configured for detecting a defect of a fuse set. The semiconductor device may include a pseudo initial signal generator configured to generate pseudo initial information on the basis of a test mode signal. The semiconductor device may include a... Sk Hynix Inc

03/22/18 / #20180082892

Semiconductor device and manufacturing method thereof

Provided herein is a method of manufacturing a semiconductor device. The method may include forming an amorphous channel layer. The method may include forming a diffusion barrier on the amorphous channel layer. The method may include forming an amorphous seed layer on the diffusion barrier. The method may include forming... Sk Hynix Inc

03/22/18 / #20180082949

Fuse structure and manufacturing the same

A fuse structure may include an anode pattern, a cathode pattern and a connection member. The anode pattern may be formed on a semiconductor substrate. The cathode pattern may be formed on the anode pattern. The connection member may be electrically connected between the anode pattern and the cathode pattern.... Sk Hynix Inc

03/22/18 / #20180083035

Electronic device and fabricating the same

Provided is an electronic device including a semiconductor memory. The semiconductor memory may include: a substrate; and a stepped structure including first interlayer dielectric layers and conductive layers which are alternately stacked over the substrate, wherein ends of the conductive layers are exposed along the profile of the stepped structure,... Sk Hynix Inc

03/22/18 / #20180083616

Power-up signal generation circuit and semiconductor device including the same

A power-up signal generation circuit including a pre-power-up signal generation block operates by using a first power supply voltage, and generates a pre-power-up signal when the first power supply voltage becomes higher than a first level, and a second power supply voltage becomes higher than a second level; a level... Sk Hynix Inc

03/22/18 / #20180084213

Comparison device and image sensor including the same

A comparison device includes a comparison block suitable for comparing an upper ramp signal or a lower ramp signal with a pixel signal, and outputting a comparison signal; a CDS block provided between a first input terminal into which the pixel signal is inputted and a negative input terminal of... Sk Hynix Inc

Patent Packs
03/15/18 / #20180074396

Photomask including transfer patterns for reducing a thermal stress

A photomask includes a light transmission substrate, a plurality of pattern regions disposed over the light transmission substrate, a shape of the plurality of pattern regions being transferred onto a wafer during an exposure process, and a light blocking region surrounding the plurality of pattern regions. Each of the plurality... Sk Hynix Inc

03/15/18 / #20180074419

Methods of forming patterns using nanoimprint lithography

A method of forming patterns is provided. The method includes forming a resist layer on a substrate, imprinting transfer patterns of a template on the resist layer, performing an alignment operation to correct a position of the substrate or the template, increasing a viscosity of the resist layer while the... Sk Hynix Inc

03/15/18 / #20180074710

Memory system and operating method thereof

A memory system may include: a memory device including a plurality of pages in which data are stored and a plurality of memory blocks which include the pages; and a controller suitable for storing data segments of user data corresponding to a write command received from a host, in the... Sk Hynix Inc

03/15/18 / #20180074711

Memory operating the same

A memory system includes: a nonvolatile memory device that includes a plurality of memory blocks; a volatile memory device; and a controller suitable for grouping the plurality of the memory blocks by a predetermined number of memory blocks into K block groups, storing in the volatile memory K operation information... Sk Hynix Inc

03/15/18 / #20180074718

Memory operating the same

A memory system includes: a nonvolatile memory device; a volatile memory; and a controller suitable for storing a plurality of operation information and a plurality of version information, and selectively copying updated operation information from the volatile memory into the nonvolatile memory device at a predetermined moment based on the... Sk Hynix Inc

03/15/18 / #20180074895

Semiconductor device, semiconductor system, and method thereof

A semiconductor system may be provided. The semiconductor system may include a first semiconductor device configured for outputting a command and an address, and inputting/outputting data. The semiconductor system may include a second semiconductor device including first and second registers, wherein first corrected data, which is generated by correcting an... Sk Hynix Inc

03/15/18 / #20180074989

Semiconductor device

A semiconductor device includes: various types of memories; an interface configured to transmit memory characteristic information of the memories to a host, receive information needed to control operations of the memories from the host, and perform interfacing between the host and the memories; and a controller configured to control operations... Sk Hynix Inc

03/15/18 / #20180075339

Neural network hardware accelerator architectures and operating method thereof

A memory-centric neural network system and operating method thereof includes: a processing unit; semiconductor memory devices coupled to the processing unit, the semiconductor memory devices contain instructions executed by the processing unit; weight matrixes including a positive weight matrix and a negative weight matrix constructed with rows and columns of... Sk Hynix Inc

03/15/18 / #20180075344

Neural network hardware accelerator architectures and operating method thereof

A memory-centric neural network system and operating method thereof includes: a processing unit; semiconductor memory devices coupled to the processing unit, the semiconductor memory devices contain instructions executed by the processing unit; a weight matrix constructed with rows and columns of memory cells, inputs of the memory cells of a... Sk Hynix Inc

03/15/18 / #20180075885

Semiconductor device and system performing calibration operation

A semiconductor device may include a calibration circuit and an output circuit. The calibration circuit may perform a calibration operation for setting a resistance value of the output circuit. The calibrations circuit may perform the calibration operation by being coupled, through a signal transmission line, to a reference resistor provided... Sk Hynix Inc

03/15/18 / #20180075905

Electronic device

Provided are, among others, memory circuits or devices and their applications in electronic devices or systems and various implementations of an electronic device which includes a semiconductor memory unit including one or more column, a data line, and a data line bar connected with a column selected among the one... Sk Hynix Inc

03/15/18 / #20180075909

Semiconductor memory device and operating the same

A semiconductor memory device in accordance with an embodiment may include a memory cell array, a peripheral circuit, and a control circuit. The memory cell array may include a plurality of memory cells programmed to any one of first to N-th program states divided based on threshold voltages. The peripheral... Sk Hynix Inc

03/15/18 / #20180075910

Semiconductor memory device and operating the same

Provided herein are a semiconductor memory device and a method of operating the same. The semiconductor memory device includes a memory cell array including a plurality of memory cells, a status signal generator configured to output an internal status signal indicating whether an operation of the memory cell array has... Sk Hynix Inc

03/15/18 / #20180075915

High voltage switch circuit and semiconductor memory device including the same

Disclosed are a high voltage switch circuit and a semiconductor memory device including the same. The high voltage switching circuit includes: a control signal generating circuit configured to supply a supply voltage to an internal node and generate a control signal in response to a first enable signal; a well... Sk Hynix Inc

03/15/18 / #20180075916

Memory device and operating method thereof

Provided herein are a memory device and an operating method thereof. The memory device may include a plurality of memory blocks and one or more peripheral circuits. Each of the plurality of memory blocks may include a plurality of cell strings. The one or more peripheral circuits may perform one... Sk Hynix Inc

Patent Packs
03/15/18 / #20180076022

Method of treating semiconductor substrate

In a method of treating a semiconductor substrate, a plurality of active regions and a plurality of trench isolation regions are formed by selectively etching the semiconductor substrate. The semiconductor substrate is washed by providing deionized water to the semiconductor substrate. A silicon-based solution is provided to the semiconductor substrate... Sk Hynix Inc

03/15/18 / #20180076218

Semiconductor device and manufacturing the same

There is provided a semiconductor device. The semiconductor device includes a source layer, a well pickup layer formed on the source layer, a body structure formed on the well pickup layer and including a well region contacting the well pickup layer and first junctions formed on side walls of the... Sk Hynix Inc

03/15/18 / #20180076709

Charge pump switching controller for reducing standby current and charge pumping apparatus using the same

A charge pumping apparatus in accordance with an embodiment may include a charge pump output voltage detector, a pump oscillator, and a charge pump switching controller. The charge pump output voltage detector may detect a charge pump output voltage, and may selectively output an enable signal according to the detected... Sk Hynix Inc

03/08/18 / #20180067686

Memory system

A memory system includes a memory controller, a first memory module including first and second groups of first memory chips, a second memory module including first and second groups of second memory chips, and a channel including a first group of signal lines suitable for coupling the memory controller with... Sk Hynix Inc

03/08/18 / #20180067692

Controller, memory system and operating method thereof

A controller may include a first map buffer and a second map buffer suitable for storing map data and hit counts respectively corresponding to the map data, wherein each of the hit counts represents a number of accesses to data stored in a memory device by using a corresponding one... Sk Hynix Inc

03/08/18 / #20180067693

Memory device and memory system having the same

The invention relates to a memory device and a memory system having the same. The memory device includes a memory block including a plurality of pages, a peripheral circuit including a plurality of buffers sensing data stored in a selected page of the plurality of pages, temporarily storing high usage... Sk Hynix Inc

03/08/18 / #20180067696

Memory system and operating method thereof

A memory system includes: a memory device comprising a plurality of memory dies in which command operations corresponding to a plurality of commands received from a host are performed; and a controller suitable for issuing RS (Read Status) commands to memory dies included in a first memory die group among... Sk Hynix Inc

03/08/18 / #20180067796

Semiconductor devices and semiconductor systems including the same

A semiconductor device may be provided. The semiconductor device may include a memory area. The memory area may be configured to compare an address with a first failure address and a second failure address to store an input datum into a redundancy area and to output the stored input datum... Sk Hynix Inc

03/08/18 / #20180067801

Integrated circuit

An integrated circuit includes a first semiconductor device suitable for outputting a first error information signal by performing a first error correction operation, and a second semiconductor device suitable for outputting a second error information signal by performing a second error correction operation. The first error correction operation and the... Sk Hynix Inc

03/08/18 / #20180067802

Controller and operating method thereof

An operation method of a controller may include encoding a first data at a first code rate such that the encoded first data is decoded by a first parity check matrix included in a variable code-rate parity check matrix and encoding a second data at a second code-rate such that... Sk Hynix Inc

03/08/18 / #20180067880

Controller and operating method thereof

A controller may include a first encoder suitable for generating a first polar parity by performing a first polar encoding operation to respective first sections of an original message having a plurality of symbols, an interleaver suitable for generating an interleaved message by interleaving the original message according to first... Sk Hynix Inc

03/08/18 / #20180068692

Semiconductor device and power distribution network

In a semiconductor device, some regions of a memory cell array region may be used as reservoir regions. A semiconductor device may include at least one reservoir cell disposed with the memory cells in a cell array region.... Sk Hynix Inc

03/08/18 / #20180068698

Semiconductor device

A semiconductor device includes an internal operation control circuit suitable for generating a set period signal which is enabled for a set period, in response to a write command and an internal operation control signal, and generating a column select signal, an output control signal and an input control signal... Sk Hynix Inc

03/08/18 / #20180068706

Semiconductor memory device and operating method thereof

Provided herein are a semiconductor memory device and an operating method thereof. The semiconductor memory device includes a memory cell array to which a plurality of word lines are coupled, a voltage generation circuit configured to apply operating voltages to the plurality of word lines during a program operation, and... Sk Hynix Inc

03/08/18 / #20180068730

Semiconductor memory device and operating the same

A semiconductor memory device and a method of operating the same are provided. The semiconductor memory device includes a plurality of memory layers stacked on a semiconductor substrate, wherein each of the plurality of memory layers includes one or more connection control transistors, one or more drain select transistors, a... Sk Hynix Inc

03/08/18 / #20180068731

Memory system and operating method thereof

A memory system may include: a memory device including a plurality of memory blocks; and a controller suitable for managing the memory blocks as a plurality of super memory blocks by grouping them in a type corresponding to a predetermined condition, managing a bad block pool of the form of... Sk Hynix Inc

03/08/18 / #20180068733

Semiconductor memory device and programming method thereof

A semiconductor memory device includes a memory cell array, a peripheral circuit and a control logic. The memory cell array includes a plurality of memory cells each of which stores 2 or more bits of data. The peripheral circuit is configured to perform a program operation for the memory cells... Sk Hynix Inc

03/08/18 / #20180068736

Memory operating the memory system

A memory system includes: a memory device; and a controller that is functionally coupled to the memory device, wherein the controller sets a first read bias for distinguishing erased cells and programmed cells from each other, and detects the number of cells that are read in the memory device by... Sk Hynix Inc

03/08/18 / #20180068740

Semiconductor memory device and operating the same

A semiconductor memory device includes a memory cell array, a read/write circuit and a control logic. The memory cell array includes a plurality of memory cells. The read/write circuit is configured to write data to the memory cell array or read data from the memory cell array. The control logic... Sk Hynix Inc

03/08/18 / #20180068743

Test methods of semiconductor devices and semiconductor systems used therein

A semiconductor system includes a medium controller and a semiconductor module. The medium controller outputs an address that is sequentially counted in a test mode, senses levels of data corresponding to the address in the test mode to determine if the data has a row error or a chip error,... Sk Hynix Inc

03/08/18 / #20180068981

Semiconductor apparatus and semiconductor system including the same

A semiconductor apparatus may include a package substrate, and a plurality of semiconductor chips. Wherein the package substrate and the semiconductor chips may be configured based on a load value of the semiconductor apparatus.... Sk Hynix Inc

03/08/18 / #20180068996

Electro-static discharge protection devices having a low trigger voltage

An electro-static discharge (ESD) protection device includes a first PN diode, a second PN diode and a silicon controlled rectifier (SCR). The first PN diode and the second PN diode are coupled in series between a pad and a ground voltage to provide a first discharge current path. The SCR... Sk Hynix Inc

03/08/18 / #20180069021

Semiconductor device and manufacturing the same

A semiconductor device may include a first cell structure, a second cell structure, a pad structure, a circuit, and one or more openings. The pad structure may be disposed between the first cell structure and the second cell structure, and may be electrically coupled to the first and second cell... Sk Hynix Inc

03/08/18 / #20180069036

Image sensor having guard dams

An image sensor is described. The image sensor may include a substrate including a pixel area, a logic area, and a guard area disposed between the pixel area and the logic area. The guard area may substantially prevent transfer of heat generated in the logic area from reaching the pixel... Sk Hynix Inc

03/08/18 / #20180069037

Stacked image sensor having an air gap

A stacked image sensor includes: a lower device including a lower inter-layer dielectric layer over an upper surface of a lower substrate, and a lower capping layer over the lower inter-layer dielectric layer; an upper device stacked over the lower device, including photodiodes in an upper substrate, an upper inter-layer... Sk Hynix Inc

03/08/18 / #20180069532

Duty correction device and semiconductor device including the same

A duty correction device may be provided. The duty correction device may include a duty controller configured to output a control signal by controlling a duty of a duty corrected signal, and detect a level of a feedback signal to convert the duty based on a code signal which is... Sk Hynix Inc








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