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Socionext Inc patents


Recent patent applications related to Socionext Inc. Socionext Inc is listed as an Agent/Assignee. Note: Socionext Inc may have other listings under different names/spellings. We're not affiliated with Socionext Inc, we're just tracking patents.

ARCHIVE: New 2018 2017 2016 2015 2014 2013 2012 2011 2010 2009 | Company Directory "S" | Socionext Inc-related inventors


Semiconductor integrated circuit device having a standard cell which includes a fin

Disclosed herein is a semiconductor integrated circuit device including a standard cell with a fin extending in a first direction. The fin and a gate line extending in a second direction perpendicular to the first direction and provided on the fin constitute an active transistor. ... Socionext Inc

Ultrasonic image generation system and ultrasonic wireless probe

An ultrasonic image generation system has a probe having an ultrasonic transducer configured to transmit and receive an ultrasonic signal, a processor configured to generate an ultrasonic image signal by processing a received signal of the ultrasonic transducer as well as to generate a drive signal that is supplied to the ultrasonic transducer, and a probe-side wireless communicator; and a terminal having a terminal-side wireless communicator configured to wirelessly communicate with the probe-side wireless communicator, a display configured to display an ultrasonic image based on the ultrasonic image signal, and an operation panel configured to input general measurement information, wherein the probe has a controller configured to determine control information necessary for generation of the drive signal and processing of the received signal from the general measurement information transmitted from the terminal.. . ... Socionext Inc

Semiconductor device and method for manufacturing the same

A semiconductor device includes: an integrated circuit having an electrode pad; a first insulating layer disposed on the integrated circuit; a redistribution layer including a plurality of wirings and disposed on the first insulating layer, at least one of the plurality of wirings being electrically coupled to the electrode pad; a second insulating layer having a opening on at least a portion of the plurality of wirings; a metal film disposed on the opening and on the second insulating layer, and electrically coupled to at least one of the plurality of wirings; and a solder bump the solder bump overhanging at least one of the plurality of wirings not electrically coupled to the metal film.. . ... Socionext Inc

Ultrasonic image generation system

An ultrasonic image generation system having an ultrasonic unit configured to transmit and receive an ultrasonic signal, a drive control/signal processing unit configured to repeat processing to generate an ultrasonic image signal by processing a received signal of the ultrasonic unit as well as to generate a drive signal that is supplied to the ultrasonic unit; and a display unit configured to repeat displaying an ultrasonic image based on the ultrasonic image signal, to stop updating of a displayed image in response to a stop signal input, and to resume updating of the displayed image in response to a start signal input, wherein the drive control/signal processing unit stops at least part of an operation in response to the stop signal input and resumes the stopped operation in response to the start signal input.. . ... Socionext Inc

Semiconductor integrated circuit device having an esd protection circuit

Diffusion regions having the same conductivity type are arranged on a side of a second wiring and a side of a third wiring, respectively under a first wiring connected to a signal terminal. Diffusion regions are separated in a whole part or one part of a range in a y direction. ... Socionext Inc

Reception circuit and semiconductor integrated circuit

A reception circuit includes a determination circuit including comparator circuits configured to determinate a level of a received signal and a logic circuit configured to generate a digital signal based on outputs of the comparator circuits. The determination circuit is configured to determinate by a first number of the comparator circuits when the received signal is a first signal which is a multi-valued signal and determinate by a second number of the comparator circuits, the second number being smaller than the first number, when the received signal is a second signal. ... Socionext Inc

Semiconductor device

In a semiconductor device, a first semiconductor chip having a main surface provided with a first terminal group including terminals, and a rear face mounted on a surface of a support. A second semiconductor chip has a main surface provided with a second terminal group including terminals, the main surface of the second semiconductor chip facing the main surface of the first semiconductor chip, and each of the terminals in the second terminal group being connected to a corresponding one of the terminals in the first terminal group of the first semiconductor chip. ... Socionext Inc

Semiconductor device and method of producing semiconductor device

A semiconductor device provided on a semiconductor substrate includes an element region including an element, a moisture-resistant frame surrounding the element region, an insulating layer provided between the moisture-resistant frame and an outer peripheral edge of the semiconductor device and on the semiconductor substrate, a first metal line extending along the outer peripheral edge and provided in the insulating layer, and a groove provided in the insulating layer.. . ... Socionext Inc

Semiconductor device comprising a standard cell

Disclosed herein is a semiconductor device including two standard cells which are arranged adjacent to each other in an x direction. One of the two standard cells includes a plurality of first fins which extend in the x direction, and which are arranged along a boundary between the two standard cells in a y direction. ... Socionext Inc

Semiconductor apparatus

A semiconductor apparatus includes an internal circuit connected to a first power line to which a first power voltage is applied; a transistor including a first terminal, which is connected to a node to which an input voltage is applied, a second terminal connected to the internal circuit, and a control terminal to which a control voltage is applied; and a voltage control circuit, which is connected to the node, generating the control voltage. Further, the voltage control circuit includes a step-down circuit generating an internal voltage by lowering the input voltage applied to the node, and a switching circuit, which is connected to the first power line, generating the control voltage based on the first power voltage and the internal voltage.. ... Socionext Inc

Semiconductor device

A local interconnect is formed in contact with an upper surface of an impurity diffusion region and extends to below a potential supply interconnect. A contact hole electrically couples the local interconnect to the potential supply interconnect. ... Socionext Inc

Ultrasonic imaging apparatus and method of controlling ultrasonic imaging apparatus

An ultrasonic imaging apparatus includes a plurality of transducers aligned in an array, a select circuit configured to cause transducers selected from the plurality of transducers to transmit an ultrasonic pulse and receive received signals, respectively, and a digital signal processing circuit configured to perform a first operation of adding up an odd number of the received signals, arranged in an order corresponding to the aligned array, with delays that are symmetrical between two sides across a center that is a centrally located signal, and to perform a second operation of adding up an even number of the received signals, arranged in an order corresponding to the aligned array, with delays that are symmetrical between two sides across a center that is situated between two centrally located signals.. . ... Socionext Inc

Finfet based driver circuit

Disclosed herein is a driver circuit including a first group of transistors provided between first and second nodes and including n of the transistor(s) where n is equal to or greater than one, and a second group of transistors provided in parallel with the first group of transistors and including m of the transistor(s) where m is equal to or greater than one and not equal to n, the m transistors being connected together in series. The n-channel transistor in the first group and at least one of the two n-channel transistors in the second group have their gate connected to an input node.. ... Socionext Inc

Semiconductor integrated circuit device

A semiconductor chip including an internal circuit, a plurality of electrode pads and a plurality of i/o cells. The plurality of electrode pads are arranged on a first line, a second line and a third line. ... Socionext Inc

02/08/18 / #20180035976

Ultrasonic imaging apparatus and method of controlling ultrasonic imaging apparatus

An ultrasonic imaging apparatus includes a plurality of transducers aligned in a line, a select circuit configured to cause transducers selected from the plurality of transducers to transmit an ultrasonic pulse and receive a plurality of received signals, respectively, and a digital signal processing circuit configured to align in time and add up the plurality of received signals weighted by a plurality of respective weighting factors, wherein the digital signal processing circuit changes the plurality of weighting factors according to a time position on the plurality of received signals such that ratios between the plurality of weighting factors change.. . ... Socionext Inc

02/01/18 / #20180034469

Frequency division correction circuit, reception circuit, and integrated circuit

A frequency division correction circuit includes: a first frequency divider configured to perform decimal frequency division on an input signal and output a first frequency division signal and a second frequency division signal which are different from each other in duty ratio; and a corrector configured to generate a first output signal having an intermediate duty ratio between a duty ratio of the first frequency division signal and a duty ratio of the second frequency division signal on the basis of the first frequency division signal and the second frequency division signal.. . ... Socionext Inc

01/25/18 / #20180021016

Ultrasonic probe

An ultrasonic probe includes, a transducer transmitting and receiving ultrasonic waves, and converting ultrasonic signals into voltage signals and vice versa, a first circuit configured to transmit pulse voltage signals to the transducer and receive the voltage signals from the transducer, a second circuit configured to convert the voltage signals received from the first circuit into digital values from analog values, a battery unit configured to supply electric power to the first circuit and the second circuit, and a substrate being provided with the transducer, the first circuit and the second circuit, the first circuit being disposed on a first surface of the substrate, and the second circuit being disposed on a second surface opposite to the first surface of the substrate.. . ... Socionext Inc

01/04/18 / #20180005627

Device including speech recognition function and method of recognizing speech

A device including a speech recognition function which recognizes speech from a user, includes: a loudspeaker which outputs speech to a space; a microphone which collects speech in the space; a first speech recognition unit which recognizes the speech collected by the microphone; a command control unit which issues a command for controlling the device, based on the speech recognized by the first speech recognition unit; and a control unit which prohibits the command issuance unit from issuing the command, based on the speech to be output from the loudspeaker.. . ... Socionext Inc

12/21/17 / #20170365262

Audio decoding device

An input signal includes a channel-based audio signal and an object-based audio signal, and an audio encoding device includes an audio scene analysis unit configured to determine an audio scene from the input signal and detect audio scene information; a channel-based encoder that encodes the channel-based audio signal output from the audio scene analysis unit; an object-based encoder that encodes the object-based audio signal output from the audio scene analysis unit; and an audio scene encoding unit configured to encode the audio scene information.. . ... Socionext Inc

11/23/17 / #20170339502

Signal processing device

A signal processing device includes phase rotation units which rotate a phase of a signal a and generate two signals having a phase difference of θ, and a control unit which performs transition of θ over time. The control unit controls phases so that θ is approximately 0 degrees at a time point t0 and θ is approximately 180 degrees at a time point t1.. ... Socionext Inc

11/23/17 / #20170336816

Semiconductor integrated circuit and power supply control system provided with a plurality of semiconductor integrated circuits

A semiconductor integrated circuit, supplied with a power source voltage generated by a power supplier and having a level determined in accordance with an analog signal, includes: an output unit outputting, as the analog signal, an output voltage signal indicating the power source voltage; an input unit including an input interface identical in specifications to an output interface of the output unit, and receiving an input signal indicating a voltage and input from an outside of the semiconductor integrated circuit; and a voltage control circuit generating the output voltage signal, based on the input signal and operating voltage information indicating a voltage required for an operation of the semiconductor integrated circuit.. . ... Socionext Inc

11/09/17 / #20170323887

Semiconductor integrated circuit and logic circuit

Disclosed herein is a driver circuit including first and second n-channel transistors connected together in series between first and second nodes. The first n-channel transistor is comprised of n fin transistor(s) having an identical gate length and an identical gate width where n is equal to or greater than one, and has its gate connected to a first input node. ... Socionext Inc

10/26/17 / #20170310530

Divided data transmitting and receiving system

A receiving system of the present disclosure includes: a plurality of demodulators; an add-on generating one stream based on an output from each of the demodulators; a selector selecting and outputting one among an output from one of the demodulators, namely the demodulator, and the one stream from the add-on; and a back-end processor generating an output for a display based on an output from the selector and the other demodulators, namely the demodulators. The selector selects an output from the demodulator in a single channel transmission mode, and selects the stream from the add-on in a multiple channel transmission mode.. ... Socionext Inc

10/26/17 / #20170310350

Agc circuit and radio receiver

An agc circuit for a radio receiver includes a detector converting a high frequency signal into a baseband signal. To reduce generation of a dc offset, the agc circuit includes: a variable gain amplifier having an amplifier circuit and a high-pass filter, the amplifier circuit amplifying the baseband signal with a variable gain and the high-pass filter coupled to the amplifier circuit and having a cut-off frequency which is variable; a controller supplying a gain control signal; and a blocker temporarily blocking the high frequency signal. ... Socionext Inc

10/26/17 / #20170310314

Output circuit and integrated circuit

An output circuit has: a first driver circuit configured to receive a voltage of an input terminal and output a first voltage to an output terminal; a first comparison circuit configured to compare a first reference voltage with a voltage of the output terminal; a second driver circuit configured to receive the voltage of the input terminal and output a second voltage to the output terminal and become an off state according to a comparison result of the first comparison circuit; a second comparison circuit configured to compare a second reference voltage different from the first reference voltage with the voltage of the output terminal; and a third driver circuit configured to receive the voltage of the input terminal and output a third voltage to the output terminal and become an off state according to a comparison result of the second comparison circuit.. . ... Socionext Inc

09/21/17 / #20170272889

Sound reproduction system

A sound reproduction system includes a sound processing device connected to a stationary first output device including a plurality of sound output units and a portable second output device including a plurality of sound output units. In the sound reproduction system, the sound processing device generates a first sound output signal to be output to the first output device and a second sound output signal, which is different from the first sound output signal, to be output to the second output device. ... Socionext Inc

09/14/17 / #20170264421

Multiplexers

There is disclosed herein multiplexer circuitry. In particular, there is disclosed a latch circuit for use as a multiplexer to multiplex information carried by respective pairs of input information signals onto an output information signal, each pair of input information signals comprising a first input information signal and a second input information signal, and each pair of input information signals carrying information values based on signal values of those input information signals and interleaved with information values carried by the other pair or pairs of input information signals.. ... Socionext Inc

09/14/17 / #20170264375

Integrated circuitry systems

There is disclosed herein a circuitry system comprising first and second ic chips, configured or configurable such that; the first ic chip has an output terminal connected to receive an output signal from an output-signal unit of the first ic chip, the output-signal unit being connected between high and low voltage-reference sources of the first ic chip, the high and low voltage-reference sources being connected to respective high and low voltage-reference terminals of the first ic chip; and the second ic chip has an input terminal connected in a potential-divider arrangement between high and low voltage-reference terminals of the second ic chip, wherein: the high and low voltage-reference terminals of the first ic chip are respectively connected to the high and low voltage-reference terminals of the second ic chip; and the output terminal of the first ic chip is connected to the input terminal of the second ic chip.. . ... Socionext Inc

09/14/17 / #20170264310

Circuitry for use in comparators

There is disclosed herein charge-mode circuitry for use in a comparator to capture a difference between magnitudes of first and second input signals, the circuitry comprising: a tail node configured during a capture operation to receive a charge packet; first and second nodes conductively connectable to said tail node along respective first and second paths; and control circuitry configured during the capture operation to control such connections between the tail node and the first and second nodes based on the first and second input signals such that said charge packet is divided between said first and second paths in dependence upon the difference between magnitudes of the first and second input signals.. . ... Socionext Inc

09/14/17 / #20170264308

Analogue-to-digital conversion

There is disclosed herein analogue-to-digital converter circuitry, comprising a set of sub-adc units each for carrying out analogue-to-digital conversion operations, the set comprising a given number of core sub-adc units for carrying out said given number of core conversion operations. Also provided is control circuitry operable, when a said sub-adc unit is determined to be a defective sub-adc unit, to cause the core conversion operations to be carried by the sub-adc units of the set sub-adc units other than the defective sub-adc unit.. ... Socionext Inc

09/14/17 / #20170264304

Timing-difference measurement

There is disclosed herein current-mode circuitry for measuring a timing difference between first and second signals, the circuitry comprising: a tail node configured during a measurement operation to receive a current pulse in dependence upon the first signal; first and second nodes conductively connectable to said tail node along respective first and second paths; and steering circuitry configured during the measurement operation to control such connections between the tail node and the first and second nodes based on the second signal to steer the current pulse so that a first portion of the current pulse passes along the first path and a second portion of the current pulse passes along the second path in dependence upon the timing difference between said first and second signals; and a signal output unit configured to output a measurement-result signal indicating a measure of said timing difference based upon one or both of the first and second portions.. . ... Socionext Inc

09/14/17 / #20170264259

Integrated circuitry

There is disclosed herein integrated circuitry,comprising a signal path connected to a connection pad, for connection to external circuitry; and a termination circuit connected between the signal path and a voltage reference, wherein the termination circuit comprises a resistor and an inductor. The resistor and the inductor are connected together so as to compensate for parasitic capacitance associated with the connection pad. ... Socionext Inc

09/14/17 / #20170264241

Clock generation circuitry

There is disclosed herein clock generation circuitry, in particular rotary travelling wave oscillator circuitry. Such circuitry comprises a pair of signal lines connected together to form a dosed loop and arranged such that they define at least one transition section where both said lines in a first portion of the pair cross from one lateral side of both said lines in a second portion of the pair to the other lateral side of both said lines in the second portion of the pair.. ... Socionext Inc

09/14/17 / #20170264240

Integrated circuitry

There is disclosed herein integrated circuitry comprising a clock path for carrying a clock signal from a clock source to a circuit block, the circuit block being operable based on the clock signal. Clock buffer circuitry is provided along the clock path for buffering the clock signal. ... Socionext Inc

08/31/17 / #20170250197

Layout structure for semiconductor integrated circuit

In a circuit block, a plurality of standard cells are arranged to form a circuit of silicon-on-insulator (soi) transistors. Also arranged in the circuit block is a capacitor cell including a capacitor arranged between a power supply line for supplying vdd and a power supply line for supplying vss. ... Socionext Inc

08/31/17 / #20170249979

Method and apparatus for timing adjustment

A strobe signal from a memory is delayed through delay circuits of a strobe delay selection section, thus obtaining a plurality of delayed strobe signals. A strobe latch section produces check data in synchronism with each of the delayed strobe signals, and a system latch section latches, with a system clock, check data latched by the strobe latch section. ... Socionext Inc

08/24/17 / #20170243888

Layout structure for semiconductor integrated circuit

In a circuit block, a plurality of cell rows, each being comprised of a plurality of standard cells arranged in a first direction, are arranged in a second direction perpendicular to the first direction, thereby forming a circuit of soi transistors. The circuit block includes a plurality of antenna cells, each including an antenna diode provided between a power supply line and a substrate or a well. ... Socionext Inc

08/24/17 / #20170243788

Layout structure for semiconductor integrated circuit

Disclosed herein is a technique for providing a layout structure for a semiconductor integrated circuit with soi transistors with an antenna error that could occur in a buried insulator under a source or drain taken into account. A standard cell, which is at least one of a plurality of standard cells that form the semiconductor integrated circuit, includes a signal interconnect serving as an output node to output a signal to outside of the standard cell, and an antenna diode formed between the signal interconnect and a substrate or a. ... Socionext Inc

08/03/17 / #20170221874

Semiconductor integrated circuit device

Disclosed herein is a configuration for ensuring esd protection capability for a core power supply of a semiconductor integrated circuit device, without causing an increase in the circuit area. A first pad row in a core region includes a first pad for core power supply. ... Socionext Inc

08/03/17 / #20170221825

Semiconductor integrated circuit device

Disclosed herein is a configuration for ensuring sufficient power supply ability and esd protection capability for i/o cells in a semiconductor integrated circuit device, without increasing its circuit area. In two i/o cell rows, a pair of i/o cells for supplying a power supply potential or ground potential are connected together via a common power supply interconnect. ... Socionext Inc

07/27/17 / #20170213819

Semiconductor integrated circuit device

Diffusion regions having the same conductivity type are arranged on a side of a second wiring and a side of a third wiring, respectively under a first wiring connected to a signal terminal. Diffusion regions are separated in a whole part or one part of a range in a y direction. ... Socionext Inc

07/06/17 / #20170194329

Semiconductor device

A cell includes a plurality of fin transistors formed in a semiconductor substrate. In the cell, a fin serving as a source and drain of each of the plurality of fin transistors is arranged in plurality at a first pitch in a first direction. ... Socionext Inc

07/06/17 / #20170192447

Bias generator circuit, voltage generator circuit, communications device, and radar device

Disclosed herein is a bias generator circuit for generating a desired bias voltage or bias current using a simple configuration. The bias generator circuit includes a voltage generator circuit, a comparator, and a clock gating circuit. ... Socionext Inc

06/15/17 / #20170168140

Fmcw radar

Disclosed herein is a frequency modulated continuous wave (fmcw) radar. The fmcw radar includes: a transmission signal generator that generates a frequency-modulated transmission signal; a transmission signal sender that sends the transmission signal; a receiver that receives a reflected wave of the transmission signal; an adjuster that adjusts the amplitude and phase of a cancel signal, which cancels a leakage signal component in a received signal, in accordance with a variation in the frequency of the transmission signal; and a superimposer that superimposes the cancel signal over the received signal to cancel the leakage signal component.. ... Socionext Inc

05/18/17 / #20170140734

Image correction device and video content reproduction device

An image correction device generates a corrected image for a viewer with low vision, by adding excessive emphasis which reduces image quality as perceived by a viewer having normal eyesight, to at least one of luminance gradation, luminance contour, and color tone of a pre-correction image. The image correction device includes: a controller which specifies, in a low vision mode which is an image correction mode for the viewer with low vision, a parameter that represents an amount of correction greater than an upper limit of an amount of correction which does not reduce the image quality as perceived by the viewer having normal eyesight when the pre-correction image is corrected; and an image processor which generates the corrected image by correcting the at least one of the luminance gradation, the luminance contour, and the color tone of the pre-correction image with the amount of correction represented by the parameter.. ... Socionext Inc

05/11/17 / #20170134867

Signal processing device and signal processing method

A signal processing device, comprising a high band attenuation filter which attenuates a signal component in a bandwidth of frequency higher than at least a predetermined frequency in an audio signal that is input, and a hearing aid processor which performs hearing aid processing on a signal output from the high band attenuation filter, wherein the predetermined frequency is determined according to the upper limit of a target bandwidth of frequency for hearing aid.. . ... Socionext Inc

05/11/17 / #20170134010

Electric power supply device and semiconductor device

A voltage adjustment circuit includes switches connected in parallel between a circuit unit and an electric power supply line to which a first electric power supply voltage is applied, and changes the number of switches turned off, based on a comparison result between a target value and a second electric power supply voltage supplied to the circuit unit, to adjust the second electric power supply voltage. A control circuit decides an interval for increasing the number of switches turned off when the circuit unit changes to standby state, based on a leak current value of the circuit unit in standby state, a time in which the second electric power supply voltage changes from a first to a second value, the first and second values, and an electric potential difference by which the second electric power supply voltage changes when one switch switches between on and off.. ... Socionext Inc

05/04/17 / #20170127011

Semiconductor integrated circuit, display device provided with same, and control method

Disclosed herein is a semiconductor integrated circuit which controls the quality of an image and includes a viewer detector, a region specifier, and a controller. The viewer detector detects the number of viewer(s) watching the image and a gaze region being watched by the viewer within the image. ... Socionext Inc

04/27/17 / #20170118317

Interface device and receiver including the same

An interface device disclosed herein transmits a data signal in sync with a clock signal, and includes: a reception unit performing demodulation processing and error correction processing on an input carrier wave and outputting signals resulting from these types of processing; a transport stream (ts) packet acquisition unit acquiring a ts packet included in the outputs of the reception unit; a variable-length packet acquisition unit acquiring a variable-length packet included in the outputs of the reception unit; and a first selector selecting either the ts packet or the variable-length packet and outputting the selected packet as the data signal.. . ... Socionext Inc

04/27/17 / #20170117412

Semiconductor device and fabrication method thereof

A semiconductor device includes a gate electrode formed on a silicon substrate via a gate insulation film in correspondence to a channel region, source and drain regions of a p-type diffusion region formed in the silicon substrate at respective outer sides of sidewall insulation films of the gate electrode, and a pair of sige mixed crystal regions formed in the silicon substrate at respective outer sides of the sidewall insulation films in epitaxial relationship to the silicon substrate, the sige mixed crystal regions being defined by respective sidewall surfaces facing with each other, wherein, in each of the sige mixed crystal regions, the sidewall surface is defined by a plurality of facets forming respective, mutually different angles with respect to a principal surface of the silicon substrate.. . ... Socionext Inc

04/27/17 / #20170117268

Semiconductor integrated circuit device

In a semiconductor integrated circuit device, a plurality of electrode pads for external connection are arranged in a zigzag pattern. Some electrode pads of the electrode pads of the plurality of i/o cells which are closer to a side of the semiconductor chip, each have an end portion closer to the side of the semiconductor chip, the end portion being set at the same position as that of an end portion of the corresponding i/o cell. ... Socionext Inc

04/27/17 / #20170117026

Method and apparatus for timing adjustment

A strobe signal from a memory is delayed through delay circuits of a strobe delay selection section, thus obtaining a plurality of delayed strobe signals. A strobe latch section produces check data in synchronism with each of the delayed strobe signals, and a system latch section latches, with a system clock, check data latched by the strobe latch section. ... Socionext Inc

03/02/17 / #20170060462

Power supply voltage control circuit device and power supply voltage control method

A power supply voltage control circuit device includes a power supply control circuit, a memory, and an arithmetic processing circuit. The power supply control circuit is configured to control a power supply voltage to be applied to a target circuit, and the memory is configured to store a first processing result when the target circuit is operated by setting the power supply voltage to a first voltage and a second processing result when the target circuit is operated by setting the power supply voltage to a second voltage different from the first voltage. ... Socionext Inc

02/23/17 / #20170053124

Processor and processor system

A processor includes a cpu core and an encryption processor which includes an address registration region, wherein, after power is supplied, a startup program which is stored into a memory after encryption and executed at startup registers an address range of the memory in which encrypted concealment data is stored into the address registration region, and wherein the encryption processor decrypts the startup program and the concealment data and transfers to the cpu core when an execution address of the cpu core is within the address range registered in the address registration region, and transfers the startup program and the concealment data to the cpu core without decryption when the execution address of the cpu core is not within the address range registered in the address registration region.. . ... Socionext Inc

02/16/17 / #20170047266

Semiconductor device, manufacturing method thereof, and electronic apparatus

A semiconductor device includes a substrate and a semiconductor element mounted on the top surface of the substrate. On the top surface of the substrate, one or more pads are disposed outside the mounted semiconductor element when seen in a plan view. ... Socionext Inc

02/16/17 / #20170046539

Secure processor and a program for a secure processor

The instruction code including an instruction code stored in the area where the encrypted instruction code is stored in a non-rewritable format is authenticated using a specific key which is specific to the core where the instruction code is executed or an authenticated key by a specific key to perform an encryption processing for the input and output data between the core and the outside.. . ... Socionext Inc

02/16/17 / #20170046538

Secure processor and a program for a secure processor

The instruction code including an instruction code stored in the area where the encrypted instruction code is stored in a non-rewritable format is authenticated using a specific key which is specific to the core where the instruction code is executed or an authenticated key by a specific key to perform an encryption processing for the input and output data between the core and the outside.. . ... Socionext Inc

02/09/17 / #20170041167

Channel equalization and tracking apparatus and method and receiver

A channel equalization and tracking apparatus and method and a receiver. The apparatus includes: a fourier transforming unit configured to transform a received time-domain signal into a frequency-domain signal; a compensating and equalizing unit configured to perform phase compensation and frequency-domain equalization on the signal outputted by the fourier transforming unit by using one time of multiplication according to time delay information and an equalizer coefficient; a deciding unit configured to decide the equalized signal; and a channel tracking unit configured to track a channel according to the signal outputted by the fourier transforming unit and an error signal obtained by the deciding unit. ... Socionext Inc

02/09/17 / #20170041164

Adaptive equalizer, adaptive equalization method and receiver

An adaptive equalizer, an adaptive equalization method and receiver are disclosed where the adaptive equalizer is used for performing adaptive equalization processing on a frequency-domain signal, a channel used by the frequency-domain signal containing multiple subcarriers, the adaptive equalizer comprises: an equalizer coefficient generating unit configured to, for each subcarrier, generate an equalizer coefficient to which the subcarrier corresponds according to channel information and a step length of the subcarrier; where different subcarriers correspond to different step lengths and an equalization processing unit configured to, for each subcarrier, perform equalization processing on a signal in the subcarrier by using the equalizer coefficient.. . ... Socionext Inc

01/19/17 / #20170019074

Low noise amplifier

A low noise amplifier includes: first and seventh transistors configured to respectively receive first and second input signals; second, third, and fifth transistors connected to the first transistor; eighth, ninth, and eleventh transistors connected to the seventh transistor; a third resistive element; fourth and tenth transistors respectively connected to the third and ninth transistors; sixth and twelfth transistors respectively connected to second and first output terminals; and first and second resistive elements.. . ... Socionext Inc

01/12/17 / #20170013270

Image decoding device, image decoding method, and integrated circuit

A motion compensator includes a divider, a frame memory transfer controller, and a motion compensation processor. Based on information about a coding unit cu and prediction unit pu provided by a decoder, the divider determines whether or not to divide the pu. ... Socionext Inc

01/12/17 / #20170012612

Level converter circuit

A level conversion circuit includes: first p-ch and n-ch transistors and second p-ch and n-ch transistors respectively connected in series between first and second power sources; third and fourth p-ch transistors respectively connected between the gates of the second and first p-ch transistors and the drain of the first and second p-ch transistors; and fifth and sixth p-ch transistors respectively connected between the gates of the second and first p-ch transistors and a third power source, wherein differential input signals are applied to the gates of the first and second n-ch transistors, a bias voltage is applied to the gates of the third and fourth p-ch transistors, the gate of the fifth and sixth p-ch transistors are respectively connected to connection nodes of the first p-ch and n-ch transistors the second p-ch and n-ch transistors.. . ... Socionext Inc

01/12/17 / #20170012006

Semiconductor integrated circuit

A high-resistance region is formed right under a seal ring by irradiating a semiconductor substrate with hydrogen ions or helium ions. The high-resistance region has a greater thickness than an isolation insulating layer formed as a shallow trench isolation (sti) region on the surface of the semiconductor substrate. ... Socionext Inc

01/12/17 / #20170012004

Semiconductor device and method of producing semiconductor device

A semiconductor device provided on a semiconductor substrate includes an element region including an element, a moisture-resistant frame surrounding the element region, an insulating layer provided between the moisture-resistant frame and an outer peripheral edge of the semiconductor device and on the semiconductor substrate, a first metal line extending along the outer peripheral edge and provided in the insulating layer, and a groove provided in the insulating layer.. . ... Socionext Inc








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