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Soitec patents


Recent patent applications related to Soitec. Soitec is listed as an Agent/Assignee. Note: Soitec may have other listings under different names/spellings. We're not affiliated with Soitec, we're just tracking patents.

ARCHIVE: New 2018 2017 2016 2015 2014 2013 2012 2011 2010 2009 | Company Directory "S" | Soitec-related inventors


Method of fabrication of a semiconductor element comprising a highly resistive substrate

A method of fabrication of a semiconductor element includes a step of rapid heat treatment in which a substrate comprising a base having a resistivity greater than 1000 ohm·cm is exposed to a peak temperature sufficient to deteriorate the resistivity of the base. The step of rapid heat treatment is followed by a curing heat treatment in which the substrate is exposed to a curing temperature between 800° c. ... Soitec

Thermal treatment system with collector device

A thermal treatment system includes a chamber capable of receiving a plurality of substrates, a gas intake path in a distal portion of the chamber located opposite an area for entry of substrates into the chamber, and an outlet path for the gas and/or volatile species generated during the thermal treatment. The outlet path is located in a proximal portion of the chamber located near the area for entry of the substrates into the chamber. ... Soitec

Method, device and system for measuring an electrical characteristic of a substrate

The disclosure relates to a device for measuring an electrical characteristic of a substrate comprising a support made of a dielectric material having a bearing surface, the support comprising an electrical test structure having a contact surface flush with the bearing surface of the support, the bearing surface of the support and the contact surface of the electrical test structure being suitable for coming into close contact with a substrate. The measurement device also comprises at least one connection bump contact formed on another surface of the support and electrically linked to the electrical test structure. ... Soitec

Methods of forming semiconductor structures

The present disclosure relates to a process for the manufacture of a high resistivity semiconductor substrate, comprising the following stages: providing a first substrate with an in-depth weakened layer; providing a second substrate with a layer of an oxide at the surface; attaching the first substrate to the second substrate so as to form a compound substrate comprising a layer of buried oxide; and cleaving the compound substrate at the level of the weakened layer. The process additionally comprises at least one stage of stabilization, in particular, a stabilization heat treatment, of the second substrate with the layer of oxide before the stage of cleaving at the level of the weakened layer.. ... Soitec

Structure for radiofrequency applications

A structure for radiofrequency applications includes: a semiconducting supporting substrate, and a trapping layer arranged on the supporting substrate. The trapping layer includes a higher defect density than a predetermined defect density. ... Soitec

Structure for device with integrated microelectromechanical systems

A method for manufacturing a structure comprises a) providing a donor substrate comprising front and rear faces; b) providing a support substrate; c) forming an intermediate layer on the front face of the donor substrate or on the support substrate; d) assembling the donor and support substrates with the intermediate layer therebetween; e) thinning the rear face of the donor substrate to form a useful layer of a useful thickness having a first face disposed on the intermediate layer and a second free face; and wherein the donor substrate comprises a buried stop layer and a fine active layer having a first thickness less than the useful thickness, between the front face of the donor substrate and the stop layer; and after step e), removing, in first regions of the structure, a thick active layer delimited by the second free face of the useful layer and the stop layer.. . ... Soitec

Structure for radio-frequency applications

A structure for radiofrequency applications includes: a support substrate of high-resistivity silicon comprising a lower part and an upper part having undergone a p-type doping to a depth d; mesoporous trapping layer of silicon formed in the doped upper part of the support substrate. The depth d is less than 1 micron and the trapping layer has a porosity rate of between 20% and 60%.. ... Soitec

Methods of fabricating semiconductor structures including cavities filled with a sacrifical material

Methods of forming semiconductor structures comprising one or more cavities (106), which may be used in the formation of microelectromechanical system (mems) transducers, involve forming one or more cavities in a first substrate (100), providing a sacrificial material (110) within the one or more cavities, bonding a second substrate (120) over the a surface of the first substrate, forming one or more apertures (140) through a portion of the first substrate to the sacrificial material, and removing the sacrificial material from within the one or more cavities. Structures and devices are fabricated using such methods.. ... Soitec

Method for fabricating semiconductor structures including a high resistivty layer, and related semiconductor structures

Methods of forming a semiconductor structure include forming a device layer on an initial substrate, attaching a first surface of the device layer to a temporary substrate and forming a high resistivity layer on a second surface of the device layer by removing a portion of the initial substrate. Methods further include attaching a final substrate to the high resistivity layer and removing the temporary substrate. ... Soitec

Process for smoothing the surface of a structure

A process for smoothing a silicon-on-insulator structure comprising the exposure of a surface of the structure to an inert or reducing gas flow and to a high temperature during a heat treatment includes performing a first heat treatment step at a first temperature and under a first gas flow defined by a first flow rate, and performing a second heat treatment step at a second temperature lower than the first temperature and under a second gas flow defined by a second flow rate lower than the first flow rate.. . ... Soitec

Method for detecting defects and associated device

A method for determining the size of a void-type defect in a top side of a structure comprising a top layer placed on a substrate, the defect being located in the top layer, includes introducing the structure into a reflected darkfield microscopy device in order to generate, from a light ray scattered by the top side, a defect-related first signal and a roughness-related second signal. The intensity of the roughness-related second signal is captured with a plurality of pixels. ... Soitec

Method for manufacturing substrates

A manufacturing method including supplying a first substrate including a first face designated front face, the front face being made of a iii-v type semiconductor, supplying a second substrate, forming a radical oxide layer on the front face of the first substrate by executing a radical oxidation, assembling, by a step of direct bonding, the first substrate and the second substrate so as to form an assembly including the radical oxide layer intercalated between the first and second substrates, executing a heat treatment intended to reinforce the assembly interface, and making disappear, at least partially, the radical oxide layer.. . ... Soitec

Method for dissolving a silicon dioxide layer

This disclosure relates to a method for dissolving a silicon dioxide layer in a structure, including, from the back surface thereof to the front surface thereof, a supporting substrate, the silicon dioxide layer and a semiconductor layer, the dissolution method being implemented in a furnace in which structures are supported on a support, the dissolution method resulting in the diffusion of oxygen atoms included in the silicon dioxide layer through the semiconductor layer and generating volatile products, and the furnace including traps suitable for reacting with the volatile products, so as to reduce the concentration gradient of the volatile products parallel to the front surface of at least one structure.. . ... Soitec

Method of manufacturing structures of leds or solar cells

The disclosure relates to a manufacturing method comprising the formation of elemental led or photovoltaic structures on a first substrate, each comprising at least one p-type layer, an active zone and an n-type layer, formation of a first planar metal layer on the elemental structures, provision of a transfer substrate comprising a second planar metal layer, assembly of the elemental structures with the transfer substrate by bonding of the first and second metal layers by molecular adhesion at room temperature, and removal of the first substrate.. . ... Soitec








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