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Stats Chippac Pte Ltd patents


Recent patent applications related to Stats Chippac Pte Ltd. Stats Chippac Pte Ltd is listed as an Agent/Assignee. Note: Stats Chippac Pte Ltd may have other listings under different names/spellings. We're not affiliated with Stats Chippac Pte Ltd, we're just tracking patents.

ARCHIVE: New 2018 2017 2016 2015 2014 2013 2012 2011 2010 2009 | Company Directory "S" | Stats Chippac Pte Ltd-related inventors


Semiconductor device and forming a vertical interconnect structure for 3-d fo-wlcsp

A semiconductor device has an encapsulant deposited over a first surface of the semiconductor die and around the semiconductor die. A first insulating layer is formed over a second surface of the semiconductor die opposite the first surface. A conductive layer is formed over the first insulating layer. An interconnect... Stats Chippac Pte Ltd

Semiconductor device and using partial wafer singulation for improved wafer level embedded system in package

A semiconductor device includes a semiconductor wafer including a plurality of first semiconductor die. An opening is formed partially through the semiconductor wafer. A plurality of second semiconductor die is disposed over a first surface of the semiconductor wafer. An encapsulant is disposed over the semiconductor wafer and into the... Stats Chippac Pte Ltd

Antenna in embedded wafer-level ball-grid array package

A semiconductor device has a semiconductor die and an encapsulant deposited over the semiconductor die. A first conductive layer is formed with an antenna over a first surface of the encapsulant. A second conductive layer is formed with a ground plane over a second surface of the encapsulant with the... Stats Chippac Pte Ltd

Semiconductor device and forming pop semiconductor device with rdl over top package

A PoP semiconductor device has a top semiconductor package disposed over a bottom semiconductor package. The top semiconductor package has a substrate and a first semiconductor die disposed over the substrate. First and second encapsulants are deposited over the first semiconductor die and substrate. A first build-up interconnect structure is... Stats Chippac Pte Ltd

Semiconductor device and forming build-up interconnect structures over a temporary substrate

A semiconductor device has a first build-up interconnect structure formed over a substrate. The first build-up interconnect structure includes an insulating layer and conductive layer formed over the insulating layer. A vertical interconnect structure and semiconductor die are disposed over the first build-up interconnect structure. The semiconductor die, first build-up... Stats Chippac Pte Ltd

Semiconductor device and forming conductive vias by direct via reveal with organic passivation

A semiconductor device has a semiconductor wafer and a conductive via formed partially through the semiconductor wafer. A portion of the semiconductor wafer and conductive via is removed by a chemical mechanical polishing process. The semiconductor wafer and conductive via are coplanar at first and second surfaces. A first insulating... Stats Chippac Pte Ltd

Semiconductor device and making embedded wafer level chip scale packages

A semiconductor device includes a carrier and a plurality of semiconductor die disposed over the carrier. An encapsulant is deposited over the semiconductor die. A composite layer is formed over the encapsulant to form a panel. The carrier is removed. A conductive layer is formed over the panel. An insulating... Stats Chippac Pte Ltd

Semiconductor device and forming electromagnetic (em) shielding for lc circuits

A semiconductor device has a first component. A modular interconnect structure is disposed adjacent to the first component. A first interconnect structure is formed over the first component and modular interconnect structure. A shielding layer is formed over the first component, modular interconnect structure, and first interconnect structure. The shielding... Stats Chippac Pte Ltd

Semiconductor device and forming ultra thin multi-die face-to-face wlcsp

A semiconductor device has a first semiconductor die stacked over a second semiconductor die which is mounted to a temporary carrier. A plurality of bumps is formed over an active surface of the first semiconductor die around a perimeter of the second semiconductor die. An encapsulant is deposited over the... Stats Chippac Pte Ltd

Semiconductor device and forming microelectromechanical systems (mems) package

A semiconductor device has a first semiconductor die and a modular interconnect structure adjacent to the first semiconductor die. An encapsulant is deposited over the first semiconductor die and modular interconnect structure as a reconstituted panel. An interconnect structure is formed over the first semiconductor die and modular interconnect structure.... Stats Chippac Pte Ltd

Semiconductor device and using a standardized carrier to form embedded wafer level chip scale packages

A semiconductor device includes a standardized carrier. A semiconductor wafer includes a plurality of semiconductor die and a base semiconductor material. The semiconductor wafer is singulated through a first portion of the base semiconductor material to separate the semiconductor die. The semiconductor die are disposed over the standardized carrier. A... Stats Chippac Pte Ltd

Semiconductor device and forming encapsulated wafer level chip scale package (ewlcsp)

A semiconductor device has a semiconductor die and an encapsulant around the semiconductor die. A fan-in interconnect structure is formed over the semiconductor die while leaving the encapsulant devoid of the interconnect structure. The fan-in interconnect structure includes an insulating layer and a conductive layer formed over the semiconductor die.... Stats Chippac Pte Ltd

Semiconductor device and forming low profile fan-out package with vertical interconnection units

A semiconductor device includes a semiconductor die. A first interconnect structure is disposed over a peripheral region of the semiconductor die. A semiconductor component is disposed over the semiconductor die. The semiconductor component includes a second interconnect structure. The semiconductor component is disposed over the semiconductor die to align the... Stats Chippac Pte Ltd

Semiconductor device and forming embedded wafer level chip scale packages

A semiconductor device includes a semiconductor die and an encapsulant deposited over and around the semiconductor die. A semiconductor wafer includes a plurality of semiconductor die and a base semiconductor material. A groove is formed in the base semiconductor material. The semiconductor wafer is singulated through the groove to separate... Stats Chippac Pte Ltd

Semiconductor device and forming mems package

A microelectromechanical system (MEMS) semiconductor device has a first and second semiconductor die. A first semiconductor die is embedded within an encapsulant together with a modular interconnect unit. Alternatively, the first semiconductor die is embedded within a substrate. A second semiconductor die, such as a MEMS die, is disposed over... Stats Chippac Pte Ltd

Semiconductor device and forming embedded conductive layer for power/ground planes in fo-ewlb

A semiconductor device has a first conductive layer and a semiconductor die disposed adjacent to the first conductive layer. An encapsulant is deposited over the first conductive layer and semiconductor die. An insulating layer is formed over the encapsulant, semiconductor die, and first conductive layer. A second conductive layer is... Stats Chippac Pte Ltd

Semiconductor device and forming 3d dual side die embedded build-up semiconductor package

A semiconductor device has a plurality of semiconductor die. A substrate is provided with bumps disposed over the substrate. A first prefabricated insulating film is disposed between the semiconductor die and substrate. An interconnect structure is formed over the semiconductor die and first prefabricated insulating film. The bumps include a... Stats Chippac Pte Ltd

Semiconductor device and forming interconnect substrate for fo-wlcsp

A semiconductor device has a first encapsulant deposited over a first carrier. A plurality of conductive vias is formed through the first encapsulant to provide an interconnect substrate. A first semiconductor die is mounted over a second carrier. The interconnect substrate is mounted over the second carrier adjacent to the... Stats Chippac Pte Ltd

Semiconductor device and making wafer level chip scale package

A semiconductor device has a semiconductor wafer and a first conductive layer formed over the semiconductor wafer as contact pads. A first insulating layer formed over the first conductive layer. A second conductive layer including an interconnect site is formed over the first conductive layer and first insulating layer. The... Stats Chippac Pte Ltd

Semiconductor device and controlling warpage in reconstituted wafer

A semiconductor device has a substrate with a plurality of active semiconductor die disposed over a first portion of the substrate and a plurality of non-functional semiconductor die disposed over a second portion of the substrate while leaving a predetermined area of the substrate devoid of the active semiconductor die... Stats Chippac Pte Ltd

Semiconductor device and forming ultra high density embedded semiconductor die package

A semiconductor device has a plurality of semiconductor die. A first prefabricated insulating film is disposed over the semiconductor die. A conductive layer is formed over the first prefabricated insulating film. An interconnect structure is formed over the semiconductor die and first prefabricated insulating film. The first prefabricated insulating film... Stats Chippac Pte Ltd

Semiconductor device and forming inductor over insulating material filled trench in substrate

A semiconductor device has a trench formed in a substrate. The trench has tapered sidewalls and depth of 10-120 micrometers. A first insulating layer is conformally applied over the substrate and into the trench. An insulating material, such as polymer, is deposited over the first insulating layer in the trench.... Stats Chippac Pte Ltd

Integrated circuit packaging system with embedded pad on layered substrate and manufacture thereof

An integrated circuit packaging system and method of manufacture thereof includes: a dielectric core having an embedded pad; a top solder resist layer on the dielectric core, a pad top surface of the embedded pad below the top solder resist layer; a device interconnect attached to the embedded pad; and... Stats Chippac Pte Ltd

Semiconductor device and forming openings through insulating layer over encapsulant for enhanced adhesion of interconnect structure

A semiconductor device has a semiconductor die mounted to a carrier. An encapsulant is deposited over the semiconductor die and carrier. The carrier is removed. A first insulating layer is formed over a portion of the encapsulant within an interconnect site outside a footprint of the semiconductor die. An opening... Stats Chippac Pte Ltd

Semiconductor device and using a standardized carrier in semiconductor packaging

A semiconductor device has a carrier with a fixed size. A plurality of first semiconductor die is singulated from a first semiconductor wafer. The first semiconductor die are disposed over the carrier. The number of first semiconductor die on the carrier is independent from the size and number of first... Stats Chippac Pte Ltd

Semiconductor device and controlling warpage in reconstituted wafer

A semiconductor device has a substrate with a stiffening layer disposed over the substrate. The substrate has a circular shape or rectangular shape. A plurality of semiconductor die is disposed over a portion of the substrate while leaving an open area of the substrate devoid of the semiconductor die. The... Stats Chippac Pte Ltd

Semiconductor device and forming semiconductor die with active region responsive to external stimulus

A semiconductor device has a first semiconductor die including an active region formed on a surface of the first semiconductor die. The active region of the first semiconductor die can include a sensor. An encapsulant is deposited over the first semiconductor die. A conductive layer is formed over the encapsulant... Stats Chippac Pte Ltd

Semiconductor device and using substrate having base and conductive posts to form vertical interconnect structure in embedded die package

A semiconductor device has a substrate including a base and a plurality of conductive posts extending from the base. The substrate can be a wafer-shape, panel, or singulated form. The conductive posts can have a circular, rectangular, tapered, or narrowing intermediate shape. A semiconductor die is disposed through an opening... Stats Chippac Pte Ltd

Semiconductor device and forming sacrificial protective layer to protect semiconductor die edge during singulation

A semiconductor wafer contains a plurality of semiconductor die separated by a saw street. An insulating layer is formed over the semiconductor wafer. A protective layer is formed over the insulating layer including an edge of the semiconductor die along the saw street. The protective layer covers an entire surface... Stats Chippac Pte Ltd

Semiconductor device and singulating thin semiconductor wafer on carrier along modified region within non-active region formed by irradiating energy

A semiconductor device comprises a carrier including an adhesive disposed over the carrier. The semiconductor device further comprises a semiconductor wafer including a plurality of semiconductor die separated by a non-active region. A plurality of bumps is formed over the semiconductor die. The semiconductor wafer is mounted to the carrier... Stats Chippac Pte Ltd

Semiconductor device and forming repassivation layer for robust low cost fan-out semiconductor package

A semiconductor device comprises a semiconductor die including a conductive layer. A first insulating layer is formed over the semiconductor die and conductive layer. An encapsulant is disposed over the semiconductor die. A compliant island is formed over the first insulating layer. An interconnect structure is formed over the compliant... Stats Chippac Pte Ltd

Integrated circuit packaging system with single-layer support structure

Approaches, techniques, and mechanisms are disclosed for a method of manufacturing an integrated circuit package with a single-layer substrate. In an embodiment, the inventive integrated circuit package not only reduces manufacture cost but also improves reliability and miniaturization. According to an embodiment, a single-layer substrate is manufactured using non-photoimageable dielectric... Stats Chippac Pte Ltd

Semiconductor device and forming interconnect structure and mounting semiconductor die in recessed encapsulant

A semiconductor device has conductive pillars formed over a carrier. A first semiconductor die is mounted over the carrier between the conductive pillars. An encapsulant is deposited over the first semiconductor die and carrier and around the conductive pillars. A recess is formed in a first surface of the encapsulant... Stats Chippac Pte Ltd

Antenna in embedded wafer-level ball-grid array package

A semiconductor device has a semiconductor die and an encapsulant deposited over the semiconductor die. A first conductive layer is formed with an antenna over a first surface of the encapsulant. A second conductive layer is formed with a ground plane over a second surface of the encapsulant with the... Stats Chippac Pte Ltd

Semiconductor device and forming emi shielding layer with conductive material around semiconductor die

A semiconductor device has a plurality of first semiconductor die mounted over an interface layer formed over a temporary carrier. An encapsulant is deposited over the first die and carrier. A flat shielding layer is formed over the encapsulant. A channel is formed through the shielding layer and encapsulant down... Stats Chippac Pte Ltd

01/12/17 / #20170011936

Semiconductor device and depositing encapsulant along sides and surface edge of semiconductor die in embedded wlcsp

A semiconductor device has a semiconductor wafer including a plurality of semiconductor die. An insulating layer is formed over the semiconductor wafer. A portion of the insulating layer is removed by LDA to expose a portion of an active surface of the semiconductor die. A first conductive layer is formed... Stats Chippac Pte Ltd








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