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Stmicroelectronics International N v
Stmicroelectronics International N v Netherlands
Stmicroelectronics International N v_20131212

Stmicroelectronics International N v patents


Recent patent applications related to Stmicroelectronics International N v. Stmicroelectronics International N v is listed as an Agent/Assignee. Note: Stmicroelectronics International N v may have other listings under different names/spellings. We're not affiliated with Stmicroelectronics International N v, we're just tracking patents.

ARCHIVE: New 2018 2017 2016 2015 2014 2013 2012 2011 2010 2009 | Company Directory "S" | Stmicroelectronics International N v-related inventors


 new patent  Programmable clock divider

In accordance with an embodiment, a circuit includes an input clock terminal, an output clock terminal, a first input data terminal, and a set of input data terminals having a number of terminals. A divide-by-two block is coupled to the output clock terminal. A modular one-shot clock divider is coupled... Stmicroelectronics International N v

Temperature sensing circuit with temperature coefficient estimation and compensation using time variable substrate heating

A localized substrate heater is configured to apply variable substrate heating to an integrated bipolar transistor. The base-to-emitter voltage (Vbe) of that bipolar transistor a varying substrate temperature settings is sensed, with the sensed Vbe processed to determine temperature coefficients of the bipolar transistor. The bipolar transistor may, for example,... Stmicroelectronics International N v

Method and determining probabilistic context awareness of a mobile device user using a single sensor and/or multi-sensor data fusion

An electronic device described herein includes a sensing unit having at least one sensor to acquire sensing data. An associated computing device extracts sensor specific features from the sensing data, and generates a motion activity vector, a voice activity vector, and a spatial environment vector as a function of the... Stmicroelectronics International N v

Device with oled matrix of active pixels with cathode voltage regulation, and corresponding method

A device includes a matrix of active pixels, with each active pixel having an OLED diode having a cathode to receive a cathode voltage, and a control circuit coupled to an anode of the OLED diode. The device also includes at least one dummy pixel having a dummy OLED diode... Stmicroelectronics International N v

Clock selection circuit and test clock generation circuit for lbist and atpg test circuit

A test circuit receives LBIST and ATPG mode signals, and generates a first output as high when in ATPG or LBIST, and a second output as low when in ATPG or LBIST. A multiplexing circuit receives an ATPG clock and functional clock, and outputs one. A clock gate circuit includes... Stmicroelectronics International N v

Method for managing the operation of a low-complexity synchronous retention flip-flop circuit, and corresponding circuit

A synchronous retention flip-flop circuit includes a first circuit module powered by an interruptible power source and a second circuit module powered by a permanent power source. The first circuit module includes a first latch circuit and a second latch circuit which are configured to store at least one datum... Stmicroelectronics International N v

Method for managing the operation of a synchronous retention flip-flop circuit exhibiting an ultra-low leakage current, and corresponding circuit

The synchronous retention flip-flop circuit comprises a first circuit module suitable for being powered by an interruptible power source and a second circuit module suitable for being powered by a permanent power source. The first circuit module includes first and second latch stages, which are configured to store at least... Stmicroelectronics International N v

Common-mode feedback for differential amplifier

An embodiment circuit includes an operational amplifier having a first output terminal and a second output terminal. The circuit further includes a detector coupled between the first output terminal and the second output terminal of the operational amplifier. The detector is configured to detect a common-mode output voltage at the... Stmicroelectronics International N v

Battery dc impedance measurement

The state of charge of a rechargeable battery is determined by calculating the DC impedance of the battery. The impedance is calculated by: performing a two different constant current discharges of the battery at a first and second C-rates, respectively; measuring the voltage and current during the interval of each... Stmicroelectronics International N v

Low power general purpose input/output level shifting driver

Disclosed herein is an low power output stage coupled between a supply node and a ground node, configured to drive an output, and controlled by first, second, and third control nodes. A current sinking circuit controlled by an input signal and configured to sink current from the first and second... Stmicroelectronics International N v

Scalable protection voltage generation

According to an embodiment, a circuit includes a protection voltage generator coupled to a first voltage node, a second voltage node, and a ground voltage node, the protection voltage generator configured to generate a plurality of protection voltages at a first plurality of nodes based on the first voltage node... Stmicroelectronics International N v

Microfluidic system with single drive signal for multiple nozzles

The present disclosure is directed to a microfluidic die that includes a plurality of heaters above a substrate, a plurality of chambers and nozzles above the heaters, a plurality of first contacts coupled to the heaters, and a plurality of second contacts coupled to the heaters. The plurality of second... Stmicroelectronics International N v

Spread spectrum clock generator

A phase or frequency locked-loop circuit includes an oscillator configured to generate an output clock signal having a frequency set by an oscillator control signal. A modulator circuit receives a first signal and a second signal and is configured to generate a control signal having a value modulated in response... Stmicroelectronics International N v

Dynamic element matching of resistors in a sensor

A method and apparatus for dynamically matching a plurality of resistors to a sensor are disclosed. In the method and apparatus, a switching block of a plurality of switching blocks receives a plurality of selection signals. The switching block is coupled to a resistor array having a plurality of resistors... Stmicroelectronics International N v

Logic built-in self-test (lbist) with pipeline scan enable launch on shift (los) flip-flop circuit

A logic built-in self-test (LBIST) circuit implements a pipeline scan enable launch on shift (LOS) feature. A first scan chain flip-flop has a scan enable input configured to receive a first scan enable signal. A logic circuit has a first input coupled to a data output of the first scan... Stmicroelectronics International N v

Image sensor device with macropixel processing and related devices and methods

An image sensor device may include an array of image sensing pixels with adjacent image sensing pixels being arranged in macropixel, and a processor coupled to the array of image sensing pixels. The processor may be configured to receive pixel signals from the array of image sensing pixels, and arrange... Stmicroelectronics International N v

Carrier signal generation circuit and generating a carrier signal

In an embodiment, a carrier signal generation circuit can be used for a Radio-frequency identification (RFID) transponder device. A frequency divider circuit has a first input to receive a first frequency signal, a second input to receive a division ratio signal, and an output to provide a carrier signal as... Stmicroelectronics International N v

Automatic test-pattern generation for memory-shadow-logic testing

An embodiment of a method for automated test pattern generation (ATPG), a system for ATPG, and a memory configured for ATPG. For example, an embodiment of a memory includes a first test memory cell, a data-storage memory cell, and a test circuit configured to enable the test cell and to... Stmicroelectronics International N v

Fractional bandgap reference voltage generator

A reference voltage generator circuit includes a circuit that generates a complementary to absolute temperature (CTAT) voltage and a proportional to absolute temperature (PTAT) current. An output current circuit generates, from the PTAT current, a sink PTAT current sunk from a first node and a source PTAT current sourced to... Stmicroelectronics International N v

Method for detecting an adjacent active near-field communication device

According to an embodiment, a method can be performed by a first active near-field communication (NFC) device. The method includes assuming a field detection mode, generating an advertisement pulse, and checking whether a predefined condition is fulfilled. If the checking determines that the predefined condition is fulfilled, the method includes... Stmicroelectronics International N v

Stuck-at fault detection on the clock tree buffers of a clock source

A first clock signal and second clock signal are generated by first and second clock circuits, respectively. A multiplexer selects between the first clock signal and second clock signal to produce a scan clock signal. A non-scan flip flop clocks a data input through to a data output in response... Stmicroelectronics International N v

Integrated circuit capacitors for analog microcircuits

Dual gate FD-SOI transistors are used as MOSFET capacitors to replace passive well capacitors in analog microcircuits. Use of the dual gate FD-SOI devices helps to reduce unstable oscillations and improve circuit performance. A thick buried oxide layer within the substrate of an FD-SOI transistor forms a capacitive dielectric that... Stmicroelectronics International N v

Testing of power on reset (por) and unmaskable voltage monitors

A power management circuit includes both a power on reset (POR) circuit and a voltage monitoring circuit. Explicit testing of these circuits is accomplished by controlling voltages applied to the circuits and monitoring an output signal responsive to a logical combination of outputs from the POR circuit and voltage monitoring... Stmicroelectronics International N v

Data on clock lane of source synchronous links

A source synchronous data transmission system includes a data transmitting device and a data receiving device. A dedicated data line carries a data signal from the data transmission device to the data receiving device. A dedicated clock line carries a modulated clock signal from the data transmission device to the... Stmicroelectronics International N v

Scheme to measure individually rise and fall delays of non inverting logic cells

A test circuit measures both the rising edge delay and the falling edge delay associated with a logic cell. The test circuit includes a flip-flop type ring oscillator with two groups of logic cells connected in series in the oscillation path. A first multiplexor switches the ring oscillator between a... Stmicroelectronics International N v

Voltage regulators

A voltage regulator provides an output voltage, the voltage regulator configured to receive one of a plurality of different regulator reference voltages and a controller configured to provide a selection signal, the selection signal being used to control which of the regulator reference voltages the voltage regulator receives.... Stmicroelectronics International N v

Method and circuit of an actively transmitting tag

A circuit of an actively transmitting tag includes an antenna, a digitizer, a voltage-controlled oscillator (VCO), an output amplifier, a phase-displacement detector, and a regulator. The input of the digitizer connects to the antenna. The outputs of the digitizer and the output amplifier are connected to the input terminals of... Stmicroelectronics International N v

Method and enhancing read stability of a static random access memory circuit in low voltage operation

Read stability of a memory is enhanced in low voltage operation mode by selectively boosting a cell supply voltage for a row of memory cells. The boosted voltage results from a capacitive coupling to the word line in that row. The capacitive coupling is implemented by running the metal line... Stmicroelectronics International N v

Radio-frequency identification transponder and sending a radio-frequency identification message

Embodiments provide a method for sending a message from an RFID transponder to a reader during a transmission frame using active load modulation, the method comprising. An encoded bit signal has a first logic level during first time segments within the transmission frame and a second logic level during second... Stmicroelectronics International N v

Microfluidic system with single drive signal for multiple nozzles

The present disclosure is directed to a microfluidic die that includes a plurality of heaters above a substrate, a plurality of chambers and nozzles above the heaters, a plurality of first contacts coupled to the heaters, and a plurality of second contacts coupled to the heaters. The plurality of second... Stmicroelectronics International N v

System and adaptive pixel filtering

Various embodiments provide an optimized image filter. The optimized image and video obtains an input image and selects a target pixel for modification. Difference values are then determined between the selected target pixel and each reference pixel of a search area. Subsequently, a weighting function is used to determine weight... Stmicroelectronics International N v

Temperature compensated read assist circuit for a static random access memory (sram)

A memory circuit includes a wordline, memory cells connected to the wordline and a wordline driver circuit including a p-channel pull-up transistor. The memory circuit further includes a read assist circuit including an n-channel pull-down transistor having a source-drain path connected between the wordline and a ground node and an... Stmicroelectronics International N v

Polyphase decimation fir filters and methods

A polyphase decimation FIR filter apparatus including a modulo integrator circuit configured to integrate input samples and to provide integrated input samples; and a polyphase FIR filter circuit configured to process the integrated input samples, the polyphase FIR filter circuit including a plurality of multiplier accumulator circuits, each configured to... Stmicroelectronics International N v

Continuous time delta-sigma modulator with a time interleaved quantization function

A wide band continuous time delta-sigma modulator implements a time interleaved quantization processing operation. The modulator may provide for an inherent finite impulse response filtering in the feedback loop. Additionally, further finite impulse response filtering in each time interleaved feedback path may be provided.... Stmicroelectronics International N v

Data receiving device including an envelope detector and related methods

A data receiving device may include an envelope detector that may include first and second inputs configured to receive a differential input signal, a first pair of detectors coupled to the first input and configured to generate first and second detector outputs, and a second pair of detectors coupled to... Stmicroelectronics International N v

08/31/17 / #20170249931

Noise removal system

A system for noise removal is coupled to a signal unit that provides a digital signal. The noise removal system includes a transformation module to transform the digital signal into an f-digital signal, a threshold filter to generate a noiseless signal from the f-digital signal based on a threshold profile,... Stmicroelectronics International N v

08/17/17 / #20170237170

Display arrangement and fabrication of a display arrangement

A display arrangement comprises a display, a conductive shield arranged at the display, a ferrite layer and a conducting line of an antenna. The ferrite layer is arranged between the conducting line and the conductive shield.... Stmicroelectronics International N v

07/06/17 / #20170190174

Support substrates for microfluidic die

The present disclosure provides supports for microfluidic die that allow for nozzles of the microfluidic die to be on a different plane or face a different direction from electrical contacts on the same support. This includes a rigid support having electrical contacts on a different side of the rigid support... Stmicroelectronics International N v

06/29/17 / #20170184400

Microelectromechanical gyroscope with rejection of disturbances and sensing an angular rate

A gyroscope includes a substrate, a first structure, a second structure and a third structure elastically coupled to the substrate and movable along a first axis. The first and second structure are arranged at opposite sides of the third structure with respect to the first axis A driving system is... Stmicroelectronics International N v

06/29/17 / #20170184681

Battery pack management

An electronic device includes a processor coupled to a battery and to determine whether the battery is being charged or discharged. If the battery being is being discharged, the processor operates to calculate an amount by which the battery has discharged since a preceding calculation of remaining capacity of the... Stmicroelectronics International N v

06/29/17 / #20170185863

System and adaptive pixel filtering

Various embodiments provide an optimized image filter. The optimized image and video obtains an input image and selects a target pixel for modification. Difference values are then determined between the selected target pixel and each reference pixel of a search area. Subsequently, a weighting function is used to determine weight... Stmicroelectronics International N v

06/22/17 / #20170176546

Method for calibration of magnetic sensor

A method includes acquiring magnetic data from a magnetometer, processing the magnetic data to perform robust calibration, and generating optimum calibration parameters using a calibration status indicator. To that end, the method includes generating a calibration status indicator as a function of time elapsed since a last calibration and variation... Stmicroelectronics International N v

06/22/17 / #20170178722

Sense amplifier for non-volatile memory devices and related methods

A memory device includes an array of phase-change memory (PCM) cells and complementary PCM cells. A column decoder is coupled to the array of PCM cells and complementary PCM cells, and a sense amplifier is coupled to the column decoder. The sense amplifier includes a current integrator configured to receive... Stmicroelectronics International N v

06/22/17 / #20170178727

Memory device including decoder for a program pulse and related methods

An integrated circuit includes an array of phase-change memory (PCM) cells, and bitlines coupled to the array of PCM cells. The integrated circuit also includes a first decoder circuit having a respective plurality of transistors having a first conductivity type being coupled together and to a given bitline from among... Stmicroelectronics International N v

06/08/17 / #20170163357

Method for phase calibration in a frontend circuit of a near field communication device

A method for a phase calibration in a frontend circuit of a near field communication (NFC) tag device is disclosed. An active load modulation signal is generated with a preconfigured value of a phase difference with respect to a reference signal of an NFC signal generator device. An amplitude of... Stmicroelectronics International N v

05/25/17 / #20170147416

Electronic device having fault monitoring for a memory and associated methods

An electronic device includes a memory having memory locations being subject to transient faults and permanent faults, and a fault detection circuit coupled to the memory. The fault detection circuit is configured to read the memory locations at a first time, and determine a first fault count and fault map... Stmicroelectronics International N v

05/18/17 / #20170140838

Scan compression architecture for highly compressed designs and associated methods

An integrated circuit (IC) having a scan compression architecture includes decompression logic coupled between test access input and a block of IC elements (e.g. flip-flops) coupled together to define a plurality of scan paths. The block of IC elements includes an initial data selector at an initial position of each... Stmicroelectronics International N v

05/11/17 / #20170131540

Controlling opening angle of a resonating mirror

A device described herein includes a movable MEMS mirror, with a driver configured to drive the movable MEMS mirror with a periodic signal such that the MEMS mirror oscillates at its resonance frequency. A feedback measuring circuit is configured to measure a signal flowing through the movable MEMS mirror. A... Stmicroelectronics International N v

05/04/17 / #20170123202

Electrostatically actuated oscillating structure with oscillation starting phase control, and manufacturing and driving method thereof

An electrostatically actuated oscillating structure includes a first stator subregion, a second stator subregion, a first rotor subregion and a second rotor subregion. Torsional elastic elements mounted to the first and second rotor subregions define an axis of rotation. A mobile element is coupled to the torsional elastic elements. The... Stmicroelectronics International N v

04/27/17 / #20170116509

Rfid transponder device and production of an rfid transponder device

An RFID transponder device has antenna terminals for coupling an antenna system to the device. A transmitter and a receiver are coupled to the antenna terminals. The device has at least one damping resistance connected to at least one of the antenna terminals. The at least one damping resistance is... Stmicroelectronics International N v

04/27/17 / #20170117799

Bus voltage correction circuit

A tunable voltage regulator has an output generating a variable voltage and an input that receives a trimming signal for controlling the output variable voltage. A current regulating circuit operates to regulate a current flowing through a load in response to the variable voltage. A control circuit senses the variable... Stmicroelectronics International N v

04/20/17 / #20170111567

Capturing a stable image using an ambient light sensor-based trigger

A method and apparatus for capturing stable images are disclosed. An ambient light sensor makes measurements of ambient light. A change in ambient light between two measurements is determined. If the change in ambient light measurements falls in a predefined range, then the change may be attributable to ambient light... Stmicroelectronics International N v

03/02/17 / #20170060166

System and a linear voltage regulator

According to an embodiment, a voltage regulator includes a linear voltage regulator (LVR) and a transient feedback circuit. The LVR a primary feedback loop, an input terminal configured to receive an input voltage, and an output terminal configured to output a regulated voltage. The transient feedback circuit is coupled to... Stmicroelectronics International N v

03/02/17 / #20170064223

Image sensor device with macropixel processing and related devices and methods

An image sensor device may include an array of image sensing pixels with adjacent image sensing pixels being arranged in macropixel, and a processor coupled to the array of image sensing pixels. The processor may be configured to receive pixel signals from the array of image sensing pixels, and arrange... Stmicroelectronics International N v

03/02/17 / #20170064321

System and decoding a video digital data stream using a table of range values and probable symbols

A video decoder includes an input configured to receive a plurality of bins of a video digital data stream to be decoded. A processor and a memory associated therewith are configured to perform parallel decoding of multiple bins of the plurality of bins in a given processing cycle based upon... Stmicroelectronics International N v

02/16/17 / #20170047909

Cascode voltage generating circuit and method

A cascode voltage generating circuit and method are provided. The circuit includes four switching elements. In a high voltage operation mode, the first and second switching elements, respectively, couple a first intermediate voltage input node to a first intermediate voltage output node, and a second intermediate voltage input node to... Stmicroelectronics International N v

02/09/17 / #20170040052

Method and circuit to enable wide supply voltage difference in multi-supply memory

A circuit can be used, for example, with a multi-supply memory device. The circuit includes a first conductor and a second conductor. A first transistor has a current path coupled between the first conductor and the second conductor. A second transistor also has a current path coupled between the first... Stmicroelectronics International N v

01/26/17 / #20170023647

On-the-fly test and debug logic for atpg failures of designs using on-chip clocking

A system disclosed herein includes an on-chip clock controller (OCC) circuit receiving a test pattern and responsively generating output clock pulses in response to the test pattern. An OCC test circuit is coupled to the OCC circuit and configured to detect data corresponding to output clock pulses generated by the... Stmicroelectronics International N v

01/05/17 / #20170005568

In situ overvoltage protection for active bridge applications

An overvoltage protection device protects a half bridge circuit that receives a supply voltage. The overvoltage protection device includes a high speed overvoltage detector that receives the supply voltage, detects whether an overvoltage situation is present, and outputs an overvoltage signal that disables the switches of the half bridge circuit... Stmicroelectronics International N v

01/05/17 / #20170005641

Ultra-low voltage temperature threshold detector

An integrated circuit die includes a plurality of transistors formed in a semiconductor substrate, the body regions of the transistors on a doped well region of the semiconductor substrate. A threshold detector selectively applies either a first voltage or second voltage to the doped well region based on whether the... Stmicroelectronics International N v

01/05/17 / #20170005655

System and a pre-driver circuit

A drive circuit includes an input, a driver, a first buffer, a second buffer, a first capacitance element, and a second capacitance element. The driver includes a first PMOS transistor and a first NMOS transistor coupled in series between a supply terminal and a reference terminal. The first buffer is... Stmicroelectronics International N v

01/05/17 / #20170005780

Data on clock lane of source synchronous links

A source synchronous data transmission system includes a data transmitting device and a data receiving device. A dedicated data line carries a data signal from the data transmission device to the data receiving device. A dedicated clock line carries a modulated clock signal from the data transmission device to the... Stmicroelectronics International N v

01/05/17 / #20170006331

Synchronized rendering of split multimedia content on network clients

A system is disclosed for rendering a split multimedia content stream associated with a single program among networked playback devices in sync with each other. Splitting multimedia content allows, for example, two viewers of the same movie to hear the audio track in different languages, or presentation of related program... Stmicroelectronics International N v








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