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Stmicroelectronics rousset Sas
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Stmicroelectronics rousset Sas patents

Recent patent applications related to Stmicroelectronics rousset Sas. Stmicroelectronics rousset Sas is listed as an Agent/Assignee. Note: Stmicroelectronics rousset Sas may have other listings under different names/spellings. We're not affiliated with Stmicroelectronics rousset Sas, we're just tracking patents.

ARCHIVE: New 2017 2016 2015 2014 2013 2012 2011 2010 2009 | Company Directory "S" | Stmicroelectronics rousset Sas-related inventors




Date Stmicroelectronics rousset Sas patents (updated weekly) - BOOKMARK this page
09/21/17 new patent  Method of forming mos and bipolar transistors
09/21/17 new patent  Method and device for transmitting information over a communication channel with variable impedance
09/14/17Method for writing into and reading a multi-levels eeprom and corresponding memory device
09/07/17Circuit and detecting a fault attack
08/31/17Electromagnetic jamming device and an integrated circuit
08/24/17Apparatus and eeprom select transistor breakdown voltage management
08/24/17Method and tool for generating a program code configured to perform control flow checking on another program code containing instructions for indirect branching
08/24/17Method for writing in an eeprom memory and corresponding device
08/24/17Method for detecting a thinning of the semiconductor substrate of an integrated circuit from its back face and corresponding integrated circuit
08/17/17Protection against rerouting a communication channel of a telecommunication device having an nfc circuit and a secure data circuit
08/10/17Method and device for monitoring the execution of a program code
08/03/17Electronic switching device with reduction of leakage currents and corresponding control method
07/20/17Single-wire bus communication protocol
07/20/17Control of applications in a mobile terminal
07/20/17Metallic device having mobile element in a cavity of the beol of an integrated circuit
07/06/17Method for smoothing a current consumed by an integrated circuit and corresponding device
07/06/17Method for fabrication of an integrated circuit rendering a reverse engineering of the integrated circuit more difficult and corresponding integrated circuit
06/22/17Twin memory cell interconnection structure
06/22/17Method for producing a high-voltage transistor with reduced footprint, and corresponding integrated circuit
06/22/17Method for estimating a time invariant transmission channel, and corresponding receiver
06/15/17Method and device of memory space management
06/08/17Method for managing a fail row of the memory plane of a non volatile memory and corresponding memory device
06/08/17Method for managing a fail bit line of a memory plane of a non volatile memory and corresponding memory device
06/01/17Reconfigurable sense amplifier for a memory device
05/25/17Stand-by mode of an electronic circuit
05/25/17Zener diode having an adjustable breakdown voltage
05/18/17Distribution of electronic circuit power supply potentials
05/18/17Protection of encrypted information during a processing by a processing unit
05/04/17Detection of fault injections in a random number generator
05/04/17Method for reading an eeprom and corresponding device
04/27/17Secure electronic chip
04/27/17Vertical bipolar transistor
04/13/17Method of operating an integrated switchable capacitive device
04/06/17Method for smoothing a current consumed by an integrated circuit and corresponding device
04/06/17Prevention of premature breakdown of interline porous dielectrics in an integrated circuit
03/30/17System for storing and reading of a message authentication code in an external memory and related method
03/30/17Non-volatile memory device having a memory size
03/30/17Method for managing the write cycle of an eeprom
03/30/17Backside fib probing detector in a forward and reverse body biasing architecture
03/23/17Non-volatile memory with a variable polarity line decoder
03/23/17Vertical memory cell with non-self-aligned floating drain-source implant
03/09/17Protection of a calculation against side-channel attacks
03/02/17Verification of the sensitivity of an electronic circuit executing a modular exponentiation calculation
03/02/17Protection of a modular exponentiation calculation
03/02/17Verification of the resistance of an electronic circuit to side-channel attacks
03/02/17Dpa protection of a rijndael algorithm
03/02/17Protection of a rijndael algorithm
02/23/17Method for managing communication between an electronic device, for example a contactless chip card, and a communication apparatus, for example a reader, and corresponding electronic device
02/23/17Nfc device with multiple secure elements
02/16/17Method and device for managing information exchange between a main element, for example a nfc controller, and a set of at least two auxiliary elements
02/09/17Method for writing in an eeprom memory and corresponding memory
02/09/17Method and system for managing a writing cycle of a data in a eeprom memory cell
01/12/17Method and circuit for protecting and verifying address data
01/12/17Dual non-volatile memory cell comprising an erase transistor
01/12/17Method for producing a high-voltage transistor with reduced footprint, and corresponding integrated circuit
01/12/17Method for estimating a cyclostationary transmission channel, and corresponding receiver
01/12/17Method for processing a signal coming from a transmission channel, in particular a signal conveyed via power-line communication, and notably the estimation of the channel, and corresponding receiver
01/12/17Method for estimating a time invariant transmission channel, and corresponding receiver
01/12/17Method for processing a signal coming from a transmission channel, in particular a signal conveyed via power-line communication, and notably the estimation of the channel, and corresponding receiver
01/05/17Detection of the authenticity of an electronic circuit or of a product containing such a circuit
12/29/16Resistive memory cell having a compact structure
12/29/16Phase-change memory cell having a compact structure
12/22/16Memory cell having a vertical selection gate formed in an fdsoi substrate
12/08/16Measurement of variations of a power supply voltage
12/08/16Method and device for generating an adjustable bandgap reference voltage
Patent Packs
12/08/16Method and device for transmitting information over a communication channel with variable impedance, in particular for a signal conveyed by power line communication
12/08/16Method for controlling the tuning to a communications frequency of an antenna connected to a component designed for contactless communication and corresponding system
11/24/16Integrated structure comprising neighboring transistors
11/24/16Method of communication over a two-wire bus
11/17/16Twin memory cell interconnection structure
11/17/16Method for controlling a change of operating state of an electromechanical component, for example a relay, and corresponding device
11/10/16Vertical transistor for resistive memory
11/10/16Anticollision mechanism for an nfc device
10/27/16Method of connecting one or more contactless components to a single antenna, and corresponding system
10/20/16Memory cell comprising non-self-aligned horizontal and vertical control gates
10/20/16Protection of registers against unilateral disturbances
10/20/16Method and device for generation of a representation of a digital image
10/20/16Method for managing information communication between a nfc controller and a secure element within an apparatus, and corresponding apparatus and nfc controller
10/13/16Electronic device for synchronizing tasks of an electronic appliance
10/06/16Metallic device having mobile element in a cavity of the beol of an integrated circuit
Patent Packs
09/29/16Method for processing an analog signal coming from a transmission channel, in particular a signal carried by power line communications
09/22/16Zener diode having an adjustable breakdown voltage
09/22/16Zener diode having an adjustable low breakdown voltage
08/25/16Non-volatile memory with a variable polarity line decoder
08/11/16Method for transmitting and/or receiving audio signals
08/04/16Method for authentication of an object by a device capable of mutual contactless communication, corresponding system and object
07/28/16Method for managing contactless communications and contactless charging within a system, and corresponding system
07/14/16Method of operating an integrated switchable capacitive device
06/30/16Protection of a non-volatile memory by change of instructions
06/23/16Memory cell having a vertical selection gate formed in an fdsoi substrate
06/23/16Antenna for an electronic device
06/23/16Secure processing content stored within a component, and corresponding component
06/16/16Electronic device comprising a wake up module distinct from a core domain
06/16/16Electronic device with a radiofrequency function
06/09/16Transmission and reception methods for a binary signal on a serial link
06/02/16Compact memory device of the eeprom type
06/02/16Data access in a mobile device with nfc
05/26/16Compact non-volatile memory device
05/19/16Eeprom architecture wherein each bit is formed by two serially connected cells
05/12/16Device for detecting a laser attack in an integrated circuit chip
05/05/16Process for controlling a processing unit improving the management of the tasks to be executed, and corresponding processing unit
05/05/16Method and device for fault detection
04/28/16Method for producing an integrated circuit pointed element, and corresponding integrated circuit
04/21/16Electrically controllable integrated switch
04/21/16Method of wireless communication using thermoelectric generators
04/14/16Powering of a charge with a floating node
04/14/16Configuration of nfc routers for p2p communication
04/07/16Method for wear leveling in a nonvolatile memory
03/31/16Method of making an integrated switchable capacitive device
03/31/16Integrated circuit comprising components, for example nmos transistors, having active regions with relaxed compressive stresses
Social Network Patent Pack
03/24/16Method for making a photolithography mask intended for the formation of contacts, mask and integrated circuit corresponding thereto
03/17/16Method of fabricating a vertical mos transistor
03/03/16Regulator with low dropout voltage and improved stability
03/03/16Page or word-erasable composite non-volatile memory
03/03/16Method for fabrication of an integrated circuit rendering a reverse engineering of the integrated circuit more difficult and corresponding integrated circuit
02/25/16Integrated thermoelectric generator
02/18/16Low-power sense amplifier
02/04/16Eeprom cell with charge loss
01/14/16Vertical transistor for resistive memory
01/07/16Random number generator
Patent Packs
01/07/16Voltage and power limiter for an electromagnetic transponder
01/07/16Protection of a security element coupled to an nfc circuit
12/31/15Protection of a non-volatile memory by change of instructions
12/24/15Controllable integrated capacitive device
12/10/15Protection of data stored in an integrated circuit
12/10/15Protection of data stored in a volatile memory
12/03/15Method of compensating for effects of mechanical stresses in a microcircuit
12/03/15Method for programming a non-volatile memory cell comprising a shared select transistor gate
12/03/15Dual non-volatile memory cell comprising an erase transistor
12/03/15Individually read-accessible twin memory cells
11/26/15Component, for example nmos transistor, with an active region under relaxed compressive stress, and associated decoupling capacitor
11/12/15Integrated circuit protected from short circuits caused by silicide
10/01/15Method for wear leveling in a nonvolatile memory
09/24/15Semiconductor structure and memory device including the structure
09/24/15Integrated structure comprising neighboring transistors
09/24/15Secure nfc routing
09/17/15Perforated electronic package and fabrication
09/10/15Component, for example nmos transistor, with active region with relaxed compression stresses, and fabrication method
09/03/15Integrated circuit comprising components, for example nmos transistors, having active regions with relaxed compressive stresses
08/27/15Eeprom programming
08/20/15Vertical memory cell with non-self-aligned floating drain-source implant
07/23/15Process for producing a metal device housed in a closed housing within an integrated circuit, and corresponding integrated circuit
07/09/15Protection of an integrated circuit against attacks
06/18/15Near-field communication system terminal
06/04/15Device for generating an adjustable bandgap reference voltage with large power supply rejection rate
06/04/15Method and device for controlling a sample and hold circuit
05/28/15Method and device for generating an adjustable bandgap reference voltage
05/28/15Electronic switching device with reduction of leakage currents and corresponding control method
05/21/15Power management in an electromagnetic transponder
05/14/15Circuit and detecting a fault attack
Patent Packs
05/14/15Combined flow and low-power state control using same lines between interfaces
05/07/15Method for controlling a capacitive touch pad
04/30/15Integrated mechanical device with vertical movement
04/30/15Hot-carrier injection programmable memory and programming such a memory
04/30/15Method for writing into and reading a multi-levels eeprom and corresponding memory device
04/30/15Memory cell comprising non-self-aligned horizontal and vertical control gates
04/23/15Secure memory which reduces degradation of data
04/09/15Method and device for managing the time transition of a cmos logic circuit as a function of temperature
03/26/15Imaging device with filtering of the infrared radiation
03/05/15Protection of a calculation against side-channel attacks
02/19/15Device for detecting a laser attack in an integrated circuit chip
02/12/15Electric charge flow circuit for a time measurement
02/12/15Communication on an i2c bus
02/05/15Method for producing a pattern in an integrated circuit and corresponding integrated circuit
01/29/15Tear-proof circuit
01/22/15Method of detecting an object with a proximity sensor
01/15/15Integrated circuit provided with a device for detecting its spatial orientation and/or a modification of this orientation
01/15/15Method for managing the operation of a memory device having a sram memory plane and a non volatile memory plane, and corresponding memory device
01/15/15Countermeasure for protecting data circulating in an electronic microcircuit
01/01/15Regulator for integrated circuit
Social Network Patent Pack
12/18/14Method for verifying the authenticity of a product
12/18/14Component, for example nmos transistor, with active region with relaxed compression stresses, and fabrication method
12/18/14Compact memory device including a sram memory plane and a non volatile memory plane, and operating methods
12/18/14Memory device including a sram memory plane and a non volatile memory plane, and operating methods
12/18/14Mechanism for verifying the authenticity of a product
12/11/14Electrically controllable integrated switch
12/11/14Method for block-erasing a page-erasable eeprom-type memory
12/04/14Method for writing in an eeprom-type memory including a memory cell refresh
11/27/14Writing into an eeprom on an i2c bus
10/30/14Integrated switchable capacitive device
10/02/14Method for making a photolithography mask intended for the formation of contacts, mask and integrated circuit corresponding thereto
09/18/14Anticollision mechanism for an nfc device
07/31/14Method for generation of electrical power within a three-dimensional integrated structure and corresponding link device
07/24/14Method for processing transmission errors, in particular noise, during a contactless communication between a card and a reader
07/10/14Method of fabricating a vertical mos transistor
07/10/14Vertical bipolar transistor
07/10/14Method for producing metal contacts within an integrated circuit, and corresponding integrated circuit
07/10/14Process for producing a metal device housed in a closed housing within an integrated circuit, and corresponding integrated circuit
07/10/14Integrated circuit power supply regulator
07/10/14Capacitive touch pad configured for proximity detection
Social Network Patent Pack
06/19/14Integrated mechanical device for electrical switching
05/22/14Method for producing an integrated circuit pointed element, and corresponding integrated circuit
05/15/14Device for monitoring the temperature of an element
05/08/14Manufacturing process of memory cells
05/01/14Protection of communication between an electromagnetic transponder and a terminal
04/24/14System for detecting a laser attack on an integrated circuit chip
04/24/14Assistance for positioning a transponder
04/24/14Protection of communication by an electromagnetic transponder
04/24/14Transponder positioning aid
04/10/14Non-volatile memory with vertical selection transistors
03/20/14Method for modulating the impedance of an antenna circuit
03/20/14Cryptographic countermeasure method by deriving a secret data
03/13/14Device for detecting the thinning down of the substrate of an integrated circuit chip
02/27/14Power supply of a load at a floating-potential
02/06/14Method for wear leveling in a nonvolatile memory
01/30/14Method of compensating for effects of mechanical stresses in a microcircuit
01/30/14Electric charge flow element
01/30/14Electronic device for protecting against a polarity reversal of a dc power supply voltage, and its application to motor vehicles
11/28/13Method for detecting electrical energy produced from a thermoelectric material contained in an integrated circuit
11/28/13Method for transmitting and receiving digital information in the form of frames with possibly encrypted parity bits, and corresponding transceiver device
11/28/13Encoding parameters for a wireless communication system
11/21/13Method for processing a non-volatile memory, in particular a memory of the eeprom type, for the storage then the extraction of information, and corresponding memory device
10/24/13Low pass filter with an increased delay
10/17/13Register protected against fault attacks
10/10/13Method for managing the dialogue between an item of equipment and at least one multi-application object
10/03/13Regulator with low dropout voltage and improved output stage
10/03/13Authentication of a terminal by an electromagnetic transponder
09/26/13Electrically activatable integrated mechanical anti-rollback device with one or more positions
09/26/13Nonvolatile memory comprising mini wells at a floating potential
09/19/13Regulator with low dropout voltage and improved stability
Social Network Patent Pack
09/19/13Integrated circuit provided with a protection against electrostatic discharges
09/05/13Method of generating electrical energy in an integrated circuit, corresponding integrated circuit and fabrication
09/05/13Nonvolatile memory cells with a vertical selection gate of variable depth
09/05/13Method of reading and writing nonvolatile memory cells
08/29/13Electrostatic discharge protection circuit
08/29/13Non-volatile memory for nfc router
08/15/13Operational amplifier with elimination of offset voltage
08/08/13Device for detecting a laser attack in an integrated circuit chip
08/08/13Presence detection device
08/01/13Device for protecting an integrated circuit against back side attacks
07/18/13Method for fabrication of an integrated circuit in a technology reduced with respect to a native technology, and corresponding integrated circuit
06/13/13Integrated mechanical device for electrical switching
06/13/13Integrated capacitive device having a thermally variable capacitive value
05/23/13Clock signal synchronization and disturbance detector
05/16/13Protection of a radio frequency transmit-receive terminal against electromagnetic disturbances
05/09/13Secure memory which reduces degradation of data
05/02/13Method of wireless communication between two devices, especially within one and the same integrated circuit, and corresponding system
04/25/13Method for managing communication between an electronic device, for example a contactless chip card, and a communication apparatus, for example a reader, and corresponding electronic device
04/18/13Mos transistor with no hump effect
04/18/13Device for supplying a high erase program voltage to an integrated circuit
04/18/13Integrated circuit comprising a non-dedicated terminal for receiving an erase program high voltage
04/11/13Electric charge flow circuit for a time measurement
03/28/13Protection an electronic device and corresponding device
03/28/13Optimization of the processing speed of an electromagnetic transponder
03/21/13Current detector allowing a large supply voltage range
03/14/13Method and device for characterizing or measuring a floating capacitance
03/14/13Eeprom memory protected against breakdown of control gate transistors
03/14/13Method of burn-in test of eeprom or flash memories
03/14/13Sense amplifier with fast bitline precharge means







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