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Stmicroelectronics rousset Sas patents


Recent patent applications related to Stmicroelectronics rousset Sas. Stmicroelectronics rousset Sas is listed as an Agent/Assignee. Note: Stmicroelectronics rousset Sas may have other listings under different names/spellings. We're not affiliated with Stmicroelectronics rousset Sas, we're just tracking patents.

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 new patent  Resistive memory cell having a compact structure

The disclosure relates to a memory cell formed in a wafer comprising a semiconductor substrate covered with a first insulating layer, the insulating layer being covered with an active layer made of a semiconductor, the memory cell comprising a selection transistor having a control gate and a first conduction terminal... Stmicroelectronics rousset Sas

Testing circuit of a longtime-constant circuit stage and corresponding testing method

A method can be used for testing a charge-retention circuit for measurement of a time interval having a storage capacitor coupled between a first biasing terminal and a floating node, and a discharge element coupled between the floating node and a reference terminal. The discharge element is configured to implement... Stmicroelectronics rousset Sas

Reading circuit with a shifting stage and corresponding reading method

A reading circuit for a charge-retention circuit stage is provided with a storage capacitor coupled between a first biasing terminal and a floating node, and a discharge element coupled between the floating node and a reference terminal. The reading circuit further has an operational amplifier having a first input terminal... Stmicroelectronics rousset Sas

Integrated circuit protection method, and corresponding integrated circuit

An integrated circuit includes a number of components disposed at a surface of a semiconductor body and an interconnect region connecting the components into a functional circuit. A metallic shield is also produced in the interconnect region. A configurable stage is configurable to operate in a receiving antenna configuration or... Stmicroelectronics rousset Sas

Low-dispersion component in an electronic chip

A method of manufacturing electronic chips containing low-dispersion components, including the steps of: mapping the average dispersion of said components according to their position in test semiconductor wafers; associating, with each component of each chip, auxiliary correction elements; activating by masking the connection of the correction elements to each component... Stmicroelectronics rousset Sas

Device for determining the movement of a rotary element, particularly for readings of water and/or gas meters

A rotary element is equipped with a pattern representing a reflected binary code on at least three bits. A detection circuit is configured to sense the pattern and deliver an incident signal encoded in reflected binary code on at least three bits. The incident signal is converted by a transcoding... Stmicroelectronics rousset Sas

Method for fabricating an array of diodes, in particular for a non-volatile memory, and corresponding device

The array of diodes comprises a matrix plane of diodes arranged according to columns in a first direction and according to rows in a second direction orthogonal to the first direction. The said diodes comprise a cathode region of a first type of conductivity and an anode region of a... Stmicroelectronics rousset Sas

Secured execution of an algorithm

An algorithm execution method includes carrying out a first execution of the algorithm by a processing unit, sending at least one first result, which is to be written into a memory, to a memory management circuit, and storing said first result into a first area of the volatile memory. The... Stmicroelectronics rousset Sas

Method for writing in an eeprom memory and corresponding device

A method can be used for writing in a memory location of the electrically-erasable and programmable memory type. The memory location includes a first memory cell with a first transistor having a first gate dielectric underlying a first floating gate and a second memory cell with a second transistor having... Stmicroelectronics rousset Sas

Method for forming a pn junction and associated semiconductor device

A method can be used to make a semiconductor device. A number of projecting regions are formed over a first semiconductor layer that has a first conductivity type. The first semiconductor layer is located on an insulating layer that overlies a semiconductor substrate. The projecting regions are spaced apart from... Stmicroelectronics rousset Sas

Non-volatile memory device having a memory size

A memory device includes an input/output interface, a bus of SPI type coupled to the input/output interface, and a plurality of individual non-volatile memory devices connected to the bus of SPI type. The chip select inputs of each individual memory device are all connected to one and the same chip... Stmicroelectronics rousset Sas

Protection of an integrated circuit

An integrated circuit protection device, including: groups of radiation detection elements distributed in a matrix array; logic gates combining outputs of the detection elements in rows and in columns, each output of a detection element being connected to a gate combining a row and to a gate combining a column;... Stmicroelectronics rousset Sas

Sense amplifier

A read-amplifier circuit includes a core with a first input and a second input that are intended to receive in a measurement phase a differential signal arising from a first bit line and from a second bit line of the memory device. The circuit also includes a memory element with... Stmicroelectronics rousset Sas

Reconfigurable sense amplifier

A memory sense amplifier is configurable on command between a current-sensing mode and a voltage-sensing mode. The sense amplifier is intended, in its current-sensing configuration, to read a datum stored in a memory cell connected to the amplifier, and is intended, in its voltage-sensing configuration, to read a datum stored... Stmicroelectronics rousset Sas

Method for reading an eeprom and corresponding device

A read amplifier of a memory device has two current generators, an inverter, and five transistors. The inverter is connected to the second current generator. The first transistor has a gate connected to the read amplifier, a drain connected to the first current generator, and a source connected to a... Stmicroelectronics rousset Sas

Backside fib probing detector in a forward and reverse body biasing architecture

An integrated circuit including a plurality of first semiconductor strips of a first conductivity type and of second semiconductor strips of a second conductivity type arranged in alternated and contiguous fashion on a region of the second conductivity type, including for each of the first strips: a plurality of bias... Stmicroelectronics rousset Sas

Pulse counting circuit

A pulse counting circuit receives pulses supplied by a source circuit having at least two inverted pulse signal supply terminals. The circuit includes a first counter to count pulses of a first pulse signal and supply a first count and a second counter to count pulses of a second pulse... Stmicroelectronics rousset Sas

Multiplexer structure

A logic two-to-one multiplexer includes: two input terminals; one output terminal; a control terminal. Four series-connected two-to-one multiplexers are connected such that a first multiplexer has its inputs connected to the input terminals, a last multiplexer has its output connected to the output terminal, and the other multiplexers have their... Stmicroelectronics rousset Sas

Generator of numbers of oscillations

A circuit generates a number of oscillations. The circuit includes a first branch with at least one delay line introducing symmetrical delays on rising edges and on falling edges and at least one asymmetrical delay element introducing different delays on rising edges and on falling edges. The circuit further includes... Stmicroelectronics rousset Sas

Mos transistor structure, in particular for high voltages using a technology of the silicon-on-insulator type

An integrated circuit is formed using a substrate of a silicon-on-insulator type that includes a carrier substrate and a stack of a buried insulating layer and a semiconductor film on the carrier substrate. A first region without the stack separates a second region that includes the stack from a third... Stmicroelectronics rousset Sas

Phase-change memory cell having a compact structure

A memory cell includes a selection transistor having a control gate and a first conduction terminal connected to a variable-resistance element. The memory cell is formed in a wafer comprising a semiconductor substrate covered with a first insulating layer, the insulating layer being covered with an active layer made of... Stmicroelectronics rousset Sas

Process for fabricating resistive memory cells

A oxide-based direct-access resistive nonvolatile memory may include within the interconnect portion of the integrated circuit a memory plane including capacitive memory cells extending in orthogonal first and second directions and each including a first electrode, a dielectric region and a second electrode. The memory plane may include conductive pads... Stmicroelectronics rousset Sas

Controllable integrated capacitive device

An integrated circuit includes several metallization levels separated by an insulating region. A hollow housing whose walls comprise metallic portions is produced within various metallization levels. A controllable capacitive device includes a suspended metallic structure situated in the hollow housing within a first metallization level including a first element fixed... Stmicroelectronics rousset Sas

Sense amplifier for memory device

A read-amplifier circuit includes a core with a first input and a second input that are intended to receive in a measurement phase a differential signal arising from a first bit line and from a second bit line of the memory device. The circuit also includes a memory element with... Stmicroelectronics rousset Sas

Stack of layers for protecting against a premature breakdown of interline porous dielectrics within an integrated circuit

A stack including a dual-passivation is etched locally so as to reveal contact pads of an integrated circuit which are situated above a last metallization level of an interconnection part of the integrated circuit. This stack serves to protect the integrated circuit against a breakdown of at least one dielectric... Stmicroelectronics rousset Sas

Method and device for controlling a charge pump circuit

A charge pump circuit can be controlled by a control signal that is generated from a first signal coming from and output signal of the charge pump circuit, from a reference signal, and from a clock signal. The generation of the control signal includes a comparison of the reference signal... Stmicroelectronics rousset Sas

Semiconductor structure and memory device including the structure

A semiconductor structure includes first and second source/drain region disposed in a semiconductor body and spaced from each other by a channel region. A gate electrode overlies the channel region and a capacitor electrode is disposed between the gate electrode and the channel region. A first gate dielectric is disposed... Stmicroelectronics rousset Sas

Protection of data stored in a volatile memory

A method of detecting a cold-boot attack includes transferring, into a first volatile memory of an integrated circuit, a pattern stored in a non-volatile memory of the integrated circuit. Power to the non-volatile memory is periodically interrupted and an indication of a number of errors in the non-volatile memory is... Stmicroelectronics rousset Sas

Method of connecting one or more contactless components to a single antenna, and corresponding system

An electronic device includes an antenna, an irremovable component, a removable component, an impedance matching circuit, and a controller. The impedance matching circuit is arranged in a first configuration corresponding to the removable component connected to the irremovable component. The impedance matching circuit has a first capacitor, a second capacitor,... Stmicroelectronics rousset Sas

Method for processing an analog signal coming from a transmission channel, in particular a signal carried by power line communications

A method is for processing an analog signal coming from a transmission channel. The analog signal may include a useful signal modulated on a sub-set of carriers. The method may include analog-to-digital converting of the analog signal into a digital signal, and synchronization processing the digital signal. The synchronizing may... Stmicroelectronics rousset Sas

Read performance of a non-volatile memory device, in particular a non-volatile memory device with buried selection transistor

The non-volatile memory device comprises memory cells each comprising a selectable state transistor having a floating gate and a control gate. The state transistor is of the depletion-mode type and is advantageously configured so as to have a threshold voltage that is preferably negative when the memory cell is in... Stmicroelectronics rousset Sas

Method of forming mos and bipolar transistors

Bipolar transistors and MOS transistors are formed in a common process. A semiconductor layer is arranged on an insulating layer. On a side of the bipolar transistors: an insulating region including the insulating layer is formed; openings are etched through the insulating region to delimit insulating walls; the openings are... Stmicroelectronics rousset Sas

Method and device for transmitting information over a communication channel with variable impedance

A method includes digital/analog conversion of a digital signal modulated by information to provide a modulated initial analog signal having a crest factor greater than one, and amplification of the initial analog signal to provide an amplified modulated signal. A modulated channel analog signal derived from the modulated amplified analog... Stmicroelectronics rousset Sas

Method for writing into and reading a multi-levels eeprom and corresponding memory device

During a phase of programming the cell, a first voltage is applied to the source region and a second voltage, higher than the first voltage, is applied to the drain region until the cell is put into conduction. The numerical value of the item of data to be written is... Stmicroelectronics rousset Sas

Circuit and detecting a fault attack

A device for detecting a fault attack, including: a circuit for detecting an interruption of a power supply; a circuit for comparing the duration of the interruption with a first threshold; and a counter of the number of successive interruptions of the power supply having a duration which does not... Stmicroelectronics rousset Sas

08/31/17 / #20170250795

Electromagnetic jamming device and an integrated circuit

A device is provided for jamming electromagnetic radiation liable to be emitted by at least one portion of an interconnect region located above at least one zone of an integrated electronic circuit produced in and on a semiconductor substrate. The device includes an antenna located above the at least one... Stmicroelectronics rousset Sas

08/24/17 / #20170242608

Apparatus and eeprom select transistor breakdown voltage management

A memory device of the non-volatile electrically-erasable and programmable memory type is provided. The memory device includes a matrix memory plane of memory cells connected to bit lines. Programming circuitry is configured to select a memory cell and to apply a programming pulse to the corresponding bit line. The memory... Stmicroelectronics rousset Sas

08/24/17 / #20170242778

Method and tool for generating a program code configured to perform control flow checking on another program code containing instructions for indirect branching

Synchronization points are inserted into a program code to be monitored, and are associated with different branches resulting from execution of an indirect branch instruction. The synchronization points can be accessed by the monitored program code for the purpose of identifying which branch to use during execution of the indirect... Stmicroelectronics rousset Sas

08/24/17 / #20170243648

Method for writing in an eeprom memory and corresponding device

A method can be used for writing in a memory location of the electrically-erasable and programmable memory type. The memory location includes a first memory cell with a first transistor having a first gate dielectric underlying a first floating gate and a second memory cell with a second transistor having... Stmicroelectronics rousset Sas

08/24/17 / #20170243652

Method for detecting a thinning of the semiconductor substrate of an integrated circuit from its back face and corresponding integrated circuit

The thinning of a semiconductor substrate of an integrated circuit from a back face is detected using the measurement of a physical quantity representative of the resistance between the ends of two electrically-conducting contacts situated at an interface between an insulating region and an underlying substrate region. The two electrically-conducting... Stmicroelectronics rousset Sas

08/17/17 / #20170237774

Protection against rerouting a communication channel of a telecommunication device having an nfc circuit and a secure data circuit

A method and associated circuits protect data stored in a secure data circuit of a telecommunication device equipped with a near-field communication (NFC) router, a microcontroller, and the secure data circuit. In the method, each message received with the NFC router is parsed to retrieve a communication pipe identifier and... Stmicroelectronics rousset Sas

08/10/17 / #20170228304

Method and device for monitoring the execution of a program code

A method for monitoring the execution of a program code by a monitoring program code may include storing instructions of the program code and instructions for monitoring the program code in the same program memory. Each instruction to be monitored and the associated monitoring instructions may be simultaneously extracted from... Stmicroelectronics rousset Sas

08/03/17 / #20170222639

Electronic switching device with reduction of leakage currents and corresponding control method

A method is used to control an electronic device that includes a switching unit having a main MOS transistor having a substrate, a first conducting electrode and a second conducting electrode coupled to an output terminal. The method includes controlling the main transistor in such a way as to put... Stmicroelectronics rousset Sas

07/20/17 / #20170206182

Single-wire bus communication protocol

A method to transmit data over a single-wire bus wherein a first communication channel is defined by pulses of different durations according to the state of the transmitted bit and depending on a reference duration, and a second communication channel is defined by the reference duration.... Stmicroelectronics rousset Sas

07/20/17 / #20170206520

Control of applications in a mobile terminal

A method of controlling the execution of a payment application by a mobile terminal, in near field communication with a payment device. The method includes transmitting an application selection request to the payment device, and verifying the application identifier received from the payment device against a list of authorized applications.... Stmicroelectronics rousset Sas

07/20/17 / #20170207052

Metallic device having mobile element in a cavity of the beol of an integrated circuit

In order, for example, to improve the ohmic contact between two metal pieces located at a metallization level, these two metal pieces are equipped with two offset vias located at the metallization level and at least partially at the via level immediately above. Each offset via comprises, for example, a... Stmicroelectronics rousset Sas

07/06/17 / #20170192448

Method for smoothing a current consumed by an integrated circuit and corresponding device

A method for smoothing current consumed by an electronic device is based on a series of current copying operations and on a current source delivering a reference current. The reference current is delivered in such a manner that current consumed as seen from the power supply depends on the reference... Stmicroelectronics rousset Sas

07/06/17 / #20170194267

Method for fabrication of an integrated circuit rendering a reverse engineering of the integrated circuit more difficult and corresponding integrated circuit

An integrated circuit includes a substrate with several functional blocks formed thereon. At least two identical functional blocks are respectively disposed at two or more different locations on the integrated circuit. Electrically inactive dummy modules in the neighborhoods and/or inside of the functional blocks are provided, wherein at least two... Stmicroelectronics rousset Sas

06/22/17 / #20170178733

Twin memory cell interconnection structure

Non-volatile memory including rows and columns of memory cells, the columns of memory cells including pairs of twin memory cells including a common selection gate. According to the disclosure, two bitlines are provided per column of memory cells. The adjacent twin memory cells of the same column are not connected... Stmicroelectronics rousset Sas

06/22/17 / #20170179247

Method for producing a high-voltage transistor with reduced footprint, and corresponding integrated circuit

An integrated MOS transistor is formed in a substrate. The transistor includes a gate region buried in a trench of the substrate. The gate region is surrounded by a dielectric region covering internal walls of the trench. A source region and drain region are situated in the substrate on opposite... Stmicroelectronics rousset Sas

06/22/17 / #20170180005

Method for estimating a time invariant transmission channel, and corresponding receiver

A method is for processing an analog channel signal from a transmission channel. The method may include converting of the analog channel signal to a digital channel signal, and performing a channel estimation digital processing of the digital channel signal. The channel estimation digital processing may include for at least... Stmicroelectronics rousset Sas

06/15/17 / #20170168935

Method and device of memory space management

A virtual memory is partitioned into virtual partitions, each partition being subdivided into virtual sub-partitions and each sub-partition corresponding to a combination of multiple sectors of identical or different sizes of a physical memory. When an allocation request is made for a virtual memory space having a given memory size,... Stmicroelectronics rousset Sas

06/08/17 / #20170162264

Method for managing a fail row of the memory plane of a non volatile memory and corresponding memory device

A non-volatile memory is erasable by page and equipped with a row redundancy mechanism. In the case of the detection of a defective row of the memory plane, the storing of the address of the row in a non-volatile register is carried out and a redundant row having a new... Stmicroelectronics rousset Sas

06/08/17 / #20170163291

Method for managing a fail bit line of a memory plane of a non volatile memory and corresponding memory device

A method can be used for managing the operation of a non-volatile memory equipped with a system for correction of a single error and for detection of a double error. In the case of the detection of a defective bit line of the memory plane, a redundant bit line is... Stmicroelectronics rousset Sas

06/01/17 / #20170154683

Reconfigurable sense amplifier for a memory device

A memory sense amplifier is configurable on command between a current-sensing mode and a voltage-sensing mode. The sense amplifier is intended, in its current-sensing configuration, to read a datum stored in a memory cell connected to the amplifier, and is intended, in its voltage-sensing configuration, to read a datum stored... Stmicroelectronics rousset Sas

05/25/17 / #20170147362

Stand-by mode of an electronic circuit

A microcontroller includes a core and a unit for managing the power supply of the core that includes an input for receiving an external signal indicating a leaving of a stand-by mode of operation. A signal intercepting unit intercepts the external signal and transmitting it with a delay to the... Stmicroelectronics rousset Sas

05/25/17 / #20170148926

Zener diode having an adjustable breakdown voltage

The present disclosure relates to a Zener diode including a Zener diode junction formed in a semiconductor substrate along a plane parallel to the surface of the substrate, and positioned between a an anode region having a first conductivity type and a cathode region having a second conductivity type, the... Stmicroelectronics rousset Sas

05/18/17 / #20170141069

Distribution of electronic circuit power supply potentials

An integrated circuit includes peripheral conductive pads interconnected by a peripheral conductive track within an integrated circuit chip. The integrated circuit chip further includes internal conductive pads interconnected by an internal conductive track within the integrated circuit chip. A conductive bonding wire external to the integrated circuit chip connects the... Stmicroelectronics rousset Sas

05/18/17 / #20170141913

Protection of encrypted information during a processing by a processing unit

A circuit includes a first processing unit and a second identical processing unit. A first communication bus passes encrypted data between one of a plurality of functions and one or both of the first and second processing units. A selection circuit determines whether the encrypted bus is coupled to the... Stmicroelectronics rousset Sas

05/04/17 / #20170124323

Detection of fault injections in a random number generator

A method for detecting a fault injection in a circuit, wherein a bit pattern is mixed in a bit stream originating from a noise source and the presence of this pattern is detected in a signal sampled downstream of the mixing.... Stmicroelectronics rousset Sas

05/04/17 / #20170125112

Method for reading an eeprom and corresponding device

One embodiment provides a method for reading a memory cell of a memory plane of a memory of the erasable electrically-programmable ROM type. The word line and of the bit line to which the memory cell belongs are selected and the content of the cell is read via a read... Stmicroelectronics rousset Sas

04/27/17 / #20170116439

Secure electronic chip

A secure electronic chip including a plurality of biased semiconductor wells and a well biasing current detection circuit. Each of the wells includes a transistor and a bias contact electrically isolated from the transistor. The detection circuit is electrically coupled to each bias contact and is configured to detect a... Stmicroelectronics rousset Sas

04/27/17 / #20170117326

Vertical bipolar transistor

The disclosure relates to an integrated circuit comprising a transistor comprising first and second conduction terminals and a control terminal. The integrated circuit further comprises a stack of a first dielectric layer, a conductive layer, and a second dielectric layer, the first conduction terminal comprising a first semiconductor region formed... Stmicroelectronics rousset Sas

04/13/17 / #20170103980

Method of operating an integrated switchable capacitive device

A variable capacitor includes a fixed main capacitor electrode disposed in a first metal layer overlying a substrate, a second main capacitor electrode spaced from the fixed main capacitor electrode, and a movable capacitor electrode disposed in the first metal layer adjacent the fixed main capacitor electrode. The movable capacitor... Stmicroelectronics rousset Sas

04/06/17 / #20170097653

Method for smoothing a current consumed by an integrated circuit and corresponding device

A method for smoothing current consumed by an electronic device is based on a series of current copying operations and on a current source delivering a reference current. The reference current is delivered in such a manner that current consumed as seen from the power supply depends on the reference... Stmicroelectronics rousset Sas

Patent Packs
04/06/17 / #20170098615

Prevention of premature breakdown of interline porous dielectrics in an integrated circuit

A non-porous dielectric barrier is provided between a porous portion of a dielectric region and an electrically conductive element of an interconnect portion of an integrated circuit. This non-porous dielectric barrier protects the integrated circuit from breakdown of the least one dielectric region caused by electrical conduction assisted by the... Stmicroelectronics rousset Sas

03/30/17 / #20170090801

System for storing and reading of a message authentication code in an external memory and related method

A method is for protecting a program code that is executed by a computer processing module having a central processing unit coupled to a cache memory containing cache lines that each have a data field that is intended to store instruction words that can be executed by the central processing... Stmicroelectronics rousset Sas

03/30/17 / #20170090813

Non-volatile memory device having a memory size

A memory device includes an input/output interface, a bus of SPI type coupled to the input/output interface, and a plurality of individual non-volatile memory devices connected to the bus of SPI type. The chip select inputs of each individual memory device are all connected to one and the same chip... Stmicroelectronics rousset Sas

03/30/17 / #20170092357

Method for managing the write cycle of an eeprom

A method of controlling a cycle for writing at least one data item to at least one memory slot of the electrically programmable and erasable read-only memory type disposed in an electronic circuit supplied by a supply voltage includes a controlled increase of the duration of the write cycle in... Stmicroelectronics rousset Sas

03/30/17 / #20170092600

Backside fib probing detector in a forward and reverse body biasing architecture

An integrated circuit including a plurality of first semiconductor strips of a first conductivity type and of second semiconductor strips of a second conductivity type arranged in alternated and contiguous fashion on a region of the second conductivity type, including for each of the first strips: a plurality of bias... Stmicroelectronics rousset Sas

03/23/17 / #20170084336

Non-volatile memory with a variable polarity line decoder

The present disclosure relates to a memory including a memory array with at least two rows of memory cells, a first driver coupled to a control line of the first row of memory cells, and a second driver coupled to a control line of the second row of memory cells.... Stmicroelectronics rousset Sas

03/23/17 / #20170084749

Vertical memory cell with non-self-aligned floating drain-source implant

Various embodiments provide a memory cell that includes a vertical selection gate, a floating gate extending above the substrate, wherein the floating gate also extends above a portion of the vertical selection gate, over a non-zero overlap distance, the memory cell comprising a doped region implanted at the intersection of... Stmicroelectronics rousset Sas

03/09/17 / #20170070341

Protection of a calculation against side-channel attacks

A method for protecting a ciphering algorithm executing looped operations on bits of a first quantity and on a first variable initialized by a second quantity, wherein, for each bit of the first quantity, a random number is added to the state of this bit to update a second variable... Stmicroelectronics rousset Sas

03/02/17 / #20170060535

Verification of the sensitivity of an electronic circuit executing a modular exponentiation calculation

A method of verifying the sensitivity of an electronic circuit executing a modular exponentiation calculation in a first register and a second register, successively including, for each bit of the exponent: a first step of multiplying the content of one of the registers, selected from among the first register and... Stmicroelectronics rousset Sas

03/02/17 / #20170061119

Protection of a modular exponentiation calculation

A method of protecting a modular exponentiation calculation executed by an electronic circuit using a first register and a second register, successively comprising, for each bit of the exponent: a first step of multiplying the content of one of the registers, selected from among the first register and the second... Stmicroelectronics rousset Sas

03/02/17 / #20170063522

Verification of the resistance of an electronic circuit to side-channel attacks

A method of verifying the sensitivity of an electronic circuit executing a Rijndael-type algorithm to side channel attacks, wherein: each block of data to be encrypted or to be decrypted is masked with a first mask before a non-linear block substitution operation is applied based on a substitution box, and... Stmicroelectronics rousset Sas

03/02/17 / #20170063523

Dpa protection of a rijndael algorithm

A method of protecting a Rijndael-type algorithm executed by an electronic circuit against side channel attacks, wherein: each block of data to be encrypted or to be decrypted is masked with a first mask before a non-linear block substitution operation is applied based on a substitution box, and is then... Stmicroelectronics rousset Sas

03/02/17 / #20170063524

Protection of a rijndael algorithm

A method of protecting a Rijndael-type algorithm executed by an electronic circuit against side channel attacks, wherein: each block of data to be encrypted or decrypted is masked with a first mask before applying a non-linear block substitution operation from a first substitution box, and is then unmasked by a... Stmicroelectronics rousset Sas

02/23/17 / #20170053141

Method for managing communication between an electronic device, for example a contactless chip card, and a communication apparatus, for example a reader, and corresponding electronic device

The device is equipped with several protocol decoding means (DCDi) corresponding respectively to various communication protocols so as to be capable of dialoguing with the said communication apparatus during transactions selectively according to one of these communication protocols; the method comprises an automatic protocol detection comprising a) an activation (40)... Stmicroelectronics rousset Sas

02/23/17 / #20170055109

Nfc device with multiple secure elements

An NFC device includes first and second secure elements, an NFC router, and a processor. A method involves emulating, by the NFC router in response to a command from the processing device, an RF card emulation transaction. The RF card emulation transaction includes transmitting by the NFC router a command... Stmicroelectronics rousset Sas

Patent Packs
02/16/17 / #20170048658

Method and device for managing information exchange between a main element, for example a nfc controller, and a set of at least two auxiliary elements

Device, comprising a main element (ME) and a set of at least two auxiliary elements (SEi), said main element including a master SWP interface (MINT), each auxiliary element including a slave SWP interface (SLINTi) connected to said master SWP interface of said NFC element through a controllably switchable SWP link... Stmicroelectronics rousset Sas

02/09/17 / #20170039001

Method for writing in an eeprom memory and corresponding memory

According to one mode of implementation it is proposed to automatically accelerate the write operation by deleting on the basis of the values of the data to be written and optionally on the basis of the values of the data present in the memory the erasure step or the programming... Stmicroelectronics rousset Sas

02/09/17 / #20170040060

Method and system for managing a writing cycle of a data in a eeprom memory cell

An operation for writing at least one datum in at least one memory cell of the electrically erasable and programmable read-only memory type comprises at least one step of erasing or of programming of the cell by a corresponding erasing or programming pulse. The correct or incorrect conducting of the... Stmicroelectronics rousset Sas

01/12/17 / #20170010980

Method and circuit for protecting and verifying address data

A circuit is for protecting memory address data. The circuit may include an input data bus configured to receive write data to be written to a memory device, and an address bus configured to receive a corresponding write address. The circuit may also include an output data bus, and an... Stmicroelectronics rousset Sas

01/12/17 / #20170011804

Dual non-volatile memory cell comprising an erase transistor

The present disclosure relates to a non-volatile memory cell on a semiconductor substrate, comprising a first transistor comprising a control gate, a floating gate and a drain region, a second transistor comprising a control gate, a floating gate and a drain region, in which the floating gates of the first... Stmicroelectronics rousset Sas

01/12/17 / #20170012104

Method for producing a high-voltage transistor with reduced footprint, and corresponding integrated circuit

An integrated MOS transistor is formed in a substrate. The transistor includes a gate region buried in a trench of the substrate. The gate region is surrounded by a dielectric region covering internal walls of the trench. A source region and drain region are situated in the substrate on opposite... Stmicroelectronics rousset Sas

01/12/17 / #20170012666

Method for estimating a cyclostationary transmission channel, and corresponding receiver

A method is for processing an analog channel signal from a transmission channel. The analog channel signal conveys frames, the transmission channel being linear and cyclostationary for a duration of a frame. The method may include converting of the analog channel signal into a digital channel signal, and performing channel... Stmicroelectronics rousset Sas

01/12/17 / #20170012669

Method for processing a signal coming from a transmission channel, in particular a signal conveyed via power-line communication, and notably the estimation of the channel, and corresponding receiver

A method is for processing a channel analog signal coming from a transmission channel. The method may include converting the channel analog signal into a channel digital signal, and detecting a state of the transmission channel based on the channel digital signal to detect whether the transmission channel is, over... Stmicroelectronics rousset Sas

01/12/17 / #20170012670

Method for estimating a time invariant transmission channel, and corresponding receiver

A method is for processing an analog channel signal from a transmission channel. The method may include converting of the analog channel signal to a digital channel signal, and performing a channel estimation digital processing of the digital channel signal. The channel estimation digital processing may include for at least... Stmicroelectronics rousset Sas

01/12/17 / #20170012671

Method for processing a signal coming from a transmission channel, in particular a signal conveyed via power-line communication, and notably the estimation of the channel, and corresponding receiver

A method is for processing a channel analog signal coming from a transmission channel. The method may include converting the channel analog signal into a channel digital signal, and detecting a state of the transmission channel based on the channel digital signal to detect whether the transmission channel is, over... Stmicroelectronics rousset Sas

01/05/17 / #20170004333

Detection of the authenticity of an electronic circuit or of a product containing such a circuit

A method of authenticating a slave device. The method includes initializing, by a host device, a charge retention circuit of the slave device, and receiving, by the host device, an indication of a discharge time of the charge retention circuit. The host device authenticates the slave device based on the... Stmicroelectronics rousset Sas








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