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Sunedison Semiconductor Limited uen201334164h patents


Recent patent applications related to Sunedison Semiconductor Limited uen201334164h. Sunedison Semiconductor Limited uen201334164h is listed as an Agent/Assignee. Note: Sunedison Semiconductor Limited uen201334164h may have other listings under different names/spellings. We're not affiliated with Sunedison Semiconductor Limited uen201334164h, we're just tracking patents.

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Methods and system for controlling a surface profile of a wafer

Methods for controlling the surface profiles of wafers sliced from an ingot with a wire saw include measuring an amount of displacement of a sidewall of a frame of the wire saw. The sidewall is connected to a bearing of a wire guide supporting a wire web in the wire... Sunedison Semiconductor Limited uen201334164h

Liquid doping controlled doping of a melt

A method of growing a doped monocrystalline ingot using a crystal growing system is provided. The crystal growing system includes a growth chamber, a dopant feeding device, and a feed tube. The method includes preparing a melt of semiconductor or solar-grade material in a crucible disposed within the growth chamber,... Sunedison Semiconductor Limited uen201334164h

Methods for producing single crystal silicon ingots with reduced seed end oxygen

Methods for producing single crystal silicon ingots with a reduced oxygen content toward the seed end of the ingot are disclosed. The methods may involve controlling growth conditions during crown formation and, in some embodiments, controlling the rate of crucible rotation during crown rotation to increase the time the crucible... Sunedison Semiconductor Limited uen201334164h

Preparation of silicon-germanium-on-insulator structures

Donor structures having a germanium buffer layer for preparing silicon-germanium-on-insulator structures by layer transfer are disclosed. Bonded structures and methods for preparing silicon-germanium-on-insulator structures by a layer transfer method are also disclosed.... Sunedison Semiconductor Limited uen201334164h

High resistivity silicon-on-insulator substrate comprising an isolation region

A multilayer composite structure and a method of preparing a multilayer composite structure are provided. The multilayer composite structure comprises a semiconductor handle substrate having a minimum bulk region resistivity of at least about 500 ohm-cm and an isolation region that impedes the transfer of charge carriers along the surface... Sunedison Semiconductor Limited uen201334164h

Method of manufacturing high resistivity soi wafers with charge trapping layers based on terminated si deposition

A method of preparing a single crystal semiconductor handle wafer in the manufacture of a silicon-on-insulator device is provided. The method comprises forming a multilayer of passivated semiconductors layers on a dielectric layer of a high resistivity single crystal semiconductor handle wafer. The method additionally comprises forming a semiconductor oxide... Sunedison Semiconductor Limited uen201334164h

High resistivity semiconductor-in-insulator wafer and a manufacturing

A semiconductor on insulator multilayer structure is provided. The multilayer comprises a high resistivity single crystal semiconductor handle substrate, an optionally relaxed semiconductor layer comprising silicon, germanium, or silicon germanium, an optional polycrystalline silicon layer, a dielectric layer, and a single crystal semiconductor device layer.... Sunedison Semiconductor Limited uen201334164h

Semiconductor on insulator structure comprising a sacrificial layer and manufacture thereof

A method is provided for preparing a semiconductor-on-insulator structure comprising a sacrificial layer.... Sunedison Semiconductor Limited uen201334164h

Process flow for manufacturing semiconductor on insulator structures in parallel

A cost effective process flow for manufacturing semiconductor on insulator structures is parallel is provided. Each of the multiple semiconductor-on-insulator composite structures prepared in parallel comprises a charge trapping layer (CTL).... Sunedison Semiconductor Limited uen201334164h

Surface photovoltage calibration standard

A method of preparing an iron-implanted semiconductor wafer for use in surface photovoltage iron mapping and other evaluation techniques. A semiconductor wafer is implanted with iron through the at least two different regions of the front surface of the semiconductor at different iron implantation densities, and the iron-implanted semiconductor wafer... Sunedison Semiconductor Limited uen201334164h

Seed chuck assemblies and crystal pulling systems for reducing deposit build-up during crystal growth process

Crystal pulling systems for growing monocrystalline ingots from a melt of semiconductor or solar-grade material are described. The crystal pulling systems include seed chuck assemblies designed to reduce formation of deposits on components of the crystal pulling systems by reducing and inhibiting the formation of gas flow recirculation cells within... Sunedison Semiconductor Limited uen201334164h

Semiconductor substrate polishing methods with dynamic control

Methods for polishing semiconductor substrates are disclosed. The finish polishing sequence is adjusted based on a measured edge roll-off of an analyzed substrate.... Sunedison Semiconductor Limited uen201334164h

Crystal pulling inhibiting precipitate build-up in exhaust flow path

A crystal pulling system for growing a monocrystalline ingot from a melt of semiconductor or solar-grade material includes a housing defining a growth chamber, a crucible disposed within the growth chamber containing the melt of semiconductor or solar-grade material, a vacuum pump for drawing exhaust gases out of the growth... Sunedison Semiconductor Limited uen201334164h

Semiconductor wafer support ring for heat treatment

A support ring for supporting a semiconductor wafer in a boat of a vertical furnace used in processing of the semiconductor wafer includes a semicircular segment. The semicircular segment has an upper surface, a lower surface opposite the upper surface, a radial inner wall defining an inner radius, and a... Sunedison Semiconductor Limited uen201334164h

Crystal pulling producing monocrystalline ingots with reduced edge band defects

A crystal pulling system for growing a monocrystalline ingot from a melt of semiconductor or solar-grade material includes a crucible for containing the melt of material, a pulling mechanism configured to pull the ingot from the melt along a pull axis, and a multi-stage heat exchanger defining a central passage... Sunedison Semiconductor Limited uen201334164h

Semiconductor substrate polishing methods and slurries and methods for manufacturing silicon on insulator structures

Polishing slurries for polishing semiconductor substrates are disclosed. The polishing slurry may include first and second sets of colloidal silica particles with the second set having a silica content greater than the first set.... Sunedison Semiconductor Limited uen201334164h

Crystal growing systems and methods including a transparent crucible

A system for growing a crystal ingot from a melt includes a crucible assembly configured to contain the melt and a susceptor configured to support the crucible assembly. The crucible assembly includes a substantially transparent crucible. The system further includes a heating system for generating thermal energy and disposed to... Sunedison Semiconductor Limited uen201334164h

Methods for preparing layered semiconductor structures and related bonded structures

Methods for preparing silicon-on-insulator structures and related intermediate structures are disclosed. In some embodiments, a single crystal silicon seed crystal is bonded to an amorphous silicon layer disposed on a substrate and the amorphous layer is crystallized to form a monocrystalline silicon layer.... Sunedison Semiconductor Limited uen201334164h

Methods for preparing layered semiconductor structures

Methods for preparing layered semiconductor structures are disclosed. The methods may involve pretreating an ion-implanted donor wafer by annealing the ion-implanted donor wafer to cause a portion of the ions to out-diffuse prior to wafer bonding. The donor structure may be bonded to a handle structure and cleaved without re-implanting... Sunedison Semiconductor Limited uen201334164h

Wafer nanotopography metrology for lithography based on thickness maps

A method for lithography nanotopography metrology is provided. The method includes receiving wafer thickness data for a plurality of wafers and applying an elongated filter to the wafer thickness data to produce a filtered thickness map for each of the plurality of wafers. The filter has a first cutoff wavelength... Sunedison Semiconductor Limited uen201334164h

Methods and systems for polishing pad control

A method for varying a removal profile of a silicon wafer during polishing using a polishing apparatus is provided. The polishing apparatus includes a polishing pad, a polishing head assembly configured to hold the silicon wafer, a temperature sensor, and a controller. The method includes receiving, at the controller, thermal... Sunedison Semiconductor Limited uen201334164h








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