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Texas Instruments Incorporated
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Texas Instruments Incorporated patents

Recent patent applications related to Texas Instruments Incorporated. Texas Instruments Incorporated is listed as an Agent/Assignee. Note: Texas Instruments Incorporated may have other listings under different names/spellings. We're not affiliated with Texas Instruments Incorporated, we're just tracking patents.

ARCHIVE: New 2017 2016 2015 2014 2013 2012 2011 2010 2009 | Company Directory "T" | Texas Instruments Incorporated-related inventors




Date Texas Instruments Incorporated patents (updated weekly) - BOOKMARK this page
06/22/17 new patent  End effector bump detector
06/22/17 new patent  Infrared sensor design using an epoxy film as an infrared absorption layer
06/22/17 new patent  Method of addressing film liftoff in mems fabrication
06/22/17 new patent  Leak detection using cavity surface quality factor
06/22/17 new patent  Magnetic field annealing for integrated fluxgate sensors
06/22/17 new patent  Method and system for electroplating a mems device
06/22/17 new patent  Scan frame based test access mechanisms
06/22/17 new patent  Circuits and methods for determining chirp signal linearity and phase noise of a fmcw radar
06/22/17 new patent  Method of fabricating a microelectronic device with buried dark layers
06/22/17 new patent  Capacitive touch sensing
06/22/17 new patent  Systems and methods for optimal trim calibrations in integrated circuits
06/22/17 new patent  Multilevel via placement with improved yield in dual damascene interconnection
06/22/17 new patent  Fail-safe i/o to achieve ultra low system power
06/22/17 new patent  Self-latch sense timing in a one-time-programmable memory architecture
06/22/17 new patent  Methods and isolation barrier with integrated magnetics for high power modules
06/22/17 new patent  Enhanced lateral cavity etch
06/22/17 new patent  Interlocking nest wafer protector
06/22/17 new patent  Low damage low-k dielectric etch
06/22/17 new patent  Elongated contacts using litho-freeze-litho-etch process
06/22/17 new patent  Semiconductor package having a leadframe with multi-level assembly pads
06/22/17 new patent  Leadframe strip assembly and processing
06/22/17 new patent  Oxidation resistant barrier metal process for semiconductor devices
06/22/17 new patent  Self-aligned under bump metal
06/22/17 new patent  Integrated circuit having chemically modified spacer surface
06/22/17 new patent  Ldmos device with graded body doping
06/22/17 new patent  Power fet with integrated sensors and manufacturing
06/22/17 new patent  Tilted photodetector cell
06/22/17 new patent  Low power zero inductor current detection circuit
06/22/17 new patent  Mitigating amplifier pop noise
06/22/17 new patent  Method to reduce frequency distribution of bulk acoustic wave resonators during manufacturing
06/22/17 new patent  System and a reduced harmonic content transmitter for wireless communication
06/22/17 new patent  Gate energy recovery
06/22/17 new patent  Loop filter with active discrete-level loop filter capacitor in a voltage controlled oscillator
06/22/17 new patent  Joining process in a powerline communication (plc) network
06/22/17 new patent  Apparatus for die-to-die communication
06/22/17 new patent  Method and csi feedback in a mimo wireless communication system with elevation beamforming
06/22/17 new patent  Embedded clock in digital communication system
06/22/17 new patent  Memory bandwidth reduction for motion compensation in video coding
06/22/17 new patent  Power efficient packet detection
06/15/17Reducing motion induced artifacts in photoplethysmography (ppg) signals
06/15/17Ultrasonic flowmeter using windowing of received signals
06/15/17Ic top/bottom surfaces coupled to test, scan, and comparator circuitry
06/15/17Interconnections for plural and hierarchical p1500 test wrappers
06/15/17Streaming engine with error detection, correction and restart
06/15/17System and mitigating oxide growth in a gate dielectric
06/15/17Flip-chip on leadframe having partially etched landing sites
06/15/17Method and diagonal scan and simplified context selection for parallel entropy coding of significance map of transform coefficients
06/08/17Area efficient parallel test data path for embeded memories
06/08/17Dark current compensation for photon counting circuit
06/08/17Status register between test data i/o of scan port sut
06/08/17Test access port with address and command capability
06/08/17Compact wedge prism beam steering
06/08/17Voltage-to-current converter
06/08/17Quasi-parametric optical flow estimation
06/08/17Universal and adaptive de-mosaicing (cfa) system
06/08/17Flat no-lead packages with electroplated edges
06/08/17Method to improve cmp scratch resistance for non planar surfaces
06/08/17Packaged ic with solderable sidewalls
06/08/17Ldmos device with body diffusion self-aligned to gate
06/08/17Area-efficient active-fet esd protection circuit
06/08/17Linear hall device based field oriented control motor drive system
06/08/17Nonlinear class ab input stage
06/01/17Hermetically sealed mems device and its fabrication
06/01/17Thermal sensor combination
06/01/17Systems and methods of testing multiple dies
Patent Packs
06/01/17Vapor cell structure having cavities connected by channels for micro-fabricated atomic clocks, magnetometers, and other devices
06/01/17Integrated dual axis fluxgate sensor using double deposition of magnetic material
06/01/17Static power reduction in caches using deterministic naps
06/01/17Highly integrated scalable, flexible dsp megamodule architecture
06/01/17Streaming engine with deferred exception reporting
06/01/17Sense amplifier in low power and high performance sram
06/01/17Selected-parameter adaptive switching for power converters
06/01/17Power conditioning circuit with hybrid full wave rectifiction using matched virtual junction rectifier
06/01/17Systems and methods of low power clocking for sleep mode radios
06/01/17Baseline compensation system
06/01/17Multi-level ladder dac with dual-switch interconnect to ladder nodes
06/01/17Reducing context coded and bypass coded bins to improve context adaptive binary arithmetic coding (cabac) throughput
05/25/17Heart rate estimation apparatus with state sequence optimization
05/25/17Heart rate estimation apparatus using digital automatic gain control
05/25/17System and high voltage stress testing plurality of parallel units
Patent Packs
05/25/17Integrated circuit with jtag port, tap linking module, and off-chip tap interface port
05/25/17Reduced signaling interface method & apparatus
05/25/17Calibrated measurement system and method
05/25/17Compact chip scale lidar solution
05/25/17Inductor detection
05/25/17Host controller interface for universal serial bus (usb) power delivery
05/25/17Dual endianess and other configuration safety in lock step dual-core system, and other circuits, processes and systems
05/25/17Methods and apparatus to detect and correct errors in destructive read non-volatile memory
05/25/17Computer and methods for solving math functions
05/25/17Configurable write current overshoot system for hdd write driver
05/25/17Method of fabricating semiconductors
05/25/17Mosfet having dual-gate cells with an integrated channel diode
05/25/17Isolated iii-n semiconductor devices
05/25/17Systems and methods of non-invasive continuous adaptive tuning of digitally controlled switched mode power supply based on measured dynamic response
05/25/17Oscillator frequency tuning using bulk acoustic wave resonator
05/25/17Mismatch correction in differential amplifiers using analog floating gate transistors
05/25/17Programmable gain amplifier with analog gain trim using interpolation
05/25/17Programmable resistor array for a continuous time pga filter
05/25/17High resolution capture
05/25/17Ultra low power reduced coupling clocked comparator
05/25/17Ldpc post-processor architecture and low error floor conditions
05/25/17Precision measurement of transmit power using loopback calibration in an rf transceiver
05/25/17Faster and more efficient different precision sum of absolute differences for dynamically configurable block searches for motion estimation
05/25/17Simplified context selection for entropy coding of transform coefficient syntax elements
05/18/17Method and automated surge stress testing using voltage and current waveforms
05/18/17Wafer scale testing using a 2 signal jtag interface
05/18/17Buffer sample size control for variable chirp radar
05/18/17Usb interface circuit and low power operation
05/18/17Streaming engine with cache-like stream data storage and lifetime tracking
05/18/17Port controller with power contract negotiation capability
Social Network Patent Pack
05/18/17Method of forming a bicmos semiconductor chip that increases the betas of the bipolar transistors
05/18/17Method of improving bipolar device signal to noise performance by reducing the effect of oxide interface trapping centers
05/18/17Distributed pole-zero compensation for an amplifier
05/18/17High dynamic range ask wake-up receiver
05/18/17Scaled power line based network
05/18/17Method and network communication using a physical layer (phy) data frame having a phy header that includes a destination address field
05/18/17Intra/inter mode decision for predictive frame encoding
05/18/17Image compression
05/18/17Lte transmission mask adjustment providing improved performance and reduced interference
05/18/17Feed forward controlled voltage to current source for led driver
Patent Packs
05/11/17Optimized regenerative braking control of electric motors using look-up tables
05/11/17Response collector circuitry coupled with through silicon via and tap
05/11/17System and sharing a communications link between multiple communications protocols
05/11/17Two address translations from a single table look-asside buffer read
05/11/17Method and system for file storage and access
05/11/17Aware variable fill pattern generator
05/11/17Down scaling images in a computer vision system
05/11/17Background memory test apparatus and methods
05/11/17Buffer stack for group iiia-n devices
05/11/17System and mitigating oxide growth in a gate dielectric
05/11/17Deep trench isolation with tank contact grounding
05/11/17Poly gate extension design methodology to improve cmos performance in dual stress liner process flow
05/11/17Smart in-situ chamber clean
05/11/17Compensated well esd diodes with reduced capacitance
05/11/17Mos transistor structure and forming the structure with vertically and horizontally-elongated metal contacts
05/11/17Graphene fet with graphitic interface layer at contacts
05/11/17Low-stress low-hydrogen lpcvd silicon nitride
05/11/17Delta-sigma adc with wait-for-sync feature
05/11/17Guided near field communication for short range data communication
05/11/17Ctle gear shifting to enable cdr frequency lock in wired communication
05/11/17Led drive apparatus, systems and methods
05/04/17Methods and intrinsically safe laser sourced illumination
05/04/17Magnetically shielded probe card
05/04/17Serial i/o using jtag tck and tms signals
05/04/17Systems and methods for determining battery state of charge
05/04/17Integrated force sensing element
05/04/17Method and system for boot time optimization of embedded multiprocessor systems
05/04/17Scalable boot options for a processor/controller
05/04/17Method for comprehensive integration verification of mixed-signal circuits
05/04/17Automatic feature point detection for calibration of multi-camera systems
Patent Packs
05/04/17Area-efficient parallel test data path for embedded memories
05/04/17Split-gate lateral extended drain mos transistor structure and process
05/04/17Semiconductor systems having premolded dual leadframes
05/04/17Lead frame assembly
05/04/17Construction of a hall-effect sensor in an isolation region
05/04/17Trench gate trench field plate vertical mosfet
05/04/17Poly sandwich for deep trench fill
05/04/17High efficiency dc-dc converter with active shunt to accommodate high input voltage transients
05/04/17System and improving efficiency for quasi-square wave power converters
05/04/17Trifilar voltage controlled oscillator
05/04/17Digital clock-duty-cycle correction
05/04/17Digital clock-duty-cycle correction
05/04/17Digitally reconfigurable ultra-high precision internal oscillator
05/04/17R2r digital-to-analog converter circuit
05/04/17Methods and determining nearfield localization using phase and rssi delivery
05/04/17Database-less authentication with physically unclonable functions
05/04/17Context adaptive binary arithmetic coding (cabac) with scalable throughput and coding efficiency
05/04/17Low-complexity two-dimensional (2d) separable transform design with transpose buffer management
05/04/17Parallel motion estimation in video coding
04/27/17Material determination by sweeping a range of frequencies
Social Network Patent Pack
04/27/17Ultrasonic transducer bi-modal system responses
04/27/17Scan response reuse method and apparatus
04/27/17Rf/mm-wave peak detector with high-dynamic range calibration
04/27/17Ultrasonic transducer system and method using broadband system responses
04/27/17Memory optimized gnss correlator
04/27/17Method to specify or extend the number of constant bits employing an constant extension slot in the same execute packet in a vliw processor
04/27/17Conditional execution specification of instructions using conditional extension slots in the same execute packet in a vliw processor
04/27/17Image synthesis method with dsp and gpu
04/27/17Time-based frequency tuning of analog-to-information feature extraction
04/27/17Integrated power package
04/27/17Isolation of circuit elements using front side deep trench etch
04/27/17Isolated capacitive power transfer
04/27/17Back emf monitor for motor control
04/27/17Resonant circuit calibration
04/27/17Simultaneous lvds i/o signaling method and apparatus
04/27/17Sample adaptive offset (sao) filtering in video coding
04/27/17Methods and systems for encoding pictures associated with video data
04/20/17Test systems and methods of testing devices
04/20/17Nonvolatile logic memory for computing module reconfiguration
04/20/17Integrated circuit assembly
Social Network Patent Pack
04/20/17Power-on reset circuit with reset transition based on vt
04/20/17Analog to digital converter
04/20/17Analog to digital convertor error rate reduction
04/13/17Detecting power supply sag in an integrated circuit
04/13/17Scan testing system, method and apparatus
04/13/17Integrated circuit package mold assembly
04/13/17Scan testable through silicon vias
04/13/17Adaptive bus voltage auto-selection system
04/13/17Asynchronous state estimation and control in a field-oriented control architecture
04/13/17Low latency data transfer in a system for wireless power transmission
04/13/17Security processing engines, circuits and systems and adaptive processes and other processes
04/13/17Phy layer parameter for body area network (ban) devices
04/06/17Integrated circuit alignment tool
04/06/17Memory attribute sharing between differing cache levels of multilevel cache
04/06/17Mems electrostatic actuator device for rf varactor applications
04/06/17High voltage bipolar structure for improved pulse width scalability
04/06/17Avalanche energy handling capable iii-nitride transistors
04/06/17Frequency controlled power converter characterization apparatus and methods
04/06/17Adaptive signaling based mfsk modulation scheme for ultrasonic communications
04/06/17Minimum tone separation constrained mfsk scheme for ultrasonic communications
04/06/17Transmitter architecture for photoplethysmography systems
03/30/17High speed double data rate jtag interface
03/30/17Measurement of transceiver performance parameters in a radar system
03/30/17Multi-chip transceiver testing in a radar system
03/30/17Method for joint antenna-array calibration and direction of arrival estimation for automotive applications
03/30/17Fault tolerant voltage regulator
03/30/17Secure emulation logic between page attribute table and test interface
03/30/17Plating interconnect for silicon chip
03/30/17Conductive spline for metal gates
03/30/17Dielectric waveguide socket
Social Network Patent Pack
03/30/17System for launching a signal into a dielectric waveguide
03/30/17Metallic waveguide with dielectric core
03/30/17Noise-shaped power converters
03/30/17Pairwise temporal key creation for secure networks
03/23/17Ultrasonic flow meter auto-tuning for reciprocal operation of the meter
03/23/17Analog temperature sensor for digital blocks
03/23/17Piecewise correction of errors over temperature without using on-chip temperature sensor/comparators
03/23/17Low noise capacitive sensor with integrated bandpass filter
03/23/17Methods and apparatus to track bit cell current using temperature and voltage dependent reference currents
03/23/17Method of forming a thin film that eliminates air bubbles
03/23/17Integrated circuit with dual stress liner boundary
03/23/17High voltage lateral extended drain mos transistor with improved drift layer contact
03/23/17P-n bimodal transistors
03/23/17Spring biased contact pin assembly
03/23/17Hot plug immunity for circuit protecting against electrostatic discharge events
03/23/17Low-power low-phase-noise oscillator
03/23/17Data and control multiplexing in pusch in wireless networks
03/23/17Signaling signed band offset values for sample adaptive offset (sao) filtering in video coding
03/23/17Transform and quantization architecture for video coding and decoding
03/23/17Method and real-time sao parameter estimation
03/16/17Reduced signaling interface method & apparatus
03/16/17Integrated circuit chip with multiple cores
03/16/17High speed interconnect circuit test method and apparatus
03/16/17Gating tap register control bus and auxiliary/wrapper test bus
03/16/173d tap & scan port architectures
03/16/17Improved core circuit test architecture
03/16/17Method and fmcw radar processing
03/16/17Optimized fast feature detection for vector processors
03/16/17Track and hold with active charge cancellation







ARCHIVE: New 2017 2016 2015 2014 2013 2012 2011 2010 2009



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