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Texas Instruments, Inc.orporated patents

Recent patent applications related to Texas Instruments, Inc.orporated. Texas Instruments, Inc.orporated is listed as an Agent/Assignee. Note: Texas Instruments, Inc.orporated may have other listings under different names/spellings. We're not affiliated with Texas Instruments, Inc.orporated, we're just tracking patents.

ARCHIVE: New 2014 2013 2012 2011 2010 2009 | Company Directory "T" | Texas Instruments, Inc.orporated-related inventors

Circuits and methods for determining the temperature of a transistor

Texas Instruments

Circuits and methods for determining the temperature of a transistor

Search recent Press Releases: Texas Instruments, Inc.orporated-related press releases
Count Application # Date Texas Instruments, Inc.orporated patents (updated weekly) - BOOKMARK this page
12014031247410/23/14Semiconductor package with wire bonding
22014031412410/23/14Circuits and methods for determining the temperature of a transistor
32014030521510/16/14Ultrasonic flow meter
42014030633210/16/14Integrating multi-output power converters having vertically stacked semiconductor chips
52014030673710/16/14Low-power voltage mode high speed driver
62014030676410/16/14Circuits and methods for compensating for miller capacitance
72014030781010/16/14Time-domain windowing function
82014030781310/16/14Symbol-wise channel tracking for sun ofdm
92014030784110/16/14Snr dependent channel tracking for sun ofdm
102014030995510/16/14Method and system for determining power consumption
112014031044410/16/14Dynamic balancing of bus bandwidth across multiple routes
122014031050310/16/14Memory interleaving on memory channels
132014030668910/16/14High resolution current pulse analog measurement
142014029965310/09/14Micromirror array assembly
152014030033810/09/14Circuits and methods for current to voltage conversion
162014030034210/09/14Tracking energy consumption using a boost technique
172014030034310/09/14Tracking energy consumption using a sepic-converter technique
182014030098410/09/14Circuits and methods for cancelling a reflected wave
192014030111210/09/14Tracking energy consumption using a fly-back converter technique
202014030117310/09/14Differential laser diode driver apparatus and systems
212014030146510/09/14Video coding using intra block copy
222014030150810/09/14Automatic gain control in a receiver
232014030267210/09/14Method of forming metal contacts in the barrier layer of a group iii-n hemt
242014030267310/09/14Method of forming metal contacts with low contact resistances in a group iii-n hemt
252014030274010/09/14Toy building block with embedded integrated circuit
262014030391010/09/14Extended range adc flow meter
272014030456310/09/14Position independent testing of circuits
282014030456410/09/14Scan frame based test access mechanisms
292014029039810/02/14Accelerometer-aided gyroscope
302014029121110/02/14Method and apparatus for sorting carbon nanotubes
312014029182210/02/14Integrated circuit package
322014029235410/02/14Capacitive sensor
332014029236110/02/14Testing integrated circuit packaging for output short circuit current
342014029238310/02/14Circuits and methods for asymmetric aging prevention
352014029303010/02/14Real time math using a camera
362014029429010/02/14Projector-camera misalignment correction for structured light systems
372014029809410/02/14Processor power measurement
382014029823710/02/14Radial based user interface on touch sensitive screen
392014028472509/25/14Mos transistor structure and method of forming the structure with vertically and horizontally-elongated metal contacts
402014028477909/25/14Semiconductor device having reinforced wire bonds to metal terminals
412014028522909/25/14Testing integrated circuit packaging for shorts
422014028527709/25/14Dielectric waveguide manufactured using printed circuit board technology
432014028592509/25/14Driver circuit
442014028593109/25/14Inductive isolation of capactive load in amplitude limiters
452014028957709/25/14Selectable jtag or trace access with data store and output
462014026462309/18/14Transistor with deep nwell implanted through the gate
472014026482909/18/14Electronic assembly with copper pillar attach substrate
482014026595209/18/14Automated motor control
492014026596609/18/14Disk drive
502014026596909/18/14Detection of back emf in two terminal actuator
512014026608409/18/14Dc-dc converter
522014026631109/18/14Sampled reference supply voltage supervisor
532014026636109/18/14Duty cycle correction circuit
542014026644509/18/14Low-power inverter-based differential amplifier
552014026700709/18/14Interaction detection using structured light images
562014026892309/18/14Magnetic sensing technique for power supply systems
572014026897109/18/14Tcam with efficient range search capability
582014026897209/18/14Tcam with efficient multiple dimension range search capability
592014026939509/18/14Multiple rank cqi feedback for cellular networks
602014027001109/18/14Pseudorandom sequence generation for ofdm cellular systems
612014027005709/18/14X-ray sensor and signal processing assembly for an x-ray computed tomography machine
622014027014909/18/14Clipping based on cepstral distance for acoustic echo canceller
632014027388309/18/14Low power, low out-of-band harmonic content radio
642014028176409/18/14Data path memory test
652014025176009/11/14Die eject assembly for die bonder
662014025236709/11/14Driver for normally on iii-nitride transistors to get normally-off functionality
672014025241909/11/14Mems device and method of manufacture
682014025245709/11/14Multi-landing contact etching
692014025248509/11/14Low-cost cmos structure with dual gate dielectrics and method of forming the cmos structure
702014025303909/11/14Battery charger
712014025309609/11/14Electronic device and method for tracking energy consumption
722014025314109/11/14Detecting power supply sag in an integrated circuit
732014025368809/11/14Time of flight sensor binning
742014025375809/11/14Method and apparatus for a time-of-flight sensor with charge storage
752014025423509/11/14Power supply brownout protection circuit and method for embedded fram
762014025480909/11/14Audio accessory circuitry and method compatible with both msft mode and digital communication mode
772014025493209/11/14Content adaptive edge and detail enhancement for image and video processing
782014025704909/11/14Wearable heart monitoring apparatus
792014025879909/11/14Ip core design supporting user-added scan register option
802014025882009/11/14Providing information during different stages of a design cycle
812014024559809/04/14Fabricating a power supply converter with load inductor structured as heat sink
822014024649309/04/14Novel nfc receiver architecture with improved power sensitivity
832014024704009/04/14Position detecting system
842014024707109/04/14Architecture for vbus pulsing in udsm processes
852014024708409/04/14Specifications support enablement
862014024717509/04/14Asynchronous to synchronous sampling using an augmented least squares solver
872014024756209/04/14Dc-dc converter vertically integrated with load inductor structured as heat sink
882014024764109/04/14Power reduction circuit and method
892014024764209/04/14Single sided bit line restore for power reduction
902014024874609/04/14Making a flip-chip assembly with bond fingers
912014025034209/04/14Automatable scan partitioning for low power using external control
922014023940908/28/14Non-volatile anti-fuse with consistent rupture
932014023947308/28/14Wire bonding assembly and method
942014023950008/28/14Integrated circuit (ic) having electrically conductive corrosion protecting cap over bond pads
952014023976808/28/14Capacitive micromachined ultrasonic transducer (cmut) with through-substrate via (tsv) substrate plug
962014023976908/28/14Capacitive micromachined ultrasonic transducer (cmut) device with through-substrate via (tsv)
972014023992208/28/14Apparatus and methods to control peak current mode controlled power converters using selective noise blanking
982014023992408/28/14Emulated current ramp for dc-dc converter
992014023993508/28/14Apparatus and method for selective and adaptive slope compensation in peak current mode controlled power converters
1002014023997708/28/14Capacitive sensing
1012014023997908/28/14Capacitive mems sensor devices
1022014023998308/28/14Capacitive sensing
1032014024006208/28/14Dielectric waveguide with deformable interface surface
1042014024015308/28/14Advanced overload protection in sigma delta modulators
1052014024046108/28/143d camera using flash with structured light
1062014024057308/28/14Shared-field projection and imaging system
1072014024098408/28/14Light emitting diode light bulb and incandescent lamp conversion apparatus
1082014024106608/28/14Dual-function read/write cache for programmable non-volatile memory
1092014024108308/28/14Read assist circuit for an sram technical field
1102014024108908/28/14Read assist circuit for an sram technical field
1112014024135808/28/14Packet processing match and action unit with a vliw action engine
1122014024135908/28/14Packet processing vliw action unit with or-multi-ported instruction memory
1132014024136108/28/14Packet processing match and action unit with configurable memory allocation
1142014024136208/28/14Packet processing match and action unit with configurable bit allocation
1152014024154908/28/14Robust estimation of sound source localization
1162014024162008/28/14Illumination estimation using natural scene statistics
1172014024184608/28/14Pick up tip assembly
1182014024275508/28/14Making an integtated circuit module with dual leadframes
1192014024422308/28/14Method for simulating circuitry by dynamically modifying device models that are problematic for out-of-range voltages
1202014024496608/28/14Packet processing match and action unit with stateful actions
1212014024509008/28/14Parallel scan distributors and collectors and process of testing integrated circuits
1222014024530808/28/14System and method for scheduling jobs in a multi-core processor
1232014023235908/21/14Resonance-based single inductor output-driven dc-dc converter and method
1242014023242208/21/14Built-in self-test methods, circuits and apparatus for concurrent test of rf modules with a dynamically configurable test structure
1252014023243908/21/14Negative edge preset reset flip-flop with dual-port slave latch
1262014023244008/21/14Positive edge reset flip-flop with dual-port slave latch
1272014023244108/21/14Positive edge preset flip-flop with dual-port slave latch
1282014023244208/21/14Negative edge reset flip-flop with dual-port slave latch
1292014023244308/21/14Negative edge preset flip-flop with dual-port slave latch
1302014023293808/21/14Systems and methods for video processing
1312014023327008/21/14Voltage conversion and charging from low bipolar input voltage
1322014023349808/21/14Multiple cqi feedback for cellular networks
1332014023350708/21/14Uplink synchronization management in wireless networks
1342014023358608/21/14Carrier sense multiple access (csma) protocols for power line communications (plc)
1352014023360908/21/14Ultra wideband modulation for body area networks
1362014023647508/21/14Methods and systems for navigation in indoor environments
1372014023647908/21/14Attitude estimation for pedestrian navigation using low cost mems accelerometer in mobile applications, and processing methods, apparatus and systems
1382014023730908/21/14Interconnections for plural and hierarchical p1500 test wrappers
1392014023731108/21/14System and method for sharing a communications link between multiple communications protocols
1402014022511008/14/14Default trim code technique
1412014022511208/14/14Die testing using top surface test pads
1422014022522608/14/14Multi-step deposition of ferroelectric dielectric material
1432014022587408/14/14Touch panel apparatus and methods
1442014022651808/14/14Cqi feedback structure
1452014022670508/14/14Adaptive real-time control of de-emphasis level in a usb 3.0 signal conditioner based on incoming signal frequency range
1462014022673908/14/14Pre-coder selection based on resource block grouping
1472014022766908/14/14Guided tool tips for expression calculation
1482014022780508/14/14Adhesion of ferroelectric material to underlying conductive capacitor plate
1492014022785908/14/14Diffusion resistor with reduced voltage coefficient of resistance and increased breakdown voltage using cmos wells
1502014022787708/14/14Method of forming a metal contact opening with a width that is smaller than the minimum feature size of a photolithographically-defined opening
1512014022789108/14/14Interdigitated chip capacitor assembly
1522014022974808/14/14Apparatus and method for optimizing use of nvdc chargers
1532014022978008/14/14Ieee 1149.1 and p1500 test interfaces combined circuits and processes
1542014022978108/14/14Hierarchical access of test access ports in embedded core integrated circuits
1552014021651708/07/14Vertical thermoelectric structures
1562014021749708/07/14Mosfet with curved trench feature coupling termination trench to active trench
1572014021756808/07/14Semiconductor package with cantilever leads
1582014021794408/07/14Permanent magnet motor with sinusoidal back-emf waveform and related motor controller for position sensorless drives
1592014021801808/07/14Apparatus and method for in situ current measurement in a conductor
1602014021807508/07/14Adaptive slope generator
1612014021809008/07/14Negative edge flip-flop with dual-port slave latch
1622014021809108/07/14Positive edge flip-flop with dual-port slave latch
1632014021811208/07/14Compensation circuitry and method for amplifiers driving large capacitive loads
1642014021917308/07/14Uplink synchronization management in wireless networks
1652014021921808/07/14Downlink 8 tx codebook sub-sampling for csi feedback
1662014021921908/07/14Downlink 8 tx codebook sub-sampling for csi feedback
1672014021927708/07/14Conditional instructions for packet processing
1682014021929408/07/14Rotate-mask-merge and deposit-field instructions for packet processing
1692014022076108/07/14Reduction of polysilicon residue in a trench for polysilicon trench filling processes
1702014022305208/07/14System and method for slave-based memory protection
1712014022312708/07/14System and method for virtual hardware memory protection
1722014021005307/31/14Bi-directional esd protection circuit
1732014021006207/31/14Leadframe-based semiconductor package having terminals on top and bottom surfaces
1742014021006407/31/14Wire bonding method and structure
1752014021051107/31/14Error detection in nonvolatile logic arrays using parity
1762014021053307/31/14Edge rate control gate drive circuit and system for high and low side devices with large driver fet
1772014021053507/31/14Signal level conversion in nonvolatile bitcell array
1782014021076507/31/14Capacitive single layer multi-touch panel having improved response characteristics
1792014021134707/31/14Bi-directional esd protection circuit
1802014021143907/31/14Circuit assembly
1812014021153207/31/14Four capacitor nonvolatile bit cell
1822014021153307/31/14Two capacitor self-referencing nonvolatile bitcell
1832014021157207/31/14Nonvolatile logic array with built-in test result signal
1842014021157607/31/14Nonvolatile logic array with built-in test drivers
1852014021175507/31/14Radio bearer dependent forwarding for handover
1862014021188207/31/14Dynamic determination of volterra kernels for digital pre-distortion
1872014021386307/31/14Low-complexity sensor displacement tolerant pulse oximetry based heart rate measurement
1882014021528207/31/141149.1 tap linking modules
1892014021528307/31/14Integrated circuit with jtag port, tap linking module, and off-chip tap interface port
1902014021542507/31/14Adjustable dummy fill
1912014020338807/24/14Optical sensor with integrated pinhole
1922014020378007/24/14System and method for active charge and discharge current balancing in multiple parallel-connected battery packs
1932014020418207/24/14Multi-sensor video frame synchronization apparatus and methods
1942014020482507/24/14Methods for energy-efficient unicast and multicast transmission in a wireless communication system
1952014020629607/24/14Transceiver with asymmetric matching network
1962014020798407/24/14Signal conitioner
1972014020813407/24/14Host controller interface for universal serial bus (usb) power delivery
1982014020817607/24/14Scan chain in an integrated circuit
1992014020817707/24/14Circuits and methods for dynamic allocation of scan test resources
2002014019748607/17/14Power integrated circuit including series-connected source substrate and drain substrate power mosfets
2012014019753407/17/14Substrate with bond fingers
2022014019787507/17/14Circuits and methods for signal interference mitigation
2032014019789507/17/14Variability and aging sensor for integrated circuits
2042014019841507/17/14Electrostatic discharge protection apparatus
2052014019855007/17/14Frequency multiplier
2062014019897707/17/14Enhancement of stereo depth maps
2072014020150307/17/14Processor micro-architecture for compute, save or restore multiple registers, devices, systems, methods and processes of manufacture
2082014019137807/10/14Integrated circuit package
2092014019138007/10/14Integrated circuit package and method of making
2102014019138107/10/14Integrated circuit module with dual leadframe
2112014019173007/10/14Converter and method for extracting maximum power from piezo vibration harvester
2122014019174307/10/14Current mode control arrangement and method thereof
2132014019194707/10/14Using natural movements of a hand-held device to manipulate digital content
2142014019239707/10/14Mems device with sloped support
2152014019274007/10/14Methods and apparatus for dual connectivity operation in a wireless communication network
2162014019586907/10/14Serial i/o using jtag tck and tms signals
2172014019588007/10/14Rate matching and scrambling techniques for control signaling
2182014019615407/10/14Systems and methods for controlling access to secure debugging and profiling features of a computer system
2192014018365507/03/14High performance isolated vertical bipolar junction transistor and method for forming in a cmos integrated circuit
2202014018365707/03/14Embedded polysilicon resistor in integrated circuits formed by a replacement gate process
2212014018365807/03/14Poly resistor for metal gate integrated circuits
2222014018366307/03/14Raised source/drain mos transistor and method of forming the transistor with an implant spacer and an epitaxial spacer
2232014018371907/03/14Electronic assembly includes a composite carrier
2242014018374407/03/14Package substrate with bondable traces having different lead finishes
2252014018425907/03/14Method and device for testing wafers
2262014018431007/03/14Switch architecture at low supply voltages
2272014018433007/03/14Time gain compensation
2282014018435007/03/14Two layer differential pair layout, and method of making thereof, for reduced crosstalk
2292014018438107/03/14Single photomask high precision thin film resistor
2302014018485007/03/14System and method for generating 360 degree video recording using mvc
2312014018547207/03/14Method for incorporating invisible access points for rssi-based indoor positioning applications
2322014018551807/03/14System and method for wifi positioning
2332014018555607/03/14Channel quality report processes, circuits and systems
2342014018568107/03/14Hierarchical inter-layer prediction in multi-loop scalable video coding
2352014018569107/03/14Signaling decoded picture buffer size in multi-loop scalable video coding
2362014018962807/03/14System and method of crossover determination in differential pair and bondwire pairs to minimize crosstalk
2372014017559706/26/14Trench with reduced silicon loss
2382014017559906/26/14Integrated circuit package with printed circuit layer
2392014017562606/26/14Integrated circuit package and method of manufacture
2402014017730306/26/14Volt-second integration cable compensation circuit
2412014017774006/26/14Hexagonal constellations and decoding same in digital communication systems
2422014017906406/26/14Method for fabricating a package-in-package for high heat dissipation
2432014018116506/26/14Three-term predictive adder and/or subtracter
2442014018160606/26/14Direct scan access jtag
2452014018160706/26/14Lock state machine operations upon stp data captures and shifts
2462014018160806/26/14Tap and linking module for scan access of multiple cores with ieee 1149.1 test access ports
2472014018160906/26/14Semiconductor test system and method
2482014016718206/19/14Ztcr poly resistor in replacement gate flow
2492014016729506/19/14Coatings for relatively movable surfaces

ARCHIVE: New 2014 2013 2012 2011 2010 2009


This listing is an abstract for educational and research purposes is only meant as a recent sample of applications filed, not a comprehensive history. is not affiliated or associated with Texas Instruments, Inc.orporated in any way and there may be associated servicemarks. This data is also published to the public by the USPTO and available for free on their website. Note that there may be alternative spellings for Texas Instruments, Inc.orporated with additional patents listed. Browse our Agent directory for other possible listings. Page by



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