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Texas Instruments Incorporated patents


      
Recent patent applications related to Texas Instruments Incorporated. Texas Instruments Incorporated is listed as an Agent/Assignee. Note: Texas Instruments Incorporated may have other listings under different names/spellings. We're not affiliated with Texas Instruments Incorporated, we're just tracking patents.

ARCHIVE: New 2015 2014 2013 2012 2011 2010 2009 | Company Directory "T" | Texas Instruments Incorporated-related inventors


Overlapping priority contention windows power line communications networks

Texas Instruments

Overlapping priority contention windows power line communications networks

Self-calibrating shared-component dual synthesizer

Texas Instruments

Self-calibrating shared-component dual synthesizer

Circuits and methods for transmitting signals

Texas Instruments

Circuits and methods for transmitting signals

Search recent Press Releases: Texas Instruments Incorporated-related press releases
Count Application # Date Texas Instruments Incorporated patents (updated weekly) - BOOKMARK this page
12015017732306/25/15 new patent  Scan test method and apparatus
22015017732406/25/15 new patent  Scan topology discovery in target systems
32015017732506/25/15 new patent  Semiconductor test system and method
42015017732606/25/15 new patent  Waveform calibration using built in self test mechanism
52015017822106/25/15 new patent  Level one data cache line lock and enhanced snoop protocol during cache victims and writebacks to maintain level one data cache and level two cache coherence
62015017851306/25/15 new patent  Method and system of verifying proper execution of a secure mode entry sequence
72015017857306/25/15 new patent  Ground plane detection
82015017945206/25/15 new patent  High voltage depletion mode n-channel jfet
92015017959206/25/15 new patent  Self-aligned under bump metal
102015017965406/25/15 new patent  Epitaxial source/drain differential spacers
112015017978306/25/15 new patent  Metal-gate mos transistor and forming the transistor with reduced gate-to-source and gate-to-drain overlap capacitance
122015017979206/25/15 new patent  Scheme to align ldmos drain extension to moat
132015017979306/25/15 new patent  Lateral mosfet with buried drain extension layer
142015018033006/25/15 new patent  Apparatus and zero voltage switching in bridgeless totem pole power factor correction converter
152015018053906/25/15 new patent  Enabling co-existence among power line communication (plc) technologies
162015018059406/25/15 new patent  Self-calibrating shared-component dual synthesizer
172015018068006/25/15 new patent  Overlapping priority contention windows power line communications networks
182015018069206/25/15 new patent  Circuits and methods for transmitting signals
192015018162106/25/15 new patent  Multiple nfc card applications in multiple execution environments
202015018170606/25/15 new patent  High voltage polymer dielectric capacitor isolation device
212015016832806/18/15Capacitive sensing for paper tray
222015016849206/18/15Test access port with address and command capability
232015016849306/18/15Testing interposer method and apparatus
242015016849406/18/15Synchronizing a device that has been power cycled to an already operational system
252015016981406/18/15Harmonic distortion macro model correction using a memory table
262015016981506/18/15Harmonic distortion vs. output loading macro-modeling
272015017096206/18/15Metal on elongated contacts
282015017097106/18/15Methodology of forming cmos gates on the secondary axis using double-patterning technique
292015017097206/18/15Method to form silicide and contact at embedded epitaxial facet
302015017097506/18/15Elongated contacts using litho-freeze-litho-etch process
312015017098306/18/15Probe pad design to reduce saw defects
322015017099806/18/15Use of dielectric slots for reducing via resistance in dual damascene process
332015017099906/18/15Multiple depth vias in an integrated circuit
342015017104606/18/15Self-adhesive die
352015017107706/18/15Poly resistor for metal gate integrated circuits
362015017109106/18/15Self aligned active trench contact
372015017115806/18/15Low temperature coefficient resistor in cmos flow
382015017121106/18/15Reduced area power devices using deep trench isolation
392015017121206/18/15High voltage lateral dmos transistor with optimized source-side blocking capability
402015017121306/18/15High voltage lateral extended drain mos transistor with improved drift layer contact
412015017121706/18/15Design and integration of finfet device
422015017163406/18/15Data extraction threshold circuit and method
432015017192206/18/15Channel selection in power line communications
442015017193206/18/15Circuit and architecture for a demodulator for a wireless power transfer system and method therefor
452015017193506/18/15Circuit and architecture for a demodulator for a wireless power transfer system and method therefor
462015017207306/18/15Transmission of segmented frames in power line communication
472015017271806/18/15Low complexity large transform
482015016922306/18/15Dynamic processor-memory revectoring architecture
492015016028506/11/15Apparatus and methods for qualifying hemt fet devices
502015016029406/11/15Parallel and serial access to test compression architectures
512015016029506/11/15Method and device access port selection
522015016035006/11/15Antenna selection for gnss receivers
532015016045406/11/15Multiple illumination sources for dmd lighting apparatus and methods
542015016231706/11/15Fabricating a proximity sensor having light-blocking structure in leadframe
552015016283006/11/15Power converter soft start circuit
562015016313406/11/15Routing protocols for power line communications (plc)
572015016320706/11/15Pairwise temporal key creation for secure networks
582015015341106/04/15Ieee 1149.1 interposer method and apparatus
592015015341206/04/15Dual mode test access port method and apparatus
602015015402406/04/15Vector simd vliw data path architecture
612015015578306/04/15Switched mode assisted linear regulator with dynamic buck turn-off using zcd-controlled tub switching
622015015649006/04/15Virtual boundary processing simplification for adaptive loop filtering (alf) in video coding
632015014369005/28/15Forming integrated inductors and transformers with embedded magnetic cores
642015014438905/28/15Method of minimizing mold flash during dambar cut
652015014503605/28/15Power integrated circuit including series-connected source substrate and drain substrate power mosfets
662015014504005/28/15Metal oxide semiconductor and making
672015014505805/28/15Transistor with deep nwell implanted through the gate
682015014509705/28/15Photodiode with a dark current suppression junction
692015014512505/28/15Passivation process to prevent tiw corrosion
702015014543005/28/15Combined digital modulation and current dimming control for light emitting diodes
712015014549705/28/15Low-loss step-up and step-down voltage converter
722015014617405/28/15Projector with optical conversion media pumped by low etendue source
732015014633005/28/15Esd robust mos device
742015014667605/28/15Downlink multiple input multiple output enhancements for single-cell with remote radio heads
752015014682305/28/15Wireless network receiver
762015014703405/28/15Optical connector
772015014784505/28/15Dual sided embedded die and fabrication of same background
782015014788105/28/15Passivation ash/oxidation of bare copper
792015014933105/28/15Taking device inventory using dynamically generated symbols
802015014983305/28/15Embedding stall and event trace profiling data in the timing stream - extended timing trace circuits, processes, and systems
812015014984405/28/15Double data rate test interface and architecture
822015014984505/28/15Device testing architecture, method, and system
832015013761905/21/15Method and circuitry for controlling a depletion-mode transistor
842015013770005/21/15Systems and methods of driving multiple outputs
852015013771305/21/15Adaptive linear resonance actuator controller
862015013800405/21/15Method for calibrating a pipelined continuous-time sigma delta modulator
872015013831205/21/15Method and a surround view camera system photometric alignment
882015013844605/21/15Compact optical projection apparatus
892015013899505/21/15Method, system and phase noise cancellation
902015013956805/21/15Method and a optimal seam for surround view synthesis
912015014076905/21/15Raised source/drain mos transistor and forming the transistor with an implant spacer and an epitaxial spacer
922015014237905/21/15Method and forcing the measurements of the angles of a triangle
932015014299405/21/15Robust cable-type detection for usb power delivery
942015014318105/21/15Dual endianess and other configuration safety in lock step dual-core system, and other circuits, processes and systems
952015014319105/21/15Shadow access port method and apparatus
962015014351405/21/15Methods, apparatus, and systems for securing sim (subscriber identity module) personalization and other data on a first processor and secure communication of the sim data to a second processor
972015013043405/14/15Fast current limiting circuit in multi loop ldos
982015013044505/14/15Remote sensing system
992015013048505/14/15Modulated test messaging from dedicated test circuitry to power terminal
1002015013049505/14/15Assembly for testing semiconductor devices
1012015013049605/14/15Method for testing semiconductor devices
1022015013051105/14/15Scheme to improve the performance and reliability in high voltage io circuits designed using low voltage devices
1032015013052705/14/15Low power scheme to protect the low voltage capacitors in high voltage io circuits
1042015013075505/14/15Integrated receiver and adc for capacitive touch sensing apparatus and methods
1052015013318005/14/15Selective power reduction to mitigate band interference
1062015013422405/14/15Automotive cruise controls, circuits, systems and processes
1072015013471105/14/15File access method and system thereof
1082015013502905/14/15Tap and linking module for scan access of multiple cores with ieee 1149.1 test access ports
1092015013515205/14/15Clock tree design
1102015012362705/07/15Power converters and compensation circuits thereof
1112015012364805/07/15Devices and methods for detecting usb devices attached to a usb charging port
1122015012371005/07/15Cross-conduction detector for switching regulator
1132015012371105/07/15Optimized peak detector for the agc loop in a digital radio receiver
1142015012466305/07/15Method and configuraton, measurement and reporting of channel state information for lte tdd with dynamic ul/dl configuration
1152015012474205/07/15Near-optimal qos-based resource allocation for hybrid-medium communication networks
1162015012769505/07/15Processor trigonometric computation
1172015012799205/07/15Using an in-system component as an embedded trace receiver
1182015012799305/07/15Trace data export to remote memory using memory mapped write transactions
1192015012799405/07/15Trace data export to remote memory using remotely generated reads
1202015012799705/07/15Minimizing the amount of time stamp information reported with instrumentation data
1212015012800205/07/15Jtag bus communication method and apparatus
1222015012810205/07/15Circuit design synthesis tool with export to a computer-aided design format
1232015011542104/30/15Method an stopping resin bleed and mold flash on integrated circit lead finishes
1242015011592904/30/15Method and generating piece-wise linear regulated supply
1252015011599004/30/15Die stack test architecture and method
1262015011669504/30/15Light radar signal processing apparatus, systems and methods
1272015011741704/30/15Enabling coordinated multi-point reception
1282015011757504/30/15Method, system and carrier frequency offset correction and channel estimation
1292015011886104/30/15Czochralski substrates having reduced oxygen donors
1302015012002604/30/15Analog-to-digital converter
1312015012072604/30/15Using audio cues to improve object retrieval in video
1322015012104304/30/15Computer and methods for solving math functions
1332015012111904/30/15Plural circuit selection using role reversing control inputs
1342015011602704/30/15Unified bandgap voltage curvature correction circuit
1352015010803804/23/15Tape and reel cover tape to improve die sticking issues
1362015010858804/23/15Radiation hardened mos devices and methods of fabrication
1372015010862604/23/15Multilevel leadframe
1382015010896904/23/15On-chip linear variable differential transformer
1392015010907004/23/15Dielectric waveguide signal divider
1402015011013004/23/15Dynamic medium switching for hybrid networks
1412015011016304/23/15Phy payload over multiple tone masks using single tone mask phy header information
1422015011131804/23/15Heterogeneous integration of memory and split-architecture processor
1432015011134404/23/15Method of fabricating a circuit
1442015011250204/23/15Low drop-out voltage regulator modeling systems and methods
1452015011303004/23/15Novel approach for significant improvement of fft performance in microcontrollers
1462015011333604/23/15Method for generating descriptive trace gaps
1472015011334704/23/15Commanded jtag test access port operations
1482015011364204/23/15Method and system for preventing unauthorized processor mode switches
1492015010279404/16/15Dc-dc converter using internal ripple with the dcm function
1502015010284104/16/15Circuit for current sensing in high-voltage transistor
1512015010285804/16/15Distributed pole-zero compensation for an amplifier
1522015010339104/16/15Mems device with improved via support planarization
1532015010345104/16/15Bi-directional esd protection circuit
1542015010356304/16/15Automatic timing adjustment for synchronous rectifier circuit
1552015010356604/16/15Systems and methods of ccm primary-side regulation
1562015010368704/16/15Method and device for dynamic optimization of network parameters for optimal performance
1572015010369604/16/15Reliable configuration for network access
1582015010386804/16/15Small highly accurate battery temperature monitoring circuit
1592015010389204/16/15Quantization matrix compression in video coding
1602015010390804/16/15Method and a low complexity transform unit partitioning structure for hevc
1612015010391004/16/15Intra block copy (intrabc) cost estimation
1622015010477704/16/15Context-sensitive and location-aware adaptive learning to improve test effectiveness
1632015010563004/16/15Heart pulse monitor including a fluxgate sensor
1642015010651904/16/15Selective multiple-media access control
1652015009718604/09/15Die testing using top surface test pads
1662015009722504/09/15Trench gate trench field plate semi-vertical semi-lateral mosfet
1672015009723004/09/15Trench gate trench field plate vertical mosfet
1682015009723104/09/15Vertical trench mosfet device in integrated power technologies
1692015009750004/09/15Stator resistance estimation for electric motors
1702015009753904/09/15Systems and methods for real-time inductor current simulation for a switching converter
1712015009754504/09/15Adaptive power adjustment for current output circuit
1722015009757704/09/15Capacitance detection circuit that detects minute changes in capacitance
1732015009759304/09/15Parallel scan distributors and collectors and process of testing integrated circuits
1742015009760004/09/15Pwm controller with drive signal on current sensing pin
1752015009760804/09/15System and controlling circuit input-output timing
1762015009772904/09/15Method and gnss signal tracking
1772015009851504/09/15Automatic gain control for power line communication
1782015009856904/09/15Power line communication (plc) network nodes using cipher then segment security
1792015009932904/09/15Packaged semiconductor device having multilevel leadframes configured as modules
1802015010060804/09/15Reconfiguring an asic at runtime
1812015010081204/09/15Serial bus voltage compensation
1822015010085604/09/15Packet header protection for utility networks
1832015009230804/02/15Scheme to reduce stress of input/ output (io) driver
1842015009138504/02/15Power harvest architecture for near field communication devices
1852015009150204/02/15Shared antenna solution for wireless charging and near field communication
1862015009153504/02/15Directly amplified ripple tracking control scheme for multiphase dc-dc converter
1872015009153804/02/15Method and system for converting a dc voltage
1882015009161604/02/15Technique to realize high voltage io driver in a low voltage bicmos process
1892015009164204/02/15Method and circuitry for multi-stage amplification
1902015009164704/02/15Reducing a settling time after a slew condition in an amplifier
1912015009174204/02/15Apparatus and multilevel coding (mlc) with binary alphabet polar codes
1922015009245404/02/15Interleaved forward converter with wide input and output dynamic range
1932015009247504/02/15Pseudo retention till access mode enabled memory
1942015009273204/02/15Frame structure for medium access in body area networks (ban)
1952015009276504/02/15Implant access in the medical implant communications service band
1962015009286504/02/15Method and frame coding in vertical raster scan order for hevc
1972015009287904/02/15Apparatus and multilevel coding in communication systems
1982015009288604/02/15Apparatus and supporting polar code designs
1992015009459204/02/15Method and low complexity ultrasound based heart rate detection
2002015009570604/02/15Offline at start up of a powered on device
2012015009573004/02/15Blocking the effects of scan chain testing upon a change in scan chain topology
2022015009573104/02/15Reduced signaling interface method & apparatus
2032015008364103/26/15Selective heat seal wafer cover tape (has tape)
2042015008457503/26/15Angle/frequency selector in an electric motor controller architecture
2052015008457603/26/15Low speed and high speed controller architecture for electric motors
2062015008479703/26/15Low power excess loop delay compensation technique for delta-sigma modulators
2072015008515103/26/15Method and fusing images from an array of cameras
2082015008540903/26/15Active esd protection circuit with blocking diode
2092015008572503/26/15Power efficient wi-fi home automation
2102015008574803/26/15System and controlling peak to average power ratio
2112015008588103/26/15Data frame for plc having destination address in the phy header
2122015008588303/26/15Hybrid communication networks
2132015008590103/26/15Circuits, devices, and processes for improved positioning satellite reception and other spread spectrum reception
2142015008610703/26/15Use of three-dimensional top-down views for business analytics
2152015008612503/26/15Adaptive weighted-local-difference order statistics filters
2162015008712703/26/15Mosfet with source side only stress
2172015008713503/26/15Method of forming a trench isolation structure using a sion layer
2182015008841903/26/15Method, system and vehicular navigation using inertial sensors
2192015008929303/26/15Non-volatile logic based processing device
2202015008930103/26/15Recording processor instruction execution cycle and non-cycle count trace events
2212015008931303/26/15Hierarchical access of test access ports in embedded core integrated circuitsgb
2222015008931403/26/15Position independent testing of circuits
2232015008928903/26/15Programmable interface-based validation and debug
2242015007657703/19/15Three dimensional three semiconductor high-voltage capacitors
2252015007707003/19/15Feedforward cancellation of power supply noise in a voltage regulator
2262015007709403/19/15Inductive position sensing with single channel interface to multiple resonant sensors
2272015007758203/19/15Method and system for adapting a device for enhancement of images
2282015007800103/19/15Laser speckle reduction for uniform illumination
2292015007819803/19/15Simple mesh network for wireless transceivers
2302015007969803/19/15Thermal treatment for reducing transistor performance variation in ferroelectric memories
2312015007988603/19/15Permeated grooving in cmp polishing pads
2322015008200403/19/15Faster and more efficient different precision sum of absolute differences for dynamically configurable block searches for motion estimation
2332015008210503/19/15Error prediction in logic and memory devices
2342015008211003/19/153d stacked die test architecture
2352015008226403/19/15Minimizing the use of chip routing resources when using timestamped instrumentation data
2362015006801303/12/15Current, temperature or electromagnetic field actuated fasteners
2372015006951603/12/15Inner l-spacer for replacement gate flow
2382015006957203/12/15Multilayer high voltage isolation barrier in an integrated circuit
2392015006960003/12/15Embedded silver nanomaterials into die backside to enhance package performance and reliability
2402015006994203/12/15Tri-stating brushless dc motor phase for direct detection of back emf zero cross
2412015006999203/12/15Reference generator circuit with dynamically tracking threshold
2422015007004503/12/15Ultra fast transistor threshold voltage extraction
2432015007006103/12/15Dual-port negative level sensitive reset preset data retention latch
2442015007006303/12/15Low power clock gated flip-flops
2452015007008803/12/15Circuits and methods for cancelling nonlinear distortions in pulse width modulated sequences
2462015007011103/12/15System for transmitting information between circuits
2472015007074903/12/15Micromirror apparatus and methods
2482015007085003/12/15Three-dimensional power supply module with passive stacked over cavity
2492015007094903/12/15Device for transfering power from a first circuit to a second circuit



ARCHIVE: New 2015 2014 2013 2012 2011 2010 2009



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