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Texas Instruments, Inc.orporated patents


      
Recent patent applications related to Texas Instruments, Inc.orporated. Texas Instruments, Inc.orporated is listed as an Agent/Assignee. Note: Texas Instruments, Inc.orporated may have other listings under different names/spellings. We're not affiliated with Texas Instruments, Inc.orporated, we're just tracking patents.

ARCHIVE: New 2014 2013 2012 2011 2010 2009 | Company Directory "T" | Texas Instruments, Inc.orporated-related inventors



Power amplifier control circuits

Texas Instruments

Power amplifier control circuits

Positive edge flip-flop with dual-port slave latch

Texas Instruments

Positive edge flip-flop with dual-port slave latch

Positive edge flip-flop with dual-port slave latch

Texas Instruments

Sample adaptive offset (sao) filtering in video coding

Search recent Press Releases: Texas Instruments, Inc.orporated-related press releases
Count Application # Date Texas Instruments, Inc.orporated patents (updated weekly) - BOOKMARK this page
12014034660911/27/14 new patent  Cmos process to improve sram yield
22014034711311/27/14 new patent  Positive edge flip-flop with dual-port slave latch
32014034711411/27/14 new patent  Negative edge flip-flop with dual-port slave latch
42014034712411/27/14 new patent  Power amplifier control circuits
52014034763411/27/14 new patent  Multi-spatial light modulator image display projector architectures using solid state light sources
62014034832811/27/14 new patent  Signal quality estimation and control
72014035166511/27/14 new patent  Interface to full and reduced pin jtag devices
82014033967211/20/14Wafer die separation
92014033967311/20/14Wafer processing
102014034005811/20/14Nmos ldo psrr improvement using power supply noise cancellation
112014034117211/20/14Allocation and logical to physical mapping of scheduling request indicator channel in wireless networks
122014034127111/20/14Method and apparatus of hevc de-blocking filter
132014034128711/20/14Sample adaptive offset (sao) filtering in video coding
142014034130811/20/14Optimized edge order for de-blocking filter
152014033376511/13/14Opportunistic structured light
162014033377611/13/14Analytics-drived summary views for surveillance networks
172014033378211/13/14View-assisted image stabilization system and method
182014033435511/13/14Dynamic reconfiguration of uplink transmission in a tdd wireless communication system
192014033448911/13/14Openflow match and action pipeline structure
202014033458111/13/14Plural circuit selection using role reversing control inputs
212014033581111/13/14Method, system and apparatus for filtering a signal with reduced delay
222014033750111/13/14Integrated circuits, systems, apparatus, packets and processes utilizing path diversity for media over packet applications
232014033767811/13/14Scan topology discovery in target systems
242014033767911/13/14Jtag bus communication method and apparatus
252014033796511/13/14Access to development environment of another with access to intranet data
262014032701111/06/14Iii-nitride transistor layout
272014032704711/06/14Fet dielectric reliability enhancement
282014032708211/06/14Sram well-tie with an uninterrupted grated first poly and first contact patterns in a bit cell array
292014032737911/06/14Position sensorless drive system and method for permanent magnet motors
302014032738011/06/14Circuits and methods of determining position and velocity of a rotor
312014032748611/06/14Rc oscillator
322014032778211/06/14Universal remote control with object recognition
332014032811511/06/14Positive edge preset reset flip-flop with dual-port slave latch
342014032818011/06/14Structure for implementing openflow all group buckets using egress flow table entries
352014032834411/06/14Packet processing match and action pipeline structure with dependency calculation removing false dependencies
362014032835311/06/14Dynamic resolution adjustment for digital converters
372014032937011/06/14Layer transfer of silicon onto iii-nitride material for heterogenous integration
382014031992110/30/14Circuit and method for extracting amplitude and phase information in a resonant system
392014032004510/30/14Circuits and methods for driving eccentric rotating mass motors
402014032019110/30/14Differential analog signal processing stage with reduced even order harmonic distortion
412014032117010/30/14Integrated primary startup bias and mosfet driver
422014032160110/30/14Active shield for x-ray computed tomography machine
432014032493610/30/14Processor for solving mathematical operations
442014031247410/23/14Semiconductor package with wire bonding
452014031412410/23/14Circuits and methods for determining the temperature of a transistor
462014030521510/16/14Ultrasonic flow meter
472014030633210/16/14Integrating multi-output power converters having vertically stacked semiconductor chips
482014030673710/16/14Low-power voltage mode high speed driver
492014030676410/16/14Circuits and methods for compensating for miller capacitance
502014030781010/16/14Time-domain windowing function
512014030781310/16/14Symbol-wise channel tracking for sun ofdm
522014030784110/16/14Snr dependent channel tracking for sun ofdm
532014030995510/16/14Determining power consumption
542014031044410/16/14Dynamic balancing of bus bandwidth across multiple routes
552014031050310/16/14Memory interleaving on memory channels
562014030668910/16/14High resolution current pulse analog measurement
572014029965310/09/14Micromirror array assembly
582014030033810/09/14Circuits and methods for current to voltage conversion
592014030034210/09/14Tracking energy consumption using a boost technique
602014030034310/09/14Tracking energy consumption using a sepic-converter technique
612014030098410/09/14Circuits and methods for cancelling a reflected wave
622014030111210/09/14Tracking energy consumption using a fly-back converter technique
632014030117310/09/14Differential laser diode driver apparatus and systems
642014030146510/09/14Video coding using intra block copy
652014030150810/09/14Automatic gain control in a receiver
662014030267210/09/14Method of forming metal contacts in the barrier layer of a group iii-n hemt
672014030267310/09/14Method of forming metal contacts with low contact resistances in a group iii-n hemt
682014030274010/09/14Toy building block with embedded integrated circuit
692014030391010/09/14Extended range adc flow meter
702014030456310/09/14Position independent testing of circuits
712014030456410/09/14Scan frame based test access mechanisms
722014029039810/02/14Accelerometer-aided gyroscope
732014029121110/02/14Sorting carbon nanotubes
742014029182210/02/14Integrated circuit package
752014029235410/02/14Capacitive sensor
762014029236110/02/14Testing integrated circuit packaging for output short circuit current
772014029238310/02/14Circuits and methods for asymmetric aging prevention
782014029303010/02/14Real time math using a camera
792014029429010/02/14Projector-camera misalignment correction for structured light systems
802014029809410/02/14Processor power measurement
812014029823710/02/14Radial based user interface on touch sensitive screen
822014028472509/25/14Mos transistor structure and method of forming the structure with vertically and horizontally-elongated metal contacts
832014028477909/25/14Semiconductor device having reinforced wire bonds to metal terminals
842014028522909/25/14Testing integrated circuit packaging for shorts
852014028527709/25/14Dielectric waveguide manufactured using printed circuit board technology
862014028592509/25/14Driver circuit
872014028593109/25/14Inductive isolation of capactive load in amplitude limiters
882014028957709/25/14Selectable jtag or trace access with data store and output
892014026462309/18/14Transistor with deep nwell implanted through the gate
902014026482909/18/14Electronic assembly with copper pillar attach substrate
912014026595209/18/14Automated motor control
922014026596609/18/14Disk drive
932014026596909/18/14Detection of back emf in two terminal actuator
942014026608409/18/14Dc-dc converter
952014026631109/18/14Sampled reference supply voltage supervisor
962014026636109/18/14Duty cycle correction circuit
972014026644509/18/14Low-power inverter-based differential amplifier
982014026700709/18/14Interaction detection using structured light images
992014026892309/18/14Magnetic sensing technique for power supply systems
1002014026897109/18/14Tcam with efficient range search capability
1012014026897209/18/14Tcam with efficient multiple dimension range search capability
1022014026939509/18/14Multiple rank cqi feedback for cellular networks
1032014027001109/18/14Pseudorandom sequence generation for ofdm cellular systems
1042014027005709/18/14X-ray sensor and signal processing assembly for an x-ray computed tomography machine
1052014027014909/18/14Clipping based on cepstral distance for acoustic echo canceller
1062014027388309/18/14Low power, low out-of-band harmonic content radio
1072014028176409/18/14Data path memory test
1082014025176009/11/14Die eject assembly for die bonder
1092014025236709/11/14Driver for normally on iii-nitride transistors to get normally-off functionality
1102014025241909/11/14Mems device and method of manufacture
1112014025245709/11/14Multi-landing contact etching
1122014025248509/11/14Low-cost cmos structure with dual gate dielectrics and method of forming the cmos structure
1132014025303909/11/14Battery charger
1142014025309609/11/14Electronic device and method for tracking energy consumption
1152014025314109/11/14Detecting power supply sag in an integrated circuit
1162014025368809/11/14Time of flight sensor binning
1172014025375809/11/14A time-of-flight sensor with charge storage
1182014025423509/11/14Power supply brownout protection circuit and method for embedded fram
1192014025480909/11/14Audio accessory circuitry and method compatible with both msft mode and digital communication mode
1202014025493209/11/14Content adaptive edge and detail enhancement for image and video processing
1212014025704909/11/14Wearable heart monitoring apparatus
1222014025879909/11/14Ip core design supporting user-added scan register option
1232014025882009/11/14Providing information during different stages of a design cycle
1242014024559809/04/14Fabricating a power supply converter with load inductor structured as heat sink
1252014024649309/04/14Novel nfc receiver architecture with improved power sensitivity
1262014024704009/04/14Position detecting system
1272014024707109/04/14Architecture for vbus pulsing in udsm processes
1282014024708409/04/14Specifications support enablement
1292014024717509/04/14Asynchronous to synchronous sampling using an augmented least squares solver
1302014024756209/04/14Dc-dc converter vertically integrated with load inductor structured as heat sink
1312014024764109/04/14Power reduction circuit and method
1322014024764209/04/14Single sided bit line restore for power reduction
1332014024874609/04/14Making a flip-chip assembly with bond fingers
1342014025034209/04/14Automatable scan partitioning for low power using external control
1352014023940908/28/14Non-volatile anti-fuse with consistent rupture
1362014023947308/28/14Wire bonding assembly and method
1372014023950008/28/14Integrated circuit (ic) having electrically conductive corrosion protecting cap over bond pads
1382014023976808/28/14Capacitive micromachined ultrasonic transducer (cmut) with through-substrate via (tsv) substrate plug
1392014023976908/28/14Capacitive micromachined ultrasonic transducer (cmut) device with through-substrate via (tsv)
1402014023992208/28/14Apparatus and methods to control peak current mode controlled power converters using selective noise blanking
1412014023992408/28/14Emulated current ramp for dc-dc converter
1422014023993508/28/14Apparatus and method for selective and adaptive slope compensation in peak current mode controlled power converters
1432014023997708/28/14Capacitive sensing
1442014023997908/28/14Capacitive mems sensor devices
1452014023998308/28/14Capacitive sensing
1462014024006208/28/14Dielectric waveguide with deformable interface surface
1472014024015308/28/14Advanced overload protection in sigma delta modulators
1482014024046108/28/143d camera using flash with structured light
1492014024057308/28/14Shared-field projection and imaging system
1502014024098408/28/14Light emitting diode light bulb and incandescent lamp conversion apparatus
1512014024106608/28/14Dual-function read/write cache for programmable non-volatile memory
1522014024108308/28/14Read assist circuit for an sram technical field
1532014024108908/28/14Read assist circuit for an sram technical field
1542014024135808/28/14Packet processing match and action unit with a vliw action engine
1552014024135908/28/14Packet processing vliw action unit with or-multi-ported instruction memory
1562014024136108/28/14Packet processing match and action unit with configurable memory allocation
1572014024136208/28/14Packet processing match and action unit with configurable bit allocation
1582014024154908/28/14Robust estimation of sound source localization
1592014024162008/28/14Illumination estimation using natural scene statistics
1602014024184608/28/14Pick up tip assembly
1612014024275508/28/14Making an integtated circuit module with dual leadframes
1622014024422308/28/14Method for simulating circuitry by dynamically modifying device models that are problematic for out-of-range voltages
1632014024496608/28/14Packet processing match and action unit with stateful actions
1642014024509008/28/14Parallel scan distributors and collectors and process of testing integrated circuits
1652014024530808/28/14Scheduling jobs in a multi-core processor
1662014023235908/21/14Resonance-based single inductor output-driven dc-dc converter and method
1672014023242208/21/14Built-in self-test methods, circuits and apparatus for concurrent test of rf modules with a dynamically configurable test structure
1682014023243908/21/14Negative edge preset reset flip-flop with dual-port slave latch
1692014023244008/21/14Positive edge reset flip-flop with dual-port slave latch
1702014023244108/21/14Positive edge preset flip-flop with dual-port slave latch
1712014023244208/21/14Negative edge reset flip-flop with dual-port slave latch
1722014023244308/21/14Negative edge preset flip-flop with dual-port slave latch
1732014023293808/21/14Video processing
1742014023327008/21/14Voltage conversion and charging from low bipolar input voltage
1752014023349808/21/14Multiple cqi feedback for cellular networks
1762014023350708/21/14Uplink synchronization management in wireless networks
1772014023358608/21/14Carrier sense multiple access (csma) protocols for power line communications (plc)
1782014023360908/21/14Ultra wideband modulation for body area networks
1792014023647508/21/14Navigation in indoor environments
1802014023647908/21/14Attitude estimation for pedestrian navigation using low cost mems accelerometer in mobile applications, and processing methods, apparatus and systems
1812014023730908/21/14Interconnections for plural and hierarchical p1500 test wrappers
1822014023731108/21/14Sharing a communications link between multiple communications protocols
1832014022511008/14/14Default trim code technique
1842014022511208/14/14Die testing using top surface test pads
1852014022522608/14/14Multi-step deposition of ferroelectric dielectric material
1862014022587408/14/14Touch panel apparatus and methods
1872014022651808/14/14Cqi feedback structure
1882014022670508/14/14Adaptive real-time control of de-emphasis level in a usb 3.0 signal conditioner based on incoming signal frequency range
1892014022673908/14/14Pre-coder selection based on resource block grouping
1902014022766908/14/14Guided tool tips for expression calculation
1912014022780508/14/14Adhesion of ferroelectric material to underlying conductive capacitor plate
1922014022785908/14/14Diffusion resistor with reduced voltage coefficient of resistance and increased breakdown voltage using cmos wells
1932014022787708/14/14Method of forming a metal contact opening with a width that is smaller than the minimum feature size of a photolithographically-defined opening
1942014022789108/14/14Interdigitated chip capacitor assembly
1952014022974808/14/14Apparatus and method for optimizing use of nvdc chargers
1962014022978008/14/14Ieee 1149.1 and p1500 test interfaces combined circuits and processes
1972014022978108/14/14Hierarchical access of test access ports in embedded core integrated circuits
1982014021651708/07/14Vertical thermoelectric structures
1992014021749708/07/14Mosfet with curved trench feature coupling termination trench to active trench
2002014021756808/07/14Semiconductor package with cantilever leads
2012014021794408/07/14Permanent magnet motor with sinusoidal back-emf waveform and related motor controller for position sensorless drives
2022014021801808/07/14Apparatus and method for in situ current measurement in a conductor
2032014021807508/07/14Adaptive slope generator
2042014021809008/07/14Negative edge flip-flop with dual-port slave latch
2052014021809108/07/14Positive edge flip-flop with dual-port slave latch
2062014021811208/07/14Compensation circuitry and method for amplifiers driving large capacitive loads
2072014021917308/07/14Uplink synchronization management in wireless networks
2082014021921808/07/14Downlink 8 tx codebook sub-sampling for csi feedback
2092014021921908/07/14Downlink 8 tx codebook sub-sampling for csi feedback
2102014021927708/07/14Conditional instructions for packet processing
2112014021929408/07/14Rotate-mask-merge and deposit-field instructions for packet processing
2122014022076108/07/14Reduction of polysilicon residue in a trench for polysilicon trench filling processes
2132014022305208/07/14Slave-based memory protection
2142014022312708/07/14Virtual hardware memory protection
2152014021005307/31/14Bi-directional esd protection circuit
2162014021006207/31/14Leadframe-based semiconductor package having terminals on top and bottom surfaces
2172014021006407/31/14Wire bonding method and structure
2182014021051107/31/14Error detection in nonvolatile logic arrays using parity
2192014021053307/31/14Edge rate control gate drive circuit and system for high and low side devices with large driver fet
2202014021053507/31/14Signal level conversion in nonvolatile bitcell array
2212014021076507/31/14Capacitive single layer multi-touch panel having improved response characteristics
2222014021134707/31/14Bi-directional esd protection circuit
2232014021143907/31/14Circuit assembly
2242014021153207/31/14Four capacitor nonvolatile bit cell
2252014021153307/31/14Two capacitor self-referencing nonvolatile bitcell
2262014021157207/31/14Nonvolatile logic array with built-in test result signal
2272014021157607/31/14Nonvolatile logic array with built-in test drivers
2282014021175507/31/14Radio bearer dependent forwarding for handover
2292014021188207/31/14Dynamic determination of volterra kernels for digital pre-distortion
2302014021386307/31/14Low-complexity sensor displacement tolerant pulse oximetry based heart rate measurement
2312014021528207/31/141149.1 tap linking modules
2322014021528307/31/14Integrated circuit with jtag port, tap linking module, and off-chip tap interface port
2332014021542507/31/14Adjustable dummy fill
2342014020338807/24/14Optical sensor with integrated pinhole
2352014020378007/24/14Active charge and discharge current balancing in multiple parallel-connected battery packs
2362014020418207/24/14Multi-sensor video frame synchronization apparatus and methods
2372014020482507/24/14Methods for energy-efficient unicast and multicast transmission in a wireless communication system
2382014020629607/24/14Transceiver with asymmetric matching network
2392014020798407/24/14Signal conitioner
2402014020813407/24/14Host controller interface for universal serial bus (usb) power delivery
2412014020817607/24/14Scan chain in an integrated circuit
2422014020817707/24/14Circuits and methods for dynamic allocation of scan test resources
2432014019748607/17/14Power integrated circuit including series-connected source substrate and drain substrate power mosfets
2442014019753407/17/14Substrate with bond fingers
2452014019787507/17/14Circuits and methods for signal interference mitigation
2462014019789507/17/14Variability and aging sensor for integrated circuits
2472014019841507/17/14Electrostatic discharge protection apparatus
2482014019855007/17/14Frequency multiplier
2492014019897707/17/14Enhancement of stereo depth maps


ARCHIVE: New 2014 2013 2012 2011 2010 2009



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