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Texas Instruments Incorporated patents


      
Recent patent applications related to Texas Instruments Incorporated. Texas Instruments Incorporated is listed as an Agent/Assignee. Note: Texas Instruments Incorporated may have other listings under different names/spellings. We're not affiliated with Texas Instruments Incorporated, we're just tracking patents.

ARCHIVE: New 2015 2014 2013 2012 2011 2010 2009 | Company Directory "T" | Texas Instruments Incorporated-related inventors


Search recent Press Releases: Texas Instruments Incorporated-related press releases
Count Application # Date Texas Instruments Incorporated patents (updated weekly) - BOOKMARK this page
12015011542104/30/15 new patent  Method an stopping resin bleed and mold flash on integrated circit lead finishes
22015011592904/30/15 new patent  Method and generating piece-wise linear regulated supply
32015011599004/30/15 new patent  Die stack test architecture and method
42015011669504/30/15 new patent  Light radar signal processing apparatus, systems and methods
52015011741704/30/15 new patent  Enabling coordinated multi-point reception
62015011757504/30/15 new patent  Method, system and carrier frequency offset correction and channel estimation
72015011886104/30/15 new patent  Czochralski substrates having reduced oxygen donors
82015012002604/30/15 new patent  Analog-to-digital converter
92015012072604/30/15 new patent  Using audio cues to improve object retrieval in video
102015012104304/30/15 new patent  Computer and methods for solving math functions
112015012111904/30/15 new patent  Plural circuit selection using role reversing control inputs
122015011602704/30/15 new patent  Unified bandgap voltage curvature correction circuit
132015010803804/23/15Tape and reel cover tape to improve die sticking issues
142015010858804/23/15Radiation hardened mos devices and methods of fabrication
152015010862604/23/15Multilevel leadframe
162015010896904/23/15On-chip linear variable differential transformer
172015010907004/23/15Dielectric waveguide signal divider
182015011013004/23/15Dynamic medium switching for hybrid networks
192015011016304/23/15Phy payload over multiple tone masks using single tone mask phy header information
202015011131804/23/15Heterogeneous integration of memory and split-architecture processor
212015011134404/23/15Method of fabricating a circuit
222015011250204/23/15Low drop-out voltage regulator modeling systems and methods
232015011303004/23/15Novel approach for significant improvement of fft performance in microcontrollers
242015011333604/23/15Method for generating descriptive trace gaps
252015011334704/23/15Commanded jtag test access port operations
262015011364204/23/15Method and system for preventing unauthorized processor mode switches
272015010279404/16/15Dc-dc converter using internal ripple with the dcm function
282015010284104/16/15Circuit for current sensing in high-voltage transistor
292015010285804/16/15Distributed pole-zero compensation for an amplifier
302015010339104/16/15Mems device with improved via support planarization
312015010345104/16/15Bi-directional esd protection circuit
322015010356304/16/15Automatic timing adjustment for synchronous rectifier circuit
332015010356604/16/15Systems and methods of ccm primary-side regulation
342015010368704/16/15Method and device for dynamic optimization of network parameters for optimal performance
352015010369604/16/15Reliable configuration for network access
362015010386804/16/15Small highly accurate battery temperature monitoring circuit
372015010389204/16/15Quantization matrix compression in video coding
382015010390804/16/15Method and a low complexity transform unit partitioning structure for hevc
392015010391004/16/15Intra block copy (intrabc) cost estimation
402015010477704/16/15Context-sensitive and location-aware adaptive learning to improve test effectiveness
412015010563004/16/15Heart pulse monitor including a fluxgate sensor
422015010651904/16/15Selective multiple-media access control
432015009718604/09/15Die testing using top surface test pads
442015009722504/09/15Trench gate trench field plate semi-vertical semi-lateral mosfet
452015009723004/09/15Trench gate trench field plate vertical mosfet
462015009723104/09/15Vertical trench mosfet device in integrated power technologies
472015009750004/09/15Stator resistance estimation for electric motors
482015009753904/09/15Systems and methods for real-time inductor current simulation for a switching converter
492015009754504/09/15Adaptive power adjustment for current output circuit
502015009757704/09/15Capacitance detection circuit that detects minute changes in capacitance
512015009759304/09/15Parallel scan distributors and collectors and process of testing integrated circuits
522015009760004/09/15Pwm controller with drive signal on current sensing pin
532015009760804/09/15System and controlling circuit input-output timing
542015009772904/09/15Method and gnss signal tracking
552015009851504/09/15Automatic gain control for power line communication
562015009856904/09/15Power line communication (plc) network nodes using cipher then segment security
572015009932904/09/15Packaged semiconductor device having multilevel leadframes configured as modules
582015010060804/09/15Reconfiguring an asic at runtime
592015010081204/09/15Serial bus voltage compensation
602015010085604/09/15Packet header protection for utility networks
612015009230804/02/15Scheme to reduce stress of input/ output (io) driver
622015009138504/02/15Power harvest architecture for near field communication devices
632015009150204/02/15Shared antenna solution for wireless charging and near field communication
642015009153504/02/15Directly amplified ripple tracking control scheme for multiphase dc-dc converter
652015009153804/02/15Method and system for converting a dc voltage
662015009161604/02/15Technique to realize high voltage io driver in a low voltage bicmos process
672015009164204/02/15Method and circuitry for multi-stage amplification
682015009164704/02/15Reducing a settling time after a slew condition in an amplifier
692015009174204/02/15Apparatus and multilevel coding (mlc) with binary alphabet polar codes
702015009245404/02/15Interleaved forward converter with wide input and output dynamic range
712015009247504/02/15Pseudo retention till access mode enabled memory
722015009273204/02/15Frame structure for medium access in body area networks (ban)
732015009276504/02/15Implant access in the medical implant communications service band
742015009286504/02/15Method and frame coding in vertical raster scan order for hevc
752015009287904/02/15Apparatus and multilevel coding in communication systems
762015009288604/02/15Apparatus and supporting polar code designs
772015009459204/02/15Method and low complexity ultrasound based heart rate detection
782015009570604/02/15Offline at start up of a powered on device
792015009573004/02/15Blocking the effects of scan chain testing upon a change in scan chain topology
802015009573104/02/15Reduced signaling interface method & apparatus
812015008364103/26/15Selective heat seal wafer cover tape (has tape)
822015008457503/26/15Angle/frequency selector in an electric motor controller architecture
832015008457603/26/15Low speed and high speed controller architecture for electric motors
842015008479703/26/15Low power excess loop delay compensation technique for delta-sigma modulators
852015008515103/26/15Method and fusing images from an array of cameras
862015008540903/26/15Active esd protection circuit with blocking diode
872015008572503/26/15Power efficient wi-fi home automation
882015008574803/26/15System and controlling peak to average power ratio
892015008588103/26/15Data frame for plc having destination address in the phy header
902015008588303/26/15Hybrid communication networks
912015008590103/26/15Circuits, devices, and processes for improved positioning satellite reception and other spread spectrum reception
922015008610703/26/15Use of three-dimensional top-down views for business analytics
932015008612503/26/15Adaptive weighted-local-difference order statistics filters
942015008712703/26/15Mosfet with source side only stress
952015008713503/26/15Method of forming a trench isolation structure using a sion layer
962015008841903/26/15Method, system and vehicular navigation using inertial sensors
972015008929303/26/15Non-volatile logic based processing device
982015008930103/26/15Recording processor instruction execution cycle and non-cycle count trace events
992015008931303/26/15Hierarchical access of test access ports in embedded core integrated circuitsgb
1002015008931403/26/15Position independent testing of circuits
1012015008928903/26/15Programmable interface-based validation and debug
1022015007657703/19/15Three dimensional three semiconductor high-voltage capacitors
1032015007707003/19/15Feedforward cancellation of power supply noise in a voltage regulator
1042015007709403/19/15Inductive position sensing with single channel interface to multiple resonant sensors
1052015007758203/19/15Method and system for adapting a device for enhancement of images
1062015007800103/19/15Laser speckle reduction for uniform illumination
1072015007819803/19/15Simple mesh network for wireless transceivers
1082015007969803/19/15Thermal treatment for reducing transistor performance variation in ferroelectric memories
1092015007988603/19/15Permeated grooving in cmp polishing pads
1102015008200403/19/15Faster and more efficient different precision sum of absolute differences for dynamically configurable block searches for motion estimation
1112015008210503/19/15Error prediction in logic and memory devices
1122015008211003/19/153d stacked die test architecture
1132015008226403/19/15Minimizing the use of chip routing resources when using timestamped instrumentation data
1142015006801303/12/15Current, temperature or electromagnetic field actuated fasteners
1152015006951603/12/15Inner l-spacer for replacement gate flow
1162015006957203/12/15Multilayer high voltage isolation barrier in an integrated circuit
1172015006960003/12/15Embedded silver nanomaterials into die backside to enhance package performance and reliability
1182015006994203/12/15Tri-stating brushless dc motor phase for direct detection of back emf zero cross
1192015006999203/12/15Reference generator circuit with dynamically tracking threshold
1202015007004503/12/15Ultra fast transistor threshold voltage extraction
1212015007006103/12/15Dual-port negative level sensitive reset preset data retention latch
1222015007006303/12/15Low power clock gated flip-flops
1232015007008803/12/15Circuits and methods for cancelling nonlinear distortions in pulse width modulated sequences
1242015007011103/12/15System for transmitting information between circuits
1252015007074903/12/15Micromirror apparatus and methods
1262015007085003/12/15Three-dimensional power supply module with passive stacked over cavity
1272015007094903/12/15Device for transfering power from a first circuit to a second circuit
1282015007107703/12/15Flow control for powerline communications
1292015007130603/12/15Time and frequency diversity modulation system and method
1302015007136403/12/15Power line communication using padding to overcome interleaver failings
1312015007138003/12/15Method and circuitry for transmitting data
1322015007244303/12/15Method of etching ferroelectric capacitor stack
1332015007379503/12/15User programmable voice command recognition based on sparse features
1342015007430603/12/15Single wire communications interface and protocol
1352015007431803/12/15Methods and systems for multimedia data processing
1362015007447903/12/15Method and test connectivity, communication, and control
1372015006012303/05/15Locking dual leadframe for flip chip on leadframe packages
1382015006094903/05/15Fet dielectric reliability enhancement
1392015006103403/05/15Devices having inhomogeneous silicide schottky barrier contacts
1402015006108103/05/15Crack deflector structure for improving semiconductor device robustness against saw-induced damage
1412015006110303/05/15Embedded die package
1422015006152103/05/15Method and calculating an average value of an inaccessible current from an acessible current
1432015006152203/05/15Method and calculating an average value of an inaccessible current from an acessible current
1442015006161403/05/15Method and calculating an average value of an inaccessible current from an acessible current
1452015006163603/05/15Automatic calibration active and reactive power measurement
1462015006173903/05/15Dual-port negative level sensitive data retention latch
1472015006176703/05/15Telescopic amplifier with improved common mode settling
1482015006190703/05/15Technique for excess loop delay compensation in delta-sigma modulators
1492015006197603/05/15Multi-focus heads-up display using single picture generator unit
1502015006198803/05/15Adaptive power savings on a device display
1512015006230603/05/15System and methods for depth imaging using conventional ccd image sensors
1522015006235403/05/15Method and system for capturing images with a front-facing camera
1532015006254203/05/15Automatic keystone correction in a projection system
1542015006255803/05/15Time-of-flight (tof) assisted structured light imaging
1552015006328503/05/15Non-beacon network communications using frequency subbands
1562015006357503/05/15Acoustic sound signature detection based on sparse features
1572015006358303/05/15Method and system for active noise cancellation
1582015006649503/05/15Robust feature extraction using differential zero-crossing countes
1592015006649703/05/15Cloud based adaptive learning for distributed sensors
1602015006649803/05/15Analog to information sound signature detection
1612015006700803/05/15Determining median value of an array on vector simd architectures
1622015006711903/05/15Dynamic programming and control of networked sensors and microcontrollers
1632015006742603/05/15Packet based integrated circuit testing
1642015006742703/05/15Gating tap register control bus and auxiliary/wrapper test bus
1652015005358602/26/15Carrier tape
1662015005408402/26/15Silicide formation due to improved sige faceting
1672015005414502/26/15Integrated circuit package with die attach paddle having at least one recessed portion
1682015005452802/26/15Embedded sar based active gain capacitance measurement system and method
1692015005454402/26/15Dual-port positive level sensitive preset data retention latch
1702015005454502/26/15Dual-port positive level sensitive reset preset data retention latch
1712015005455602/26/15Dual-port negative level sensitive reset data retention latch
1722015005455702/26/15Dual-port negative level sensitive preset data retention latch
1732015005456002/26/15Dc offset correction with low frequency signal support circuits and methods
1742015005477202/26/15Low noise capacitive sensor with integrated bandpass filter
1752015005562402/26/15Mapping schemes for secondary synchronization signal scrambling
1762015005572402/26/15Transmission modes and signaling for uplink mimo support or single tb dual-layer transmission in lte uplink
1772015005693402/26/15Multi-mode crystal oscillators
1782015005868802/26/15System and sharing a communications link between multiple communications protocols
1792015005868902/26/15High speed double data rate jtag interface
1802015004886602/19/15Cascoded h-bridge pre-driver
1812015004887202/19/15Dual-port positive level sensitive reset data retention latch
1822015004980502/19/15Coding unit quantization parameters in video coding
1832015005146802/19/15Blood pulse measurement based on capacitive sensing
1842015005241202/19/15Selectable jtag or trace access with data store and output
1852015004067102/12/15Structural health monitoring system and method
1862015004119002/12/15High voltage polymer dielectric capacitor isolation device
1872015004190702/12/15Ic with floating buried layer ring for isolation of embedded islands
1882015004199402/12/15Semiconductor package having recessed solder terminals
1892015004224302/12/15Power-over-ethernet (poe) control system
1902015004230202/12/15Power management apparatus with rapid short response and full load recovery
1912015004230802/12/15Fast high-side power fet gate sense circuit for high voltage applications
1922015004239002/12/15Dual-port positive level sensitive data retention latch
1932015004339602/12/15Dynamic signaling of the downlink and uplink subframe allocation for a tdd wireless communication system
1942015004359602/12/15Frequency diversity modulation system and method
1952015004362802/12/15Serdes communications with retiming receiver supporting link training
1962015004369902/12/15Digital phase locked loop
1972015004483002/12/15Hard mask for source/drain epitaxy control
1982015004484802/12/15High voltage hybrid polymeric-ceramic dielectric capacitor
1992015004565002/12/15Blood flow measurement system based on inductive sensing
2002015004670302/12/15Target directed joining algorithm for multi-pan networks
2012015004670402/12/15Target directed joining algorithm for multi-pan networks
2022015003513002/05/15Integrated circuit with stress isolation
2032015003536502/05/15System and controlling power delivered to a powered device through a communication cable
2042015003547702/05/15Method and apparatus of fast battery charging with universal high power input source
2052015003551102/05/15Low power switching mode regulator having automatic pfm and pwm operation
2062015003671902/05/15Thermometer device and making
2072015003673802/05/15Method and real-time sao parameter estimation
2082015003699902/05/15Viewer attention controlled video playback
2092015003793802/05/15Packaging a semiconductor device having wires with polymerized insulator skin
2102015003795202/05/15Recessed channel insulated-gate field effect transistor with self-aligned gate and increased channel length
2112015003818702/05/15Address space partitioning and filtering for discretionary wireless connection response
2122015003915402/05/15Method, system and reducing the effect of inertial sensor's error in a vehicular navigation
2132015003992202/05/15Dynamic low power states characterization
2142015004013602/05/15System constraints-aware scheduler for heterogeneous computing architecture
2152015002790801/29/15Multiple-cavity vapor cell structure for micro-fabricated atomic clocks, magnetometers, and other devices
2162015002879001/29/15Current regulation blanking time apparatus and methods
2172015002886601/29/15Vapor cell structure having cavities connected by channels for micro-fabricated atomic clocks, magnetometers, and other devices
2182015002892201/29/15Transistor switch with temperature compensated vgs clamp
2192015002894101/29/15Controlled power switch chain sequencing for both power up and power down of a power domain
2202015002894301/29/15Reconfigurable power switch chains for efficient dynamic power saving
2212015002894901/29/15High voltage input circuit for a differential amplifier
2222015002934401/29/15Video output supervisor
2232015002976201/29/15Voltage converter compensation apparatus and methods
2242015002977301/29/15Context protection for a column interleaved memory
2252015003001001/29/15Synchronized channel access in coexisting wireless networks
2262015003009901/29/15Circuits and methods for reducing the amplitude of complex signals
2272015003117701/29/15Method of cmos manufacturing utilizing multi-layer epitaxial hardmask films for improved epi profile
2282015003117801/29/15Method of cmos manufacturing utilizing multi-layer epitaxial hardmask films for improved gate spacer control
2292015003138701/29/15Compensation of the signal attenuation by human body in indoor wi-fi positioning
2302015003294601/29/15Methods, apparatus, and systems for secure demand paging and other paging operations for processor devices
2312015003295101/29/15Methods, apparatus, and systems for secure demand paging and other paging operations for processor devices
2322015003303801/29/15Methods, apparatus, and systems for secure demand paging and other paging operations for processor devices
2332015003308801/29/15Reduced signaling interface method & apparatus
2342015002161401/22/15Controlled on and off time scheme for monolithic cascoded power transistors
2352015002168701/22/15Semiconductor structure and forming the semiconductor structure with deep trench isolation structures
2362015002170601/22/15Integrated circuit and forming the integrated circuit with improved logic transistor performance and sram transistor yield
2372015002172101/22/15Integrated circuit package and method
2382015002174001/22/15Integration of the silicon impatt diode in an analog technology
2392015002176201/22/15Semiconductor substrate having stress-absorbing surface layer
2402015002212901/22/15Hybrid controller for brushless dc motor
2412015002217201/22/15Dc to dc converter
2422015002225801/22/15Transistor switch including independent control of turn-on and slew rate
2432015002263201/22/15Hierarchical binary structured light patterns
2442015002264201/22/15Super-resolution in structured light imaging
2452015002264401/22/15Adaptive structured light patterns
2462015002264901/22/15Controlling image focus in real-time using gestures and depth sensor data
2472015002269301/22/15Wide dynamic range depth imaging
2482015002269701/22/15Projector auto-focus correction with the aid of a camera
2492015002295601/22/15Electronic pull tab for battery protection



ARCHIVE: New 2015 2014 2013 2012 2011 2010 2009



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