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Texas Instruments Incorporated
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Texas Instruments Incorporated patents

Recent patent applications related to Texas Instruments Incorporated. Texas Instruments Incorporated is listed as an Agent/Assignee. Note: Texas Instruments Incorporated may have other listings under different names/spellings. We're not affiliated with Texas Instruments Incorporated, we're just tracking patents.

ARCHIVE: New 2017 2016 2015 2014 2013 2012 2011 2010 2009 | Company Directory "T" | Texas Instruments Incorporated-related inventors

Date Texas Instruments Incorporated patents (updated weekly) - BOOKMARK this page
05/18/17 new patent  Method and automated surge stress testing using voltage and current waveforms
05/18/17 new patent  Wafer scale testing using a 2 signal jtag interface
05/18/17 new patent  Buffer sample size control for variable chirp radar
05/18/17 new patent  Usb interface circuit and low power operation
05/18/17 new patent  Streaming engine with cache-like stream data storage and lifetime tracking
05/18/17 new patent  Port controller with power contract negotiation capability
05/18/17 new patent  Method of forming a bicmos semiconductor chip that increases the betas of the bipolar transistors
05/18/17 new patent  Method of improving bipolar device signal to noise performance by reducing the effect of oxide interface trapping centers
05/18/17 new patent  Distributed pole-zero compensation for an amplifier
05/18/17 new patent  High dynamic range ask wake-up receiver
05/18/17 new patent  Scaled power line based network
05/18/17 new patent  Method and network communication using a physical layer (phy) data frame having a phy header that includes a destination address field
05/18/17 new patent  Intra/inter mode decision for predictive frame encoding
05/18/17 new patent  Image compression
05/18/17 new patent  Lte transmission mask adjustment providing improved performance and reduced interference
05/18/17 new patent  Feed forward controlled voltage to current source for led driver
05/11/17Optimized regenerative braking control of electric motors using look-up tables
05/11/17Response collector circuitry coupled with through silicon via and tap
05/11/17System and sharing a communications link between multiple communications protocols
05/11/17Two address translations from a single table look-asside buffer read
05/11/17Method and system for file storage and access
05/11/17Aware variable fill pattern generator
05/11/17Down scaling images in a computer vision system
05/11/17Background memory test apparatus and methods
05/11/17Buffer stack for group iiia-n devices
05/11/17System and mitigating oxide growth in a gate dielectric
05/11/17Deep trench isolation with tank contact grounding
05/11/17Poly gate extension design methodology to improve cmos performance in dual stress liner process flow
05/11/17Smart in-situ chamber clean
05/11/17Compensated well esd diodes with reduced capacitance
05/11/17Mos transistor structure and forming the structure with vertically and horizontally-elongated metal contacts
05/11/17Graphene fet with graphitic interface layer at contacts
05/11/17Low-stress low-hydrogen lpcvd silicon nitride
05/11/17Delta-sigma adc with wait-for-sync feature
05/11/17Guided near field communication for short range data communication
05/11/17Ctle gear shifting to enable cdr frequency lock in wired communication
05/11/17Led drive apparatus, systems and methods
05/04/17Methods and intrinsically safe laser sourced illumination
05/04/17Magnetically shielded probe card
05/04/17Serial i/o using jtag tck and tms signals
05/04/17Systems and methods for determining battery state of charge
05/04/17Integrated force sensing element
05/04/17Method and system for boot time optimization of embedded multiprocessor systems
05/04/17Scalable boot options for a processor/controller
05/04/17Method for comprehensive integration verification of mixed-signal circuits
05/04/17Automatic feature point detection for calibration of multi-camera systems
05/04/17Area-efficient parallel test data path for embedded memories
05/04/17Split-gate lateral extended drain mos transistor structure and process
05/04/17Semiconductor systems having premolded dual leadframes
05/04/17Lead frame assembly
05/04/17Construction of a hall-effect sensor in an isolation region
05/04/17Trench gate trench field plate vertical mosfet
05/04/17Poly sandwich for deep trench fill
05/04/17High efficiency dc-dc converter with active shunt to accommodate high input voltage transients
05/04/17System and improving efficiency for quasi-square wave power converters
05/04/17Trifilar voltage controlled oscillator
05/04/17Digital clock-duty-cycle correction
05/04/17Digital clock-duty-cycle correction
05/04/17Digitally reconfigurable ultra-high precision internal oscillator
05/04/17R2r digital-to-analog converter circuit
05/04/17Methods and determining nearfield localization using phase and rssi delivery
05/04/17Database-less authentication with physically unclonable functions
05/04/17Context adaptive binary arithmetic coding (cabac) with scalable throughput and coding efficiency
05/04/17Low-complexity two-dimensional (2d) separable transform design with transpose buffer management
05/04/17Parallel motion estimation in video coding
Patent Packs
04/27/17Material determination by sweeping a range of frequencies
04/27/17Ultrasonic transducer bi-modal system responses
04/27/17Scan response reuse method and apparatus
04/27/17Rf/mm-wave peak detector with high-dynamic range calibration
04/27/17Ultrasonic transducer system and method using broadband system responses
04/27/17Memory optimized gnss correlator
04/27/17Method to specify or extend the number of constant bits employing an constant extension slot in the same execute packet in a vliw processor
04/27/17Conditional execution specification of instructions using conditional extension slots in the same execute packet in a vliw processor
04/27/17Image synthesis method with dsp and gpu
04/27/17Time-based frequency tuning of analog-to-information feature extraction
04/27/17Integrated power package
04/27/17Isolation of circuit elements using front side deep trench etch
04/27/17Isolated capacitive power transfer
04/27/17Back emf monitor for motor control
04/27/17Resonant circuit calibration
Patent Packs
04/27/17Simultaneous lvds i/o signaling method and apparatus
04/27/17Sample adaptive offset (sao) filtering in video coding
04/27/17Methods and systems for encoding pictures associated with video data
04/20/17Test systems and methods of testing devices
04/20/17Nonvolatile logic memory for computing module reconfiguration
04/20/17Integrated circuit assembly
04/20/17Power-on reset circuit with reset transition based on vt
04/20/17Analog to digital converter
04/20/17Analog to digital convertor error rate reduction
04/13/17Detecting power supply sag in an integrated circuit
04/13/17Scan testing system, method and apparatus
04/13/17Integrated circuit package mold assembly
04/13/17Scan testable through silicon vias
04/13/17Adaptive bus voltage auto-selection system
04/13/17Asynchronous state estimation and control in a field-oriented control architecture
04/13/17Low latency data transfer in a system for wireless power transmission
04/13/17Security processing engines, circuits and systems and adaptive processes and other processes
04/13/17Phy layer parameter for body area network (ban) devices
04/06/17Integrated circuit alignment tool
04/06/17Memory attribute sharing between differing cache levels of multilevel cache
04/06/17Mems electrostatic actuator device for rf varactor applications
04/06/17High voltage bipolar structure for improved pulse width scalability
04/06/17Avalanche energy handling capable iii-nitride transistors
04/06/17Frequency controlled power converter characterization apparatus and methods
04/06/17Adaptive signaling based mfsk modulation scheme for ultrasonic communications
04/06/17Minimum tone separation constrained mfsk scheme for ultrasonic communications
04/06/17Transmitter architecture for photoplethysmography systems
03/30/17High speed double data rate jtag interface
03/30/17Measurement of transceiver performance parameters in a radar system
03/30/17Multi-chip transceiver testing in a radar system
Social Network Patent Pack
03/30/17Method for joint antenna-array calibration and direction of arrival estimation for automotive applications
03/30/17Fault tolerant voltage regulator
03/30/17Secure emulation logic between page attribute table and test interface
03/30/17Plating interconnect for silicon chip
03/30/17Conductive spline for metal gates
03/30/17Dielectric waveguide socket
03/30/17System for launching a signal into a dielectric waveguide
03/30/17Metallic waveguide with dielectric core
03/30/17Noise-shaped power converters
03/30/17Pairwise temporal key creation for secure networks
Patent Packs
03/23/17Ultrasonic flow meter auto-tuning for reciprocal operation of the meter
03/23/17Analog temperature sensor for digital blocks
03/23/17Piecewise correction of errors over temperature without using on-chip temperature sensor/comparators
03/23/17Low noise capacitive sensor with integrated bandpass filter
03/23/17Methods and apparatus to track bit cell current using temperature and voltage dependent reference currents
03/23/17Method of forming a thin film that eliminates air bubbles
03/23/17Integrated circuit with dual stress liner boundary
03/23/17High voltage lateral extended drain mos transistor with improved drift layer contact
03/23/17P-n bimodal transistors
03/23/17Spring biased contact pin assembly
03/23/17Hot plug immunity for circuit protecting against electrostatic discharge events
03/23/17Low-power low-phase-noise oscillator
03/23/17Data and control multiplexing in pusch in wireless networks
03/23/17Signaling signed band offset values for sample adaptive offset (sao) filtering in video coding
03/23/17Transform and quantization architecture for video coding and decoding
03/23/17Method and real-time sao parameter estimation
03/16/17Reduced signaling interface method & apparatus
03/16/17Integrated circuit chip with multiple cores
03/16/17High speed interconnect circuit test method and apparatus
03/16/17Gating tap register control bus and auxiliary/wrapper test bus
03/16/173d tap & scan port architectures
03/16/17Improved core circuit test architecture
03/16/17Method and fmcw radar processing
03/16/17Optimized fast feature detection for vector processors
03/16/17Track and hold with active charge cancellation
03/16/17Semiconductor device having terminals directly attachable to circuit board
03/16/17Segmented power transistor
03/16/17Precharge switch-capacitor circuit and method
03/16/17Load transient and jitter of dc-dc converter
03/16/17Switching converter with improved power density
Patent Packs
03/16/17Ultra-low power comparator with sampling control loop adjusting frequency and/or sample aperture window
03/16/17Guided near field communication for short range data communication
03/16/17Low power packet detection circuit for wlan recievers
03/09/17Low-offset graphene hall sensor
03/09/17Methods and magnetic sensor with integrated calibration mechanism
03/09/17Voltage regulator wake-up
03/09/17Monolithic reference architecture with burst mode support
03/09/17Metal thin film resistor and process
03/09/17Embedded sige process for multi-threshold pmos transistors
03/09/17Methods and optimal fast battery charging
03/09/17System and maintaining battery life
03/09/17Adaptive blanking timer for short circuit detection
03/09/17Methods and multi-channel modem and preamble detection
03/09/17Collaborative meeting presentation system and methods
03/09/17Line-based compression for digital image data
03/09/17Broadcast multicast mode
03/09/17Enabling down link reception of system and control information from intra-frequency neighbors without gaps in the serving cell in evolved-utra systems
03/09/17Re-sampling with reduced power consumption and complexity
03/02/17Regenerative braking controller for electric motors
03/02/17Position sensor
Social Network Patent Pack
03/02/17Seal monitor for probe or test chamber
03/02/17Fluxgate-based current sensor
03/02/17Optimized jtag interface
03/02/17Scan topology discovery in target systems
03/02/17Alternate signaling mechanism using clock and data
03/02/17Test compression in a jtag daisy-chain environment
03/02/17Inductive sensing with differential inductance readout based on sense/reference lc-ring oscillators with a shared capacitor
03/02/17Usb power delivery dead-battery control
03/02/17Touch on glass
03/02/17Aperature filtering for resistive multi-touch distortions
03/02/17Load store circuit with dedicated single or dual bit shift circuit and opcodes for low power accelerator processor
03/02/17Systems and methods for enabling communication between an accessory charger adapter (aca) and an aca-agnostic universal serial bus controller
03/02/17Sense amplifier with offset compensation
03/02/17Semi-hermetic semiconductor package
03/02/17Flat no-lead packages with electroplated edges
03/02/17Semiconductor die substrate with integral heat sink
03/02/17Flip chip backside die grounding techniques
03/02/17Flip chip backside mechanical die grounding techniques
03/02/17Cmos-based thermopile with reduced thermal conductance
03/02/17Methods and high voltage integrated circuit capacitors
Social Network Patent Pack
03/02/17Integrated circuit with lateral flux capacitor
03/02/17Isolated well contact in semiconductor devices
03/02/17Vertical high-voltage mos transistor
03/02/17Dummy gate placement methodology to enhance integrated circuit performance
03/02/17Reduced area power devices using deep trench isolation
03/02/17Current-limiting in an amplifier system
03/02/17Devices with specific termination angles in titanium tungsten layers and methods for fabricating the same
03/02/17Methods and a configurable high-side nmos gate control with improved gate to source voltage regulation
03/02/17Efficient fairness allocation in powerline csma/ca protocols
03/02/17Analog-digital compatible re-sampling
03/02/17Network address assignment and reclamation for hierarchical based rpl networks
03/02/17Authentication of networked devices having low computational capacity
03/02/17Physical downlink control channel and physical hybrid automatic repeat request indicator channel enhancements
02/23/17Ultrasonic transducer device with through-substrate via
02/23/17Hermetically-sealed mems device and its fabrication
02/23/17Mask-less selective plating of leadframe
02/23/17Methods and apparatus to measure and analyze vibration signatures
02/23/17Direct scan access jtag
02/23/17Method and system for ultrasound time-of-flight measurement
02/23/17Using natural movements of a hand-held device to manipulate digital content
02/23/17Packaged semiconductor device having leadframe features preventing delamination
02/23/17Packaged device with additive substrate surface modification
02/23/17Integrated circuit package
02/23/17Electrostatic discharge protection device for high voltage
02/23/17System and improving total harmonic distortion of an amplifier
02/23/17Method and system for compression of radar signals
02/16/17Optical electronic device and fabrication
02/16/17Cpu bist testing of integrated circuits using serial wire debug
02/16/17At-speed test access port operations
02/16/173d stacked die test architecture
Social Network Patent Pack
02/16/17Selectable jtag or trace access with data store and output
02/16/17Chirp frequency non-linearity mitigation in radar systems
02/16/17Wom code emulation of eeprom-type devices
02/16/17Semiconductor memory cell multi-write avoidance encoding apparatus, systems and methods
02/16/17Double side heat dissipation for silicon chip package
02/16/17Conductive through-polymer vias for capacitative structures integrated with packaged semiconductor chips
02/16/17Method to form silicide and contact at embedded epitaxial facet
02/16/17Proximity sensor having light-blocking structure in leadframe and making same
02/16/17Reverse current protection circuit
02/16/17Phase lock loop with dynamic lock ranges
02/16/17Diagnostic monitoring for analog-to-digital converters
02/16/17Analog-to-digital converter
02/16/17Method and system for constraining slice header processing overhead in video coding
02/16/17Id-based control unit-key fob pairing
02/16/17Allocation and logical to physical mapping of scheduling request indicator channel in wireless networks
02/09/17Low power photon counting system
02/09/17Method to improve cmp scratch resistance for non planar surfaces
02/09/17Position detecting system
02/09/17High current limit trim apparatus and methodology
02/09/17Methods and apparatus to create a physically unclonable function
02/09/17Low cost flash memory fabrication flow based on metal gate process
02/09/17Novel substrate contact etch process
02/09/17Zero current detection circuit for converter soft switching control
02/09/17Operational amplifier with class ab output
02/09/17Multiplexer charge injection reduction
02/09/17Continuous tracking of mismatch correction in both analog and digital domains in an interleaved adc
02/09/17Amplifier sharing technique for power reduction in analog-to-digital converter
02/09/17Histogram based error estimation and correction
02/09/17Calibration technique for current steering dac

ARCHIVE: New 2017 2016 2015 2014 2013 2012 2011 2010 2009


This listing is an abstract for educational and research purposes is only meant as a recent sample of applications filed, not a comprehensive history. is not affiliated or associated with Texas Instruments Incorporated in any way and there may be associated servicemarks. This data is also published to the public by the USPTO and available for free on their website. Note that there may be alternative spellings for Texas Instruments Incorporated with additional patents listed. Browse our Agent directory for other possible listings. Page by