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Toshiba America Electronic Components Inc
Toshiba America Electronic Components Inc_20131212
  

Toshiba America Electronic Components Inc patents

Recent patent applications related to Toshiba America Electronic Components Inc. Toshiba America Electronic Components Inc is listed as an Agent/Assignee. Note: Toshiba America Electronic Components Inc may have other listings under different names/spellings. We're not affiliated with Toshiba America Electronic Components Inc, we're just tracking patents.

ARCHIVE: New 2016 2015 2014 2013 2012 2011 2010 2009 | Company Directory "T" | Toshiba America Electronic Components Inc-related inventors




Date Toshiba America Electronic Components Inc patents (updated weekly) - BOOKMARK this page
03/16/17Semiconductor memory device
01/07/16Self-adapting signal communicating system
12/10/15System and extraction of a dynamic range zone image
04/16/15Semiconductor memory with integrated biologic element
10/30/14Stent apparatus with integrated imaging element for in situ detection of buildup of material in a vascular system
10/09/14System and audio kymographic diagnostics
03/13/14Semiconductor device and fabricating the same
02/27/14Needle-shaped profile finfet device
02/27/14Optically reactive masking
01/30/14Protection of under-layer conductive pathway
12/12/13Generation of additional shapes on a photomask for a multiple exposure process
12/05/13Isolated insulating gate structure
10/17/13Formation of a trench silicide
09/19/13Efficient decomposition of layouts
08/01/13Semiconductor device with lateral and vertical channel confinement and fabricating the same
07/04/13Systems and methods for backside threshold voltage adjustment
07/04/13Methods for integration of metal/dielectric interconnects
06/27/13Graded density layer for formation of interconnect structures
05/16/13Formation of sti trenches for limiting pn-junction leakage
01/17/13Cryogenic silicon ion-implantation and recrystallization annealing
12/20/12Semiconductor device with threshold voltage control and fabricating the same
12/13/12Interconnect structure with improved alignment for semiconductor devices
09/27/12Transistor structure and manufacturing method which has channel epitaxial equipped with lateral epitaxial structure
09/27/12Self-aligned silicide formation on source/drain through contact via
09/27/12Specific contact resistivity measurement method, semiconductor device for specific contact resistivity measurement, and manufacturing the same
09/27/12Overlay control method and a semiconductor manufacturing method and apparatus employing the same
09/27/12Ion implanted resist strip with superacid
09/13/12Semiconductor device and fabricating the same
06/07/12Semiconductor device and manufacturing the same
06/07/12Semiconductor device and fabricating the same
05/31/12Metal containing sacrifice material and damascene wiring formation
04/05/12Triple oxidation on dsb substrate
03/22/12Method for processing semiconductor structure and device based on the same
03/15/12Semiconductor device and fabricating the same
03/01/12Semiconductor device with effective work function controlled metal gate
02/23/12Ru cap metal post cleaning method and cleaning chemical
12/08/11Faceted epi shape and half-wrap around silicide in s/d merged finfet
11/24/11Semiconductor device and manufacturing method thereof
11/03/11Method for forming interconnection line and semiconductor structure
10/27/11Semiconductor device and manufacturing methods
09/22/11Strain-preserving ion implantation methods
07/28/11Interconnect structure employing a mn-group viiib alloy liner
06/23/11Semiconductor device and manufacturing the same
12/30/10Semiconductor device with metal gate
12/30/10Semiconductor device on direct silicon bonded substrate with different layer thickness
12/23/10Application of mn for damage restoration after etchback
12/23/10Restoration method using metal for better cd controllability and cu filing
12/16/10Structures of sram bit cells
11/04/10Semiconductor device with metal gate
09/30/10Multiple thickness and/or composition high-k gate dielectrics and methods of making thereof
09/09/10Semiconductor device and manufacturing methods with using non-planar type of transistors
11/26/09Dual stress liner device and method
09/10/09Generating stress in a field effect transistor
09/10/09Maskless selective boron-doped epitaxial growth
08/20/09Contact configuration and method in dual-stress liner semiconductor device
08/13/09Method and system for semiconductor memory
08/06/09Oven for semiconductor wafer
07/30/09Structures of sram bit cells
07/30/09Structures of sram bit cells
07/30/09Method and system for leveling topography of semiconductor chip surface
07/30/09Coating process and equipment for reduced resist consumption
07/16/09Trench sidewall protection by a carbon-rich layer in a semiconductor device
07/09/09Strained-channel fet comprising twist-bonded semiconductor layer
07/09/09Plasma curing of patterning materials for aggressively scaled features
06/11/09Interconnect structure and semiconductor device
Patent Packs
04/23/09Reversely tapered contact structure compatible with dual stress liner process
12/12/13Generation of additional shapes on a photomask for a multiple exposure process







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