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Zing Semiconductor Corporation patents


Recent patent applications related to Zing Semiconductor Corporation. Zing Semiconductor Corporation is listed as an Agent/Assignee. Note: Zing Semiconductor Corporation may have other listings under different names/spellings. We're not affiliated with Zing Semiconductor Corporation, we're just tracking patents.

ARCHIVE: New 2018 2017 2016 2015 2014 2013 2012 2011 2010 2009 | Company Directory "Z" | Zing Semiconductor Corporation-related inventors


Semiconductor structure and forming the same

The present invention relates to a semiconductor structure and a method for forming the same. The method comprises steps of providing a substrate having a dummy gate, forming an elevated semiconductor source/drains epitaxy growing with lower in-situ doping concentration; forming a second elevated semiconductor source/drains epitaxy growing with higher in-situ... Zing Semiconductor Corporation

Hybrid integration fabrication of nanowire gate-all-around ge pfet and polygonal iii-v pfet cmos device

The present invention provides a method of manufacturing nanowire semiconductor device. In the active region of the PMOS the first nanowire is formed with high hole mobility and in the active region of the NMOS the second nanowire is formed with high electron mobility to achieve the objective of improving... Zing Semiconductor Corporation

Method for growing monocrystalline silicon and monocrystalline silicon ingot prepared thereof

This invention provides a method for growing monocrystalline silicon by applying Czochralski method comprising forming a melt of silicon-containing materials in a crucible and pulling the melt for monocrystalline silicon growth, which is characterized by, introducing a gas containing argon during formation of the melt, and, applying a magnetic field... Zing Semiconductor Corporation

Method for growing monocrystalline silicon and monocrystalline silicon ingot prepared thereof

This invention provides a method for growing monocrystalline silicon by applying Czochralski method comprising forming a melt of silicon-containing materials in a crucible and pulling the melt for monocrystalline silicon growth, which is characterized by, the silicon-containing materials comprising a deuterium-implanted nitride-deposited silicon and a monocrystalline silicon, introducing a gas... Zing Semiconductor Corporation

Thermal processing wafer

The present invention relates to a thermal processing method for wafer. A wafer is placed in an environment filled with a gas mixture comprising oxygen gas and deuterium gas, and a rapid thermal processing process is performed on a surface of the wafer. As a result, a denuded zone is... Zing Semiconductor Corporation

Thermal processing wafer

The present invention relates to a thermal processing method for wafer. A wafer is placed in an environment filled with a non-oxygenated gas mixture comprising deuterium gas and at least one kind of low active gas, and a rapid heating processing process is performed on a surface of the wafer... Zing Semiconductor Corporation

Soi substrate and manufacturing method thereof

This invention application provides a method for manufacturing a SOI substrate, and the method comprising: providing a first semiconductor substrate; growing a first insulating layer on a top surface of the first semiconductor substrate for forming a first wafer; irradiating the first semiconductor substrate via a ion beam for forming... Zing Semiconductor Corporation

Soi substrate and manufacturing method thereof

The present invention application provides a method for manufacturing a SOI substrate, and the method comprising: providing a first semiconductor substrate; growing a first insulating layer on a top surface of the first semiconductor substrate for forming a first wafer; implanting a deuterium and hydrogen co-doping layer at a certain... Zing Semiconductor Corporation

Soi substrate and manufacturing method thereof

This invention application provides a method for manufacturing a SOI substrate, and the method comprising: providing a first semiconductor substrate; growing a first insulating layer on a top surface of the first semiconductor substrate for forming a first wafer; irradiating the first semiconductor substrate via a ion beam for forming... Zing Semiconductor Corporation

Complementary nanowire semiconductor device and fabrication method thereof

Present embodiments provide for a complementary nanowire semiconductor device and fabrication method thereof. The fabrication method comprises providing a substrate, wherein the substrate has a NMOS active region, a PMOS active region and a shallow trench isolation (STI) region; forming a plurality of first hexagonal epitaxial wires on the NMOS... Zing Semiconductor Corporation

Complementary nanowire semiconductor device and fabrication method thereof

Present embodiments provide for a complementary nanowire semiconductor device and fabrication method thereof. The fabrication method comprises providing a substrate, wherein the substrate has a NMOS active region, a PMOS active region and a shallow trench isolation (STI) region; forming a plurality of first hexagonal epitaxial wires on the NMOS... Zing Semiconductor Corporation

Metal-ono-vacuum tube charge trap flash (vtctf) nonvolatile memory and the making the same

The present invention relates to a method for preparing vacuum tube flash memory structure, to form a vacuum channel in the flash memory, and using oxide-nitride-oxide (ONO) composite materials as gate dielectric layer, wherein the nitride layer serves as a charge-trap layer to provide a blocking insulating between the gate... Zing Semiconductor Corporation

Soi substrate and manufacturing method thereof

The present invention application provides a method for manufacturing a SOI substrate, and the method comprising: providing a first semiconductor substrate; growing a first insulating layer on a top surface of the first semiconductor substrate for forming a first wafer; implanting a deuterium and hydrogen co-doping layer at a certain... Zing Semiconductor Corporation

Finfet and fabrication method thereof

Present embodiments provide for a FinFET and fabrication method thereof. The fabrication method includes two selective etching processes to form the channel. The FinFET includes a substrate, a shallow trench isolation (STI) layer, a buffer layer, a III-V group material, an oxide-isolation layer, a high-K dielectric layer and a conductor... Zing Semiconductor Corporation

Method for formation of vertical cylindrical gan quantum well transistor

The present invention provides a method for forming a quantum well device having high mobility and high breakdown voltage with enhanced performance and reliability. A method for fabrication of a Vertical Cylindrical GaN Quantum Well Power Transistor for high power application is disclosed. Compared with the prior art, the method... Zing Semiconductor Corporation

Vertical transistor and the fabrication method

A vertical transistor and the fabrication method. The transistor comprises a first surface and a second surface that is opposite to the first surface. A drift region of the first doping type, this drift region is located between the first surface and the second surface; at least one source region... Zing Semiconductor Corporation

Method for making iii-v nanowire quantum well transistor

The present invention provides a field effect transistor and the method for preparing such a filed effect transistor. The filed effect transistor comprises a semiconductor, germanium nanowires, a first III-V compound layer surrounding the germanium nanowires, a semiconductor barrier layer, a gate dielectric layer and a gate electrode sequentially formed... Zing Semiconductor Corporation

High-voltage junctionless device with drift region and the making the same

The present invention discloses a method of forming a high voltage junctionless device with drift region. The drift region formed between the semiconductor channel and the dielectric layer enables the high voltage junctionless device to exhibit higher punch-through voltages and high mobility with better performance and reliability.... Zing Semiconductor Corporation

High voltage junctionless field effect device and its fabrication

A structure and a method of fabrication are disclosed of a high voltage junctionless field effect device. A channel layer and a barrier layer are formed sequentially underneath the gate structure. The width of energy band gap of the barrier layer is wider than that of the channel layer. Thus... Zing Semiconductor Corporation

Method of preparation of iii-v compound layer on large area si insulating substrate

A method for making III-V-on-insulator on large-area Si Substrate wafer by confined epitaxial lateral overgrowth (CELO) has been disclosed. This method, based on selective epitaxy, starting from defining an epitaxy seed window to the Si substrate in a thermal oxide, from which the III-V material will grow.... Zing Semiconductor Corporation

Method for formation of vertical cylindrical gan quantum well transistor

The present invention provides a method for forming a quantum well device having high mobility and high breakdown voltage with enhanced performance and reliability. A method for fabrication of a Vertical Cylindrical GaN Quantum Well Power Transistor for high power application is disclosed. Compared with the prior art, the method... Zing Semiconductor Corporation

Method of forming fin structure on patterned substrate that includes depositing quantum well layer over fin structure

Embodiments provide a quantum well device and the method for forming this device with high mobility and higher punch through voltages. For forming the quantum well device, a buffer layer can be formed on a patterned substrate of a quantum well device. A fin-like structure can be formed through an... Zing Semiconductor Corporation

Vertical transistor and the fabrication method

A vertical transistor and the fabrication method. The transistor comprises a first surface and a second surface that is opposite to the first surface. A drift region of the first doping type, this drift region is located between the first surface and the second surface; at least one source region... Zing Semiconductor Corporation

Method for forming monocrystalline silicon ingot and wafer

The present invention relates to a method for forming monocrystalline silicon ingot and wafer. When forming a monocrystalline silicon ingot, melted silicon is introduced with a gas comprising deuterium atoms to receive the deuterium atoms at interstice sites, and thus the oxygen, carbon and other impurity contained therein are decreased.... Zing Semiconductor Corporation

Method for forming monocrystalline silicon ingot and wafers

The present invention relates to a method for forming monocrystalline silicon ingot and wafers. At first, silica is doped with deuterium atoms which is retained in interstices therein. Then, the silica doped with deuterium atoms is utilized for a Czochralski method to form an ingot, which has few oxygen and... Zing Semiconductor Corporation

Soi structure and fabrication method

Present embodiments provide for A SOI substrate and fabricating method thereof are provided. The fabricating method of SOI substrate comprises: providing a first substrate, wherein a first dielectric layer is formed on the first substrate; implanting deuterium ions into the first substrate, wherein a deuterium-impurity layer is formed in the... Zing Semiconductor Corporation

Complementary metal-oxide-semiconductor field-effect transistor and method thereof

This invention application provides a complementary metal-oxide-semiconductor field-effect transistor and method thereof. The transistor comprises a semiconductor substrate, a N-type field-effect transistor positioned in the semiconductor substrate, and a P-type field-effect transistor positioned in the semiconductor substrate and spaced apart the N-type field-effect transistor. N-type field-effect transistor includes a first... Zing Semiconductor Corporation

Method for making iii-v nanowire quantum well transistor

The present invention provides a filed effect transistor and the method for preparing such a filed effect transistor. The filed effect transistor comprises a semiconductor, germanium nanowires, a first III-V compound layer surrounding the germanium nanowires, a semiconductor barrier layer, a gate dielectric layer and a gate electrode sequentially formed... Zing Semiconductor Corporation

Coms structure and fabrication method thereof

Present embodiments provide for a CMOS structure and a fabrication method thereof. While the source-drain epitaxial material formed in each of the PMOS device region and the NMOS device region, deuterium gas is used as the carrier gas to store the deuterium atoms in the interstice of the source-drain epitaxial... Zing Semiconductor Corporation

Method for forming epitaxial layer

This invention provides a method for forming an epitaxial layer comprising, during formation of the epitaxial layer by vapor phase deposition, introducing a carrier gas containing deuterium. Because of the deuterium atmosphere, the deuterium atoms are introduced in the silicon epitaxial film. During formation of the gate oxide or device,... Zing Semiconductor Corporation

Semiconductor structure and forming the same

The present invention relates to a semiconductor structure and a method for forming the same. The method comprises steps of providing a substrate having a dummy gate, forming a source/drain epitaxy layer doped with deuterium at two sides of the dummy gate on the substrate through a process of chemical... Zing Semiconductor Corporation

Method for forming wafer

This invention provides a method for forming a wafer comprising forming a silicon substrate, and then performing rapid thermal annealing to the substrate to form a passivation layer. The passivation layer reduces the surface roughness of the silicon substrate. During the formation of a gate oxide layer or an interface,... Zing Semiconductor Corporation

Vacuum tube nonvolatile memory and the making the same

The present invention provides a vacuum tube nonvolatile memory and the method of manufacturing it. The vacuum tube nonvolatile memory comprises oxide-nitride-oxide composite structure as gate dielectric layer, wherein the nitride layer can trap charges and provide better insulating block capability between the gate and vacuum channel. The present structure... Zing Semiconductor Corporation

Semiconductor structure and forming method thereof

This invention provides a semiconductor structure and a forming method thereof. The method for forming the semiconductor structure comprises providing a substrate having a dummy gate; forming source-drain regions in the substrate located in the two sides of the dummy gate, wherein the source-drain region is doped with deuterium; removing... Zing Semiconductor Corporation








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