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Acorn Technologies Inc patents


Recent patent applications related to Acorn Technologies Inc. Acorn Technologies Inc is listed as an Agent/Assignee. Note: Acorn Technologies Inc may have other listings under different names/spellings. We're not affiliated with Acorn Technologies Inc, we're just tracking patents.

ARCHIVE: New 2018 2017 2016 2015 2014 2013 2012 2011 2010 2009 | Company Directory "A" | Acorn Technologies Inc-related inventors


Method for depinning the fermi level of a semiconductor at an electrical junction and devices incorporating such junctions

An electrical device in which an interface layer is disposed in between and in contact with a conductor and a semiconductor.. . ... Acorn Technologies Inc

Strained semiconductor-on-insulator by deformation of buried insulator induced by buried stressor

Etching trench isolation structures into a semiconductor structure that includes an upper thin semiconductor layer disposed over a buried insulator layer and a buried compressively strained stressor layer under the buried insulator layer, the compressively strained stressor layer being disposed on an underlying semiconductor substrate, causes edge relaxation of the compressively strained stressor layer. The edge relaxation results in the buried insulation layer being deformed, thus inducing tensile strain in an upper surface of the thin semiconductor layer across at least a first portion of a lateral extent of the thin semiconductor layer between walls of one or more trenches formed by the etching.. ... Acorn Technologies Inc

Method for depinning the fermi level of a semiconductor at an electrical junction and devices incorporating such junctions

An electrical device in which an interface layer is disposed in between and in contact with a conductor and a semiconductor.. . ... Acorn Technologies Inc

Nanowire transistor with source and drain induced by electrical contacts with negative schottky barrier height

A nanowire transistor includes undoped source and drain regions electrically coupled with a channel region. A source stack that is electrically isolated from a gate conductor includes an interfacial layer and a source conductor, and is coaxially wrapped completely around the source region, extending along at least a portion of the source region. ... Acorn Technologies Inc

Mis contact structure with metal oxide conductor

An electrical contact structure (an mis contact) includes one or more conductors (m-layer), a semiconductor (s-layer), and an interfacial dielectric layer (i-layer) of less than 4 nm thickness disposed between and in contact with both the m-layer and the s-layer. The i-layer is an oxide of a metal or a semiconductor. ... Acorn Technologies Inc

Tensile strained semiconductor photon emission and detection devices and integrated photonics system

Tensile strained germanium is provided that can be sufficiently strained to provide a nearly direct band gap material or a direct band gap material. Compressively stressed or tensile stressed stressor materials in contact with germanium regions induce uniaxial or biaxial tensile strain in the germanium regions. ... Acorn Technologies Inc

Method for depinning the fermi level of a semiconductor at an electrical junction and devices incorporating such junctions

An electrical device in which an interface layer is disposed in between and in contact with a conductor and a semiconductor.. . ... Acorn Technologies Inc

Metal contacts to group iv semiconductors by inserting interfacial atomic monolayers

Techniques for reducing the specific contact resistance of metal-semiconductor (group iv) junctions by interposing a monolayer of group v or group iii atoms at the interface between the metal and the semiconductor, or interposing a bi-layer made of one monolayer of each, or interposing multiple such bi-layers. The resulting low specific resistance metal-group iv semiconductor junctions find application as a low resistance electrode in semiconductor devices including electronic devices (e.g., transistors, diodes, etc.) and optoelectronic devices (e.g., lasers, solar cells, photodetectors, etc.) and/or as a metal source and/or drain region (or a portion thereof) in a field effect transistor (fet). ... Acorn Technologies Inc

Soi wafers and devices with buried stressor

A semiconductor structure includes a layer arrangement consisting of, in sequence, a semiconductor-on-insulator layer (soi) over a buried oxide (box) layer over a buried stressor (bs) layer with a silicon bonding layer (bl) intervening between the box and the bs layers. The semiconductor structure may be created by forming the bs layer on a substrate of a first wafer; growing the bl layer at the surface of the bs layer; wafer bonding the first wafer to a second wafer having a silicon oxide layer formed on a silicon substrate such that the silicon oxide layer of the second wafer is bonded to the bl layer of the first wafer, and thereafter removing a portion of the silicon substrate of the second wafer.. ... Acorn Technologies Inc

Strained semiconductor using elastic edge relaxation of a stressor combined with buried insulating layer

An soi wafer contains a compressively stressed buried insulator structure. In one example, the stressed buried insulator (box) may be formed on a host wafer by forming silicon oxide, silicon nitride and silicon oxide layers so that the silicon nitride layer is compressively stressed. ... Acorn Technologies Inc

Insulated gate field effect transistor having passivated schottky barriers to the channel

A transistor having at least one passivated schottky barrier to a channel includes an insulated gate structure on a p-type substrate in which the channel is located beneath the insulated gate structure. The channel and the insulated gate structure define a first and second undercut void regions that extend underneath the insulated gate structure toward the channel from a first and a second side of the insulated gate structure, respectively. ... Acorn Technologies Inc

Communication system determining time of arrival using matching pursuit

A wireless receiver receives location pilots embedded in received symbols and uses the location pilots to detect the first path for every base station the network has designated for the receiver to use in time of arrival estimation. The receiver preferably applies matching pursuit strategies to offer a robust and reliable identification of a channel impulse response's first path. ... Acorn Technologies Inc








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