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Ati Technologies Ulc patents

Recent patent applications related to Ati Technologies Ulc. Ati Technologies Ulc is listed as an Agent/Assignee. Note: Ati Technologies Ulc may have other listings under different names/spellings. We're not affiliated with Ati Technologies Ulc, we're just tracking patents.

ARCHIVE: New 2018 2017 2016 2015 2014 2013 2012 2011 2010 2009 | Company Directory "A" | Ati Technologies Ulc-related inventors

Selecting a default page size in a variable page size tlb

Systems, apparatuses, and methods for selecting default page sizes in a variable page size translation lookaside buffer (tlb) are disclosed. In one embodiment, a system includes at least one processor, a memory subsystem, and a first tlb. ... Ati Technologies Ulc

Method and apparatus for asynchronous scheduling

A method and apparatus of asynchronous scheduling in a graphics device includes sending one or more instructions from an instruction scheduler to one or more instruction first-in/first-out (fifo) devices. An instruction in the one or more fifo devices is selected for execution by a single-instruction/multiple-data (simd) pipeline unit. ... Ati Technologies Ulc

Vector processor with general purpose register resource management

A method for allocating registers in a compute unit of a vector processor includes determining a maximum number of registers that are to be used concurrently by a plurality of threads of a kernel at the compute unit. The method further includes setting a mode of register allocation at the compute unit based on a comparison of the determined maximum number of registers and a total number of physical registers implemented at the compute unit.. ... Ati Technologies Ulc

Adaptive power control loop

A gpu performs dynamic power level management by switching between pre-defined power levels having distinct clock and voltage levels. The dynamic power level management includes identifying a first performance metric associated with processing workloads at the for a consecutive number of measurement cycles. ... Ati Technologies Ulc

Flexible addressing for a three dimensional (3-d) look up table (lut) used for gamut mapping

A three-dimensional (3-d) look up table (lut) can be accessed using an address decoder to identify a plurality of vertices in the 3-d lut based on a number (m) of most significant bits (msbs) of three coordinate values representative of a first color and a non-zero integer (p). The three coordinate values are determined by a source gamut. ... Ati Technologies Ulc

Shader writes to compressed resources

Systems, apparatuses, and methods for performing shader writes to compressed surfaces are disclosed. In one embodiment, a processor includes at least a memory and one or more shader units. ... Ati Technologies Ulc

Multi-thread graphics processing system

A graphics processing system comprises at least one memory device storing a plurality of pixel command threads and a plurality of vertex command threads. An arbiter coupled to the at least one memory device is provided that selects a pixel command thread from the plurality of pixel command threads and a vertex command thread from the plurality of vertex command threads. ... Ati Technologies Ulc

System on chip having integrated solid state graphics controllers

Described is a solid state graphics (ssg) subsystem including a die and a package, where the die includes a memory hub, graphics processing unit(s) (gpu(s)) connected to the memory hub, first memory architecture controller(s) connected to the memory hub and directly controlling access to first memory architecture(s), second memory architecture controller associated with each gpu and each second memory architecture controller connected to the memory hub and second memory architecture(s), an expansion bus first memory architecture controller connected to the memory hub and being an endpoint for a host system and an expansion bus controller coupled to the expansion bus first memory architecture controller and capable of connecting to the host system. The first memory architecture(s) and the second memory architecture(s) are either located on the ssg subsystem, located on the package, or a combination thereof.. ... Ati Technologies Ulc

Method and apparatus for accessing non-volatile memory as byte addressable memory

Described herein is a method and system for accessing a block addressable input/output (i/o) device, such as a non-volatile memory (nvm), as byte addressable memory. A front end processor connected to a peripheral component interconnect express (pcie) switch performs as a front end interface to the block addressable i/o device to emulate byte addressability. ... Ati Technologies Ulc

Apparatus for connecting non-volatile memory locally to a gpu through a local switch

Described herein are apparatus for connecting a first memory architecture locally to a graphics processing unit (gpu) through a local switch, where the first memory architecture can be a non-volatile memory (nvm) or other similarly used memories, for example, along with associated controllers. The apparatus includes the gpu(s) or discrete gpu(s) (dgpu(s)) (collectively gpu(s)), second memory architectures associated with the gpu(s), the local switch, first memory architecture(s), first memory architecture controllers or first memory architecture connector(s). ... Ati Technologies Ulc

High-speed selective cache invalidates and write-backs on gpus

Techniques for performing cache invalidates and write-backs in an accelerated processing device (e.g., a graphics processing device that renders three-dimensional graphics) are disclosed. The techniques involve receiving requests from a “master” (e.g., the central processing unit). ... Ati Technologies Ulc

Method and apparatus for direct access from non-volatile memory to local memory

Described herein is a method and system for directly accessing and transferring data between a first memory architecture and a second memory architecture associated with a graphics processing unit (gpu) or a discrete gpu (dgpu). In particular, a method is described for transferring data between the first memory architecture and the second memory architecture that bypasses interaction with a system memory of a processor and a root complex. ... Ati Technologies Ulc

Efficient arbitration for memory accesses

A system and method for efficient arbitration of memory access requests are described. One or more functional units generate memory access requests for a partitioned memory. ... Ati Technologies Ulc

Removing or identifying overlapping fragments after z-culling

Techniques for removing or identifying overlapping fragments in a fragment stream after z-culling are disclosed. The techniques include maintaining a first-in-first-out buffer that stores post-z-cull fragments. ... Ati Technologies Ulc

06/14/18 / #20180165426

Digital rights management for a gpu

Systems, apparatuses, and methods for implementing digital rights management using a gpu are disclosed. In one embodiment, a system includes at least a gpu, a security processor, and a memory. ... Ati Technologies Ulc

06/14/18 / #20180165224

Secure encrypted virtualization

Systems, apparatuses, and methods for implemented secure encrypted virtualization are disclosed. In one embodiment, a system includes at least one or more main processors, a memory, a memory controller, and a security processor. ... Ati Technologies Ulc

06/07/18 / #20180158438

Extending the range of variable refresh rate displays

Briefly, methods and apparatus to provide image content to, and display image content on, variable refresh rate displays with reduced input lag. The methods and apparatus allow for image tearing, or the displaying of image content from more than one video frame, when the render rate of a provided video frame falls outside the display refresh rate range of a variable refresh rate display when the display is refreshing with a previous frame (e.g. ... Ati Technologies Ulc

05/24/18 / #20180144754

Video assisted digital audio watermarking

A system and method for embedding digital audio watermarks in audio source information based at least upon identified video content are described. An audio/video processing system receives audiovisual data. ... Ati Technologies Ulc

05/24/18 / #20180144136

Secure system memory training

Systems, apparatuses, and methods for performing secure system memory training are disclosed. In one embodiment, a system includes a boot media, a security processor with a first memory, a system memory, and one or more main processors coupled to the system memory. ... Ati Technologies Ulc

05/24/18 / #20180143680

Application profiling for power-performance management

A processing apparatus is provided which includes memory configured to store hardware parameter settings for each of a plurality of applications. The processing apparatus also includes a processor in communication with the memory configured to store, in the memory, the hardware parameter settings, identify one of the plurality of applications as a currently executing application and control an operation of hardware by tuning a plurality of hardware parameters according to the stored hardware parameter settings for the identified application.. ... Ati Technologies Ulc

05/10/18 / #20180132009

Video frame rate conversion using streamed metadata

A video server generates metadata representative of interpolation parameters for portions of a first frame representative of a scene in a stream of frames including the first frame. The interpolation parameters are used to generate at least one interpolated frame representative of the scene subsequent to the first frame and prior to a second frame in the stream of frames. ... Ati Technologies Ulc

05/10/18 / #20180130780

Interposer transmission line using multiple metal layers

An interposer includes transmission lines formed of multiple metal layers disposed in a stack orthogonal to a plane formed by a primary surface of a substrate upon which the interposer is mounted. The use of multiple metal layers to form the transmission lines results in each transmission line having a height, or thickness, that is at least equal to the width of the transmission line. ... Ati Technologies Ulc

04/19/18 / #20180109804

Determining variance of a block of an image based on a motion vector for the block

The present disclosure is directed to techniques for determining variance of a pixel block in a frame of video based on variance of pixel blocks in a reference frame of the video, instead of directly, for example, by calculating variance based on pixel values of the pixel block. The techniques include identifying a motion vector for a pixel block in a current frame, the motion vector pointing to a pixel block in a reference frame. ... Ati Technologies Ulc

04/19/18 / #20180107608

Direct memory access authorization in a processing system

A processor employs a hardware encryption module in the memory access path between an input/out device and memory to cryptographically isolate secure information. In some embodiments, the encryption module is located at a memory controller of the processor, and each memory access request provided to the memory controller includes vm tag value identifying the source of the memory access request. ... Ati Technologies Ulc

03/29/18 / #20180090440

Power grid layout designs for integrated circuits

Integrated circuit layouts are disclosed that include metal layers with metal tracks having separate metal sections along the metal tracks. The separate metal sections along a single track may be electrically isolated from each other. ... Ati Technologies Ulc

03/22/18 / #20180084270

Dynamic reload of video encoder motion estimation search window under performance/power constraints

A processing apparatus is provided that includes an encoder configured to encode current frames of video data using previously encoded reference frames and perform motion searches within a search window about each of a plurality of co-located portions of a reference frame. The processing apparatus also includes a processor configured to determine, prior to performing the motion searches, which locations of the reference frame to reload the search window according to a threshold number of search window reloads using predicted motions of portions of the reference frame corresponding to each of the locations. ... Ati Technologies Ulc

03/22/18 / #20180082399

Primitive shader

Improvements in the graphics processing pipeline are disclosed. More specifically, a new primitive shader stage performs tasks of the vertex shader stage or a domain shader stage if tessellation is enabled, a geometry shader if enabled, and a fixed function primitive assembler. ... Ati Technologies Ulc

03/08/18 / #20180067535

Dynamic reliability quality monitoring

A system and method for managing operating modes within a semiconductor chip for optimal power and performance while meeting a reliability target are described. A semiconductor chip includes a functional unit and a corresponding reliability monitor. ... Ati Technologies Ulc

03/01/18 / #20180063549

System and method for dynamically changing resolution based on content

Described is a system and method for dynamically changing a resolution level at a frame level based on runtime pre-encoding analysis of content in a video stream. A video encoder continuously analyzes the content during runtime, and collects statistics and/or characteristics of the content before encoding it. ... Ati Technologies Ulc

02/08/18 / #20180039317

Fine-grain gpu power management and scheduling for virtual reality applications

Systems, apparatuses, and methods for implementing fine-grain power management for virtual reality (vr) systems are disclosed. A vr compositor monitors workload tasks while rendering and displaying content of a vr application. ... Ati Technologies Ulc

01/25/18 / #20180024612

Methods and apparatus for controlling power consumption of a computing unit that employs a discrete graphics processing unit

A method and apparatus controls power consumption of a computing unit by determining a discrete frame buffer memory usage condition, such as when there is little real 3d activity (or other condition). When the discrete frame buffer memory usage condition is favorable for power savings, the method and apparatus reduces power to at least one bank of discrete frame buffer memory during runtime of an associated discrete graphics processor. ... Ati Technologies Ulc

01/18/18 / #20180020232

Bit packing for delta color compression

A compressor is configured to determine delta color compression values for a plurality of pixels in a block and subdivide the plurality of pixels in the block into a plurality of groups and transmit a compressed bitstream representative of the delta values. The compressed bitstream includes bits representative of a block header that indicates a range of numbers of bits that are sufficient to represent the delta values, a plurality of group headers that each indicate a group minimum number of bits that is sufficient to represent the delta values in a corresponding one of the plurality of groups, and the delta values encoded using the group minimum number of bits for the group that includes the delta values. ... Ati Technologies Ulc

01/11/18 / #20180011798

Memory heaps in a memory model for a unified computing system

A method and system for allocating memory to a memory operation executed by a processor in a computer arrangement having a first processor configured for unified operation with a second processor. The method includes receiving a memory operation from a processor and mapping the memory operation to one of a plurality of memory heaps. ... Ati Technologies Ulc

12/28/17 / #20170374377

Single-pass real-time video stabilization

A method, processor, and non-transitory computer-readable medium are disclosed for real-time video stabilization and encoding in a single motion estimation pass for each frame. The method includes performing motion estimation on a stabilized current frame and determining a global motion vector using motion estimation information obtained in the performing of motion estimation on the stabilized current frame. ... Ati Technologies Ulc

12/28/17 / #20170373944

Channel training using a replica lane

Systems, apparatuses, and methods for utilizing training sequences on a replica lane are described. A transmitter is coupled to a receiver via a communication channel with a plurality of lanes. ... Ati Technologies Ulc

12/28/17 / #20170373788

Asynchronous feedback training

Systems, apparatuses, and methods for implementing asynchronous feedback training sequences are described. A transmitter transmits a training sequence indication to a receiver via a communication channel including a plurality of data lines. ... Ati Technologies Ulc

12/28/17 / #20170371654

System and method for using virtual vector register files

Described is a system and method for using virtual vector register files. In particular, a graphics processor includes a logic unit, a virtual vector register file coupled to the logic unit, a vector register backing store coupled to the virtual vector register file, and a virtual vector register file controller coupled to the virtual vector register file. ... Ati Technologies Ulc

12/28/17 / #20170371393

Method and processing apparatus for gating redundant threads

Described is a method and processing apparatus to improve power efficiency by gating redundant threads processing. In particular, the method for gating redundant threads in a graphics processor includes determining if data for a thread and data for at least another thread are within a predetermined similarity threshold, gating execution of the at least another thread if the data for the thread and the data for the at least another thread are within the predetermined similarity threshold, and using an output data from the thread as an output data for the at least another thread.. ... Ati Technologies Ulc

11/16/17 / #20170332096

System and method for dynamically stitching video streams

A video codec includes a stitching module configured to select stored encoded video frames that are to be composed into a concatenated frame for display. The stitching module arranges the selected encoded video frames into a specified pattern, and stitches the arranged encoded video frames together to generate a stitched encoded frame. ... Ati Technologies Ulc

10/12/17 / #20170293564

Adaptive resizable cache/lcm for improved power

Systems, apparatuses and methods of adaptively controlling a cache operating voltage are provided that comprise receiving indications of a plurality of cache usage amounts. Each cache usage amount corresponds to an amount of data to be accessed in a cache by one of a plurality of portions of a data processing application. ... Ati Technologies Ulc

10/05/17 / #20170287097

Hybrid client-server rendering in a virtual reality system

A server partitions a model representative of a scene into a first portion and a second portion based on proximities of objects within the scene to a client device, renders a first portion of an image representative of the scene based on the first portion of the model, and transmits information representative of the second portion of the model and the first portion of the image over a wireless or wired network. The client device receives information representative of the second portion of the model and the first portion of the image. ... Ati Technologies Ulc

08/10/17 / #20170227765

Method and system for streaming information in wireless virtual reality

Described is a method and system to efficiently compress and stream texture-space rendered content that enables low latency wireless virtual reality applications. In particular, camera motion, object motion/deformation, and shading information are decoupled and each type of information is then compressed as needed and streamed separately, while taking into account its tolerance to delays.. ... Ati Technologies Ulc

08/03/17 / #20170223370

System for video compression

A system and method for providing video compression that includes encoding using an encoding engine a yuv stream wherein y, u and v color values are encoded in parallel and patching together the y, u and v color streams to form a compressed yuv output stream. The encoding engine further includes encoding each color value of the yuv stream in parallel using parallel encoding engines and a control engine for controlling operation all of the encoding engines in parallel. ... Ati Technologies Ulc

08/03/17 / #20170220485

Routing direct memory access requests in a virtualized computing environment

A device may receive a direct memory access request that identifies a virtual address. The device may determine whether the virtual address is within a particular range of virtual addresses. ... Ati Technologies Ulc

07/27/17 / #20170214941

Method and apparatus for selecting an intra prediction mode for use in multiview video coding (mvc)

A method, apparatus and system uses the intra prediction modes that were used to encode a base view data block as well as the intra prediction modes used to encode neighboring data blocks to the base view data block as a set of candidate intra prediction modes for use in encoding a collocated data block in the dependent view. A sum of absolute difference (sad) calculation may also be used to determine and select the candidate intra prediction mode that has the smallest value and hence best encoding properties for the dependent view data block. ... Ati Technologies Ulc

07/27/17 / #20170212760

Instruction set and micro-architecture supporting asynchronous memory access

A system and method for reducing latencies of main memory data accesses are described. A non-blocking load (nbld) instruction identifies an address of requested data and a subroutine. ... Ati Technologies Ulc

07/20/17 / #20170206630

Memory management in graphics and compute application programming interfaces

Methods are provided for creating objects in a way that permits an api client to explicitly participate in memory management for an object created using the api. Methods for managing data object memory include requesting memory requirements for an object using an api and expressly allocating a memory location for the object based on the memory requirements. ... Ati Technologies Ulc

07/06/17 / #20170195706

Method and device for providing a video stream for an object of interest

A method and device for ranking video feeds provide a user with the best feed depending on what the user wishes to see. The method includes obtaining one or more video feeds and ranking the video feeds. ... Ati Technologies Ulc

06/29/17 / #20170188051

Method and apparatus for determining the severity of corruption in a picture

An encoder encodes pixels representative of a picture in a multimedia stream, generates a first approximate signature based on approximate values of pixels in a reconstructed copy of the picture, and transmits the encoded pixels and the first approximate signature. A decoder receives a first packet including the encoded pixels and the first approximate signature, decodes the encoded pixels, and transmits a first signal in response to comparing the first approximate signature and a second approximate signature generated based on approximate values of the decoded pixels. ... Ati Technologies Ulc

06/29/17 / #20170185451

Data driven scheduler on multiple computing cores

Methods, devices, and systems for data driven scheduling of a plurality of computing cores of a processor. A plurality of threads may be executed on the plurality of computing cores, according to a default schedule. ... Ati Technologies Ulc

06/22/17 / #20170178273

Graphics context scheduling based on flip queue management

A processor includes a scheduler that governs which of a plurality of pending graphics contexts is selected for execution at a graphics pipeline of the processor. The processor also includes a plurality of flip queues storing data ready to be rendered at a display device. ... Ati Technologies Ulc

06/15/17 / #20170168957

Aware cache replacement policy

An aware cache replacement policy increases the length of in-page bursts of cache eviction memory requests and promotes bank-rotation to reduce the likelihood of memory bank-conflicts as compared to other cache replacement policies. The aware cache replacement policy increases the amount of valid data on the memory bus and reduces the impact of main memory precharge and activate times by evicting cache blocks in bursts based on temporal and spatial locality according to requesting thread and/or memory structure.. ... Ati Technologies Ulc

04/13/17 / #20170105022

Apparatus and method for video data processing

Methods and apparatus for facilitating processing a reference frame to produce an output frame. Motion vector data for a block of reference frame pels estimates the displacement of the reference frame pels from corresponding pels in a prior input frame. ... Ati Technologies Ulc

03/30/17 / #20170090542

Method and device for noise reduction in multi-frequency clocking environment

A device and method of operating a synchronous frequency processing environment served by a common power source and common clock source. The method includes operating the processing environment to have a first power consumption. ... Ati Technologies Ulc

03/23/17 / #20170085871

Real time video coding system with error recovery using earlier reference picture

In a video coding system, a method includes transmitting a first encoded picture from an encoder for reception by a decoder as part of an encoded bitstream. The first encoded picture acts a first reference picture for one or more subsequent pictures in the output encoded bitstream. ... Ati Technologies Ulc

03/23/17 / #20170083455

Cache access statistics accumulation for cache line replacement selection

A processor device includes a cache and a memory storing a set of counters. Each counter of the set is associated with a corresponding block of a plurality of blocks of the cache. ... Ati Technologies Ulc

03/23/17 / #20170083240

Selective data copying between memory modules

A memory manager of a processor identifies a block of data for eviction from a first memory module to a second memory module. In response, the processor copies only those portions of the data block that have been identified as modified portions to the second memory module. ... Ati Technologies Ulc

03/09/17 / #20170069258

Virtualized display output ports configuration

A virtualized displayport (dp) configuration data (dpcd) for multi-stream transport (mst) logical dp end points and non-dp end points allows dpcd configuration for links within a displayport topology which are not configurable using dpcd. A virtualized dpcd may configure a link to an internal display of a mst sink device or a non-dp display to receive data using a dynamic refresh rate (drr), display stream compression (dsc), panel self-refresh (psr) and other dpcd configurable features.. ... Ati Technologies Ulc

ARCHIVE: New 2018 2017 2016 2015 2014 2013 2012 2011 2010 2009


This listing is an abstract for educational and research purposes is only meant as a recent sample of applications filed, not a comprehensive history. is not affiliated or associated with Ati Technologies Ulc in any way and there may be associated servicemarks. This data is also published to the public by the USPTO and available for free on their website. Note that there may be alternative spellings for Ati Technologies Ulc with additional patents listed. Browse our Agent directory for other possible listings. Page by