Real Time Touch



new TOP 200 Companies filing patents this week

new Companies with the Most Patent Filings (2010+)




Real Time Touch

Epostar Electronics Corp patents


Recent patent applications related to Epostar Electronics Corp. Epostar Electronics Corp is listed as an Agent/Assignee. Note: Epostar Electronics Corp may have other listings under different names/spellings. We're not affiliated with Epostar Electronics Corp, we're just tracking patents.

ARCHIVE: New 2018 2017 2016 2015 2014 2013 2012 2011 2010 2009 | Company Directory "E" | Epostar Electronics Corp-related inventors


Data writing method and storage controller

A data writing method is provided. The method includes writing a first write data into a first physical sub-unit in a storage device according to a first write command; recording a first meta data corresponding to the first write data into the storage device; writing a second write data into a second physical sub-unit in the storage device; recording a second meta data corresponding to the second write data into the storage device. ... Epostar Electronics Corp

Memory management method and storage controller using the same

A memory management method is provided. The method includes writing a plurality of first data into a first physical block and storing a first stamp corresponding to the first physical block; writing a plurality of second data into a second physical block and storing a second stamp corresponding to the second physical block, wherein the second stamp is greater than the first stamp; moving a plurality of third data in the first data in the first physical block to a third physical block, wherein the third data are valid data and the third data match a specific type; and storing a third stamp corresponding to the third physical block and updating the second stamp corresponding to the second physical block to a fourth stamp, wherein the fourth stamp is greater than the third stamp and the third stamp is greater than or equal to the second stamp.. ... Epostar Electronics Corp

Data transmission method, memory storage device and memory control circuit unit

A data transmission method, a memory storage device and a memory control circuit unit are provided. The method includes: obtaining a first command from a host system and counting a first time value; performing a first access operation corresponding to the first command on the rewritable non-volatile memory module; and generating a first completion message corresponding to completion of the first access operation and buffering the first completion message in a buffer area; and transmitting the first completion message buffered in the buffer area to the host system if the first time value meets a first waiting time value. ... Epostar Electronics Corp

Data transmission method, and storage controller and list management circuit using the same

A data transmission method is provided. The method includes receiving a transmission command from a host system, wherein the transmission command includes a starting logical block address, a number of logical blocks, a first physical region page pointer, and a second physical region page pointer, wherein the transmission command is configured to transmit target data between at least one target logical block of a rewritable non-volatile memory module and at least one target memory page of a host memory; buffering a plurality of entries of at least one physical region page pointer list corresponding to the transmission command if the second physical region page pointer is a first list starting address of a first physical region page pointer list corresponding to the transmission command; and transmitting corresponding data according to the buffered entries.. ... Epostar Electronics Corp

Data reading method, data writing method and storage controller using the same

A data reading method is provided. The method includes receiving a read command from a host system, wherein the read command includes a starting logical block address, a number of logical blocks, a first physical region page pointer, and a second physical region page pointer, and the read command is configured to read target data from at least one target logical block of a rewritable non-volatile memory module and write the read target data into at least one target memory page of a host memory; obtaining an address of each of the target memory pages respectively corresponding to the at least one target logical block according to the read command; and selecting a first target logical block from the at least one target logical block, and writing the read first target data into a first target memory page according to the obtained address of the first target memory page.. ... Epostar Electronics Corp

Memory management method, memory storage device and memory control circuit unit

A memory management method, a memory storage device and a memory control circuit unit are provided. The method includes: configuring a default encoding rule for a first physical erasing unit which includes encoding data to be stored to the first physical erasing unit based on a default code rate; configuring a first encoding rule, for the first physical erasing unit according to error estimating information of the first physical erasing unit, which includes encoding data to be stored to a first-type physical programming unit and a second-type physical programming unit belonging to the first physical erasing unit based on a first code rate and a second code rate respectively, where a value of the first code rate is greater than a value of the default code rate, and a value of the second code rate is less than the value of the default code rate.. ... Epostar Electronics Corp

Decoding method, memory storage device and memory control circuit unit

A decoding method, a memory storage device, and a memory control circuit unit are provided. The decoding method includes: reading a codeword from a memory module and estimating error level information of the codeword; inputting the codeword and the error level information to an error checking and correcting circuit through a first message channel and a second message channel respectively; determining whether the error level information meets a default condition; if yes, inputting the codeword to a first decoding engine of the error checking and correcting circuit for decoding; otherwise, inputting the codeword to a second decoding engine of the error checking and correcting circuit for decoding, wherein a power consumption of the first decoding engine is lower than that of the second decoding engine, and a decoding success rate of the first decoding engine is lower than that of the second decoding engine. ... Epostar Electronics Corp

Decoding method, and memory storage apparatus and memory control circuit unit using the same

A decoding method for low density parity code is provided. The method includes performing an iterative decoding operation for a codeword, wherein a plurality of log-likelihood-ratios correspond respectively to a plurality of data bits of the codeword; determining whether the iterative decoding operation is successful; determining whether a perturbation condition is met if the iterative decoding operation is not successful; performing protect operation for a first log-likelihood-ratio among the log-likelihood-ratios, and performing a perturbation operation for a plurality of second log-likelihood-ratios among the log-likelihood-ratios, wherein the second log-likelihood-ratios are different to the first log-likelihood-ratio; and re-performing the iterative decoding operation for the codeword after finishing the perturbation operation.. ... Epostar Electronics Corp

Decoding method, memory storage device and memory control circuit unit

A decoding method, a memory storage device and a memory control circuit unit are provided. The decoding method includes: reading memory cells based on a default hard-decision voltage level and decoding the obtained hard-bit information; if the decoding fails, reading the memory cells based on default soft-decision voltage levels and then decoding the obtained soft-bit information; if the decoding still fails, reading the memory cells based on first test voltage levels to obtain first soft-bit information and reading the memory cells based on second test voltage levels to obtain second soft-bit information; obtaining a first estimating parameter and a second estimating parameter according to the first soft-bit information and the second soft-bit information, respectively; and updating the default hard-decision voltage level according to the first estimating parameter and the second estimating parameter. ... Epostar Electronics Corp

Decoding method, memory storage device and memory control circuit unit

A decoding method, a memory storage device and a memory control circuit unit are provided. The decoding method includes: reading a target physical unit based on a first read voltage level; performing a first decoding operation; reading an authentication physical unit based on a first candidate voltage level to obtain first assistance data and reading the authentication physical unit based on a second candidate voltage level to obtain second assistance data if the first decoding operation fails; obtaining a first estimation parameter according to the first assistance data and authentication data and obtaining a second estimation parameter according to the second assistance data and the authentication data; determining a second read voltage level according to the first estimation parameter and the second estimation parameter; and reading the target physical unit again based on the second read voltage level. ... Epostar Electronics Corp

Decoding method, memory storage device and memory control circuit unit

A decoding method, a memory storage device and a memory control circuit unit are provided. The method includes: programming first data into a first physical unit of a rewritable non-volatile memory module; reading the first physical unit to obtain second data; obtaining a first threshold voltage distribution of a first bit-value and a second threshold voltage distribution of a second bit-value according to the first data and the second data, wherein the first bit-value and the second bit-value are different; calculating first channel reliability information corresponding to the first physical unit according to the first threshold voltage distribution and the second threshold voltage distribution; and decoding third data stored in the first physical unit according to the first channel reliability information. ... Epostar Electronics Corp

Memory management method, memory storage device and memory control circuit unit

A memory management method, a memory storage device and a memory control circuit unit are provided. The method includes: receiving first data; detecting a total number of first type physical erasing units not storing valid data; performing a first procedure if the total number is less than a first threshold value. ... Epostar Electronics Corp

Decoding method, memory storage device and memory control circuit unit

A decoding method, a memory storage device and a memory control circuit unit are provided. The method includes: determining an offset threshold value and a corresponding check matrix; receiving response data from a rewritable non-volatile memory module and performing an iterative decoding process. ... Epostar Electronics Corp








ARCHIVE: New 2018 2017 2016 2015 2014 2013 2012 2011 2010 2009



###

This listing is an abstract for educational and research purposes is only meant as a recent sample of applications filed, not a comprehensive history. Freshpatents.com is not affiliated or associated with Epostar Electronics Corp in any way and there may be associated servicemarks. This data is also published to the public by the USPTO and available for free on their website. Note that there may be alternative spellings for Epostar Electronics Corp with additional patents listed. Browse our Agent directory for other possible listings. Page by FreshPatents.com

###