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Infineon Technologies Ag patents (2015 archive)


Recent patent applications related to Infineon Technologies Ag. Infineon Technologies Ag is listed as an Agent/Assignee. Note: Infineon Technologies Ag may have other listings under different names/spellings. We're not affiliated with Infineon Technologies Ag, we're just tracking patents.

ARCHIVE: New 2018 2017 2016 2015 2014 2013 2012 2011 2010 2009 | Company Directory "I" | Infineon Technologies Ag-related inventors


12/31/15 / #20150381351

Cryptographic processor, method for implementing a cryptographic processor and key generation circuit

A cryptographic processor is described comprising a processing circuit configured to perform a round function of an iterated cryptographic algorithm, a controller configured to control the processing circuit to apply a plurality of iterations of the round function on a message to process the message in accordance with the iterated cryptographic algorithm and a transformation circuit configured to transform the input of a second iteration of the round function following a first iteration of the round function of the plurality of iterations and to supply the transformed input as input to the second iteration wherein the transformation circuit is implemented using a circuit camouflage technique.. . ... Infineon Technologies Ag

12/31/15 / #20150381194

Sensor system using multiple modes for analog to digital conversion

A device for converting analog to digital is disclosed. The device includes a dual mode converter and a control unit. ... Infineon Technologies Ag

12/31/15 / #20150381160

Robust multiplexer, and method for operating a robust multiplexer

Multi-channel multiplexers and a method for operating a multi-channel multiplexer are presented, wherein each of a plurality of input channels includes at least one doped bulk well of a conductivity type. The method further includes blocking each input channel of a selection of the plurality of input channels by at least one corresponding control voltage, and bringing each of the at least one doped bulk well of each of the input channels of the selection of the plurality of input channels to an at least one corresponding predetermined voltage. ... Infineon Technologies Ag

12/31/15 / #20150381078

Mems device and method for manufacturing the mems device

A mems device and a method for manufacturing a mems device are disclosed. In an embodiment the mems device comprises a support having a cavity therethrough and a membrane extended over the cavity of the support, wherein the membrane is at least partially reinforced by graphene.. ... Infineon Technologies Ag

12/31/15 / #20150381044

Voltage converter

Methods and devices are provided wherein a change of a mode of operation is performed based on a time where both switches of a first and a second switch are open.. . ... Infineon Technologies Ag

12/31/15 / #20150380965

Hybrid power converter stage

In one example, a method includes generating, by one or more active circuit elements of a power converter and during a charging state, a first dc power signal from an input power signal; outputting, during the charging state, the first dc power signal to a battery; receiving, during a discharging state, a second dc power signal from the battery; generating, by the same one or more active circuit elements of the power converter and during the discharging state, an ac power signal from the second dc power signal; and outputting, during the discharging state, the ac power signal to a load.. . ... Infineon Technologies Ag

12/31/15 / #20150380543

Semiconductor device with power transistor cells and lateral transistors and method of manufacturing

By thermal oxidation a field oxide layer is formed that lines first and second trenches that extend from a main surface into a semiconductor layer. After the thermal oxidation, field electrodes and trench gate electrodes of power transistor cells are formed in the first and second trenches. ... Infineon Technologies Ag

12/31/15 / #20150380533

Insulated gate bipolar transistor device, semiconductor device and method for forming said devices

An insulated gate bipolar transistor device includes a semiconductor substrate having a drift region of an insulated gate bipolar transistor structure. Further, the insulated gate bipolar transistor device includes a first nanowire structure and a first gate structure. ... Infineon Technologies Ag

12/31/15 / #20150380522

Methods of forming low noise semiconductor devices

Disclosed herein are lateral diffused metal oxide semiconductor (ldmos) device and trench isolation related devices, methods, and techniques. In one illustration, a doped region is formed within a semiconductor substrate. ... Infineon Technologies Ag

12/31/15 / #20150380511

Field effect semiconductor component and methods for operating and producing it

In accordance with one component, a power field effect transistor is proposed, including a substrate, a channel, a gate electrode, and a gate insulator. The gate insulator is arranged at least partly between the gate electrode and the channel and includes a material having a hysteresis with respect to its polarization, such that a switching state of the transistor produced by a voltage applied to the gate electrode is maintained after the voltage has been switched off. ... Infineon Technologies Ag

12/31/15 / #20150380492

Semiconductor device containing chalcogen atoms and method of manufacturing

A semiconductor device includes a single crystalline semiconductor body with a first surface and a second surface parallel to the first surface. The semiconductor body contains chalcogen atoms and a background doping of pnictogen and/or hydrogen atoms. ... Infineon Technologies Ag

12/31/15 / #20150380403

Semiconductor device with thermally grown oxide layer between field and gate electrode and method of manufacturing

A first trench and a second trench, both extending from a main surface into a semiconductor layer, are filled with a first fill material. The first fill material is selectively recessed in the first trench. ... Infineon Technologies Ag

12/31/15 / #20150380306

Method for forming a vertical electrical conductive connection

A method for forming a vertical electrical conductive connection includes forming an electrically insulating layer including at least one hole reaching vertically through the electrically insulating layer and depositing an electrically conductive layer. A surface of the electrically conductive layer includes a recess at the location of the at least one hole of the electrically insulating layer. ... Infineon Technologies Ag

12/31/15 / #20150377986

Magnetoresistive device and method for manufacturing the same

A magnetoresistive device includes a carrier, an xmr-sensor, a magnetic layer formed above an active xmr-region of the xmr-sensor and an insulating layer arranged between the xmr-sensor and the magnetic layer.. . ... Infineon Technologies Ag

12/31/15 / #20150377954

Method for testing semiconductor dies and a test apparatus

A method includes: providing a test apparatus; providing an electrically conductive carrier; providing a semiconductor substrate having a first main face, a second main face opposite to the first main face, and a plurality of semiconductor dies, the semiconductor dies including a first contact element on the first main face and a second contact element on the second main face; placing the semiconductor substrate on the carrier with the second main face facing the carrier; electrically connecting the carrier to a contact location disposed on the first main face; and testing a semiconductor die by electrically connecting the test apparatus with the first contact element of the semiconductor die and the contact location.. . ... Infineon Technologies Ag

12/31/15 / #20150377931

Current measurement in a power semiconductor arrangement

A semiconductor arrangement may comprise a multiplicity of semiconductor elements with controlling paths and controlled paths, the controlled paths having controllable conductivities and being connected parallel to each other. The semiconductor arrangement may also comprise a current evaluation circuit configured to measure current strengths of currents present in the controlled paths and to provide a signal representing the sum of the measured current strengths, and a control circuit connected to the controlling paths and configured to control the conductivities of the controlled paths in accordance with an input signal and the signal representing the sum of the current strengths, wherein at least one controlled path is controlled to have minimum conductivity if the signal representing the sum of the current strengths is below a threshold value.. ... Infineon Technologies Ag

12/31/15 / #20150377824

Graphene gas sensor for measuring the concentration of carbon dioxide in gas environments

A gas sensor for measuring a concentration of carbon dioxide in a gas environment (ge) is provided. The gas sensor includes a graphene layer having a side facing towards the gas environment (ge), an electrode layer including a plurality of electrodes electrically connected to the graphene layer, and a chalcogenide layer covering at least a part of the side of the graphene layer facing towards the gas environment (ge).. ... Infineon Technologies Ag

12/31/15 / #20150377740

Auto tire localization systems and methods utilizing a tpms angular position index

Embodiments relate to tire localization systems and methods for tire pressure monitoring systems (tpms). In embodiments, a tire pressure management system comprises a wheel speed sensor (wss), a tire pressure sensor (tps) that can comprise circuitry and/or sensors configured to measure or record tire pressure data and tps phase data, and an electronic control unit (ecu) that can comprise circuitry and/or sensors configured to process the speed sensor data and tps data. ... Infineon Technologies Ag

12/31/15 / #20150377651

Through bias pole for igmr speed sensing

One embodiment relates to a sensing system that includes a magnetic encoder wheel having alternating pole magnetic domains along a circumference thereof. The magnetic encoder wheel is configured to rotate about a first axis. ... Infineon Technologies Ag

12/24/15 / #20150372616

Rectifier with bridge circuit and parallel resonant circuit

A rectifier circuit includes a bridge circuit configured to receive an alternating input signal. A parallel resonant circuit is coupled between the bridge circuit and an output. ... Infineon Technologies Ag

12/24/15 / #20150372527

Battery thermal acceleration mechanism

Devices, systems, and methods for battery supporting, monitoring, and charging are described. In one example, a device includes a temperature measurement device, a controller, coupled to the temperature measuring device, the controller configured to determine an acceleration change in temperature, and a switch, coupled to the controller, configured to disconnect a current associated with the battery when a change in acceleration of temperature is measured.. ... Infineon Technologies Ag

12/24/15 / #20150372230

Method of forming a memory and method of forming a memory array

A method of forming a memory includes forming a first electrode and a second electrode within a first layer over a semiconductor substrate, forming a resistive-switching memory element and an antifuse element over the first layer, wherein the resistive-switching memory element includes a metal oxide layer and is electrically contacting the first electrode, wherein the metal oxide layer has a first thickness and a forming voltage that corresponds to the first thickness, wherein the antifuse element includes a dielectric layer and is electrically contacting the second electrode, and wherein the dielectric layer has a second thickness that is less than the first thickness and a dielectric breakdown voltage that is less than the forming voltage, and forming a third electrode and a fourth electrode within a second layer over the resistive-switching memory element and the antifuse element, wherein the third electrode is electrically contacting the resistive-switching memory element and the fourth electrode is electrically contacting the antifuse element.. . ... Infineon Technologies Ag

12/24/15 / #20150372073

Coil and method of manufacturing a coil

A method for manufacturing an electronic device and an electronic device are disclosed. In an embodiment the method comprises forming an opening in an isolation layer, isotropically etching the opening thereby forming an extended opening with curved sidewalls, and forming a conductive material in the opening.. ... Infineon Technologies Ag

12/24/15 / #20150371995

Method for processing a carrier, a carrier, and a split gate field effect transistor structure

According to various embodiments, a method for processing a carrier may include: doping a carrier with fluorine such that a first surface region of the carrier is fluorine doped and a second surface region of the carrier is at least one of free from the fluorine doping or less fluorine doped than the first surface region; and oxidizing the carrier to grow a first gate oxide layer from the first surface region of the carrier with a first thickness and simultaneously from the second surface region of the carrier with a second thickness different from the first thickness.. . ... Infineon Technologies Ag

12/24/15 / #20150371979

Methods for manufacturing an electronic module

A method for manufacturing an electronic module is disclosed. In an embodiment the method includes providing a passive component having an upper surface of a first area, and electrically and mechanically attaching a first semiconductor chip having a lower surface of a second area that is smaller than the first area to the passive component, wherein the lower surface of the first semiconductor chip is arranged on the upper surface of the passive component, and wherein the first semiconductor chip comprises a vertical field-effect transistor.. ... Infineon Technologies Ag

12/24/15 / #20150371942

Nanotube structure based metal damascene process

In various embodiments a method for manufacturing a metallization layer on a substrate is provided, wherein the method may include forming a plurality of groups of nanotubes over a substrate, wherein the groups of nanotubes may be arranged such that a portion of the substrate is exposed and forming metal over the exposed portion of the substrate between the plurality of groups of nanotubes.. . ... Infineon Technologies Ag

12/24/15 / #20150371858

Method for treating a semiconductor wafer

A magnetic czochralski semiconductor wafer having opposing first and second sides arranged distant from one another in a first vertical direction is treated by implanting first particles into the semiconductor wafer via the second side to form crystal defects in the semiconductor wafer. The crystal defects have a maximum defect concentration at a first depth. ... Infineon Technologies Ag

12/24/15 / #20150370249

Slow speed signal detection for abs sensors with adaptive time watchdog concept for 0hz capability

The present disclosure relates to a rotation speed sensor, including at least one sensor element to detect a magnetic input signal of the rotation speed sensor, a time watchdog with a programmable time constant and an output control circuit. The time watchdog generates a time-out event when no minimum or maximum or no output switching event of a magnetic input signal of the rotation speed sensor is detected within a time-interval equal to a programmed time constant of the time watchdog. ... Infineon Technologies Ag

12/24/15 / #20150369881

Low offset vertical hall device and current spinning method

One embodiment of the present invention relates to a vertical hall-effect device. The device includes at least two supply terminals arranged to supply electrical energy to the first hall-effect region; and at least one hall signal terminal arranged to provide a first hall signal from the first hall-effect region. ... Infineon Technologies Ag

12/24/15 / #20150369674

Temperature sensor calibration

Representative implementations of devices and techniques provide calibration for a chip-based temperature sensor. Two or more measurements are taken using a high resolution temperature sensor digitizer, and used to determine a calibration for the temperature sensor, based on a reference temperature value calculated from the measurements.. ... Infineon Technologies Ag

12/24/15 / #20150369635

Rotary speed sensor

The present utility model relates to a rotary speed sensor, comprising at least one sensor element (1), an analog signal processing block (2), a digital core (5) and a digital output end (10), wherein the analog signal processing block (2) comprises an analog signal regulating block (3) and an analog comparator (4), the digital core (5) comprises a digital signal processing means (7), wherein the digital core (5) additionally comprises a frequency detector (6), for detecting a frequency of a magnetic input signal of the rotary speed sensor, so that when the frequency is greater than a predetermined frequency, a time continuous signal path comprising the analog signal processing block (2) is formed, and when the frequency is smaller than a predetermined frequency, a time discrete digital signal path comprising the digital signal processing means (7) is formed.. . ... Infineon Technologies Ag

12/24/15 / #20150368097

Methods for producing a cavity within a semiconductor substrate

A method for producing at least one cavity within a semiconductor substrate includes dry etching the semiconductor substrate from a surface of the semiconductor substrate at at least one intended cavity location in order to obtain at least one provisional cavity. The method includes depositing a protective material with regard to a subsequent wet-etching process at the surface of the semiconductor substrate and at cavity surfaces of the at least one provisional cavity. ... Infineon Technologies Ag

12/24/15 / #20150367692

Repeater for tire pressure monitoring system (tpms) auto localization

A tpms auto localization system for on-demand tire parameter acquisition and an associated method includes a central unit configured to receive and transmit radio-frequency (rf) signals, and a tire module associated with a tire. The tire module is configured to measure one or more tire parameters based on a received low frequency (lf) command and transmit the one or more tire parameters to the central unit. ... Infineon Technologies Ag

12/17/15 / #20150365877

Matrix switch

A matrix switch comprises a number of switching elements configured in a matrix and a controller that operates to dynamically select one or more signal routes via the switching elements. The matrix switch can operate to dynamically route multiple signal routes between antenna ports to one or more transceiver ports, transmitter ports, receiver ports or termination ports. ... Infineon Technologies Ag

12/17/15 / #20150365102

Feed forward double-sampling modulator

Representative implementations of devices and techniques provide analog to digital conversion of an analog input. A multistage modulator using a feed-forward technique can alternately convert integrated samples of the analog input to digital representations. ... Infineon Technologies Ag

12/17/15 / #20150365083

Circuit and method for driving a power semiconductor switch

A drive circuit for driving a semiconductor switch includes an overload detector circuit connected to the semiconductor switch and designed to detect an overload state of the semiconductor switch. The drive circuit further includes a driver circuit connected to a control terminal of the semiconductor switch and designed to generate, upon detection of an overload state, a driver signal having a level such that the semiconductor switch is switched off or switch-on is prevented. ... Infineon Technologies Ag

12/17/15 / #20150364588

Semiconductor device having an insulated gate bipolar transistor arrangement

A semiconductor device includes an insulated gate bipolar transistor (igbt) arrangement having a first configuration region of emitter-side insulated gate bipolar transistor structures, a second configuration region of emitter-side insulated gate bipolar transistor structures, a collector layer and a drift layer. The drift layer is arranged between the collector layer and the emitter-side insulated gate bipolar transistor structures of the first configuration region and the second configuration region. ... Infineon Technologies Ag

12/17/15 / #20150364550

Optimized layer for semiconductor

Representative implementations of devices and techniques provide an optimized layer for a semiconductor component. In an example, a doped portion of a wafer, forming a substrate layer may be transferred from the wafer to an acceptor, or handle wafer. ... Infineon Technologies Ag

12/17/15 / #20150364524

Power semiconductor device, manufacturing method therefor, and method for operating the power semiconductor device

A power semiconductor device includes a semiconductor body including a first surface, an edge delimiting the semiconductor body in a horizontal direction substantially parallel to the first surface, an active area including at least one of several transistor structures connected in parallel and several diode structures connected in parallel, and a peripheral area arranged between the active area and the edge. The power semiconductor further device includes a plurality of word lines, a plurality of bit lines separated from the word lines, and a plurality of temperature sensors arranged on or at the first surface, wherein each of the temperature sensors is connected with one of the bit lines and one of the word lines or each of the temperature sensors is formed by a respective portion of one of the bit lines.. ... Infineon Technologies Ag

12/17/15 / #20150364468

Discrete semiconductor transistor

A discrete semiconductor transistor includes a gate resistor electrically coupled between a gate electrode terminal and a gate electrode of the discrete semiconductor transistor. A resistance r of the gate resistor at a temperature of −40° c. ... Infineon Technologies Ag

12/17/15 / #20150364402

Monitor structures and methods of formation thereof

In accordance with an embodiment of the present invention, a method of forming an electronic device includes forming a first opening and a second opening in a workpiece. The first opening is deeper than the second opening. ... Infineon Technologies Ag

12/17/15 / #20150364328

Methods of fabricating semiconductor devices and structures thereof

Methods of fabricating semiconductor devices and structures thereof are disclosed. In one embodiment, a method of manufacturing a semiconductor device includes forming a gate material stack over a substrate having a first region and a second region. ... Infineon Technologies Ag

12/17/15 / #20150362841

Method and apparatus for exposing a structure on a substrate

A method for exposing a structure on a substrate includes positioning of an invariable reticle and a programmable reticle in a light path between a light source and a layer on a substrate to be exposed to light and exposing the layer on the substrate by light from the light source passing the invariable reticle and the programmable reticle.. . ... Infineon Technologies Ag

12/17/15 / #20150362722

Membrane structures for microelectromechanical pixel and display devices and systems, and methods for forming membrane structures and related devices

Embodiments relate to microelectromechanical systems (mems) and more particularly to membrane structures comprising pixels for use in, e.g., display devices. In embodiments, a membrane structure comprises a monocrystalline silicon membrane above a cavity formed over a silicon substrate. ... Infineon Technologies Ag

12/17/15 / #20150362672

Liquid sensing systems and methods using a ring resonator sensor

A sensor system having a multi-pass interaction region is disclosed. The system includes an input region, a multi-pass region, and an output region. ... Infineon Technologies Ag

12/17/15 / #20150362335

Rotation sensor

A sensor device is provided with a magnetic field sensitive element being positioned in a magnetic field of a magnet. The magnet is positioned on an end face of a shaft. ... Infineon Technologies Ag

12/10/15 / #20150359091

Printed circuit boards and methods of manufacturing thereof

A printed circuit board includes an electrically conductive layer and a dielectric layer including a polymer, wherein the polymer includes metallic particles.. . ... Infineon Technologies Ag

12/10/15 / #20150358735

System and method for a microphone

According to an embodiment, a microfabricated structure includes a cavity disposed in a substrate, a first clamping layer overlying the substrate, a deflectable membrane overlying the first clamping layer, and a second clamping layer overlying the deflectable membrane. A portion of the second clamping layer overlaps the cavity.. ... Infineon Technologies Ag

12/10/15 / #20150357927

Multi-mode operation and control of a resonant converter

In accordance with an embodiment, a method of controlling a switched-mode power includes generating a feedback signal proportional to an output of the switched-mode power supply, and operating the switched-mode power supply in a normal mode. If the feedback signal crosses a first threshold, the switched-mode power operates in a second operating mode. ... Infineon Technologies Ag

12/10/15 / #20150357449

Power semiconductor device

A power semiconductor device includes a semiconductor substrate layer of a first conductive type which has a lower part semiconductor layer of a second conductive type and an active region that includes a body region of the second conductive type, a source region of the first conductive type disposed in the body region, and a first doped region of the first conductive type at least a part of which is disposed below the body region. An emitter electrode is electrically connected to the source region, and a groove extends into the substrate layer and includes a shielding electrode electrically connected to the emitter electrode. ... Infineon Technologies Ag

12/10/15 / #20150357437

Mos-transistor with separated electrodes arranged in a trench

A mos transistor is produced by forming a first trench in a semiconductor body, forming a first isolation layer on inner surfaces of the first trench, and filling the first trench with conductive material to form a first electrode within the first trench. A portion of the first electrode is removed along one side wall of the first trench to form a cavity located within the first trench. ... Infineon Technologies Ag

12/10/15 / #20150357322

Diode biased esd protection devices and methods

An esd protection device includes an mos transistor with a source region, drain region and gate region. A node designated for esd protection is electrically coupled to the drain. ... Infineon Technologies Ag

12/10/15 / #20150357234

Method for providing a self-aligned pad protection in a semiconductor device

According to one embodiment, a method for processing a semiconductor device is provided including forming a final metal layer forming a passivation layer over the final metal layer and structuring the passivation layer and the final metal layer to form a patterned metal layer and a patterned passivation layer, wherein the patterned metal layer includes a pad region covered by the patterned passivation layer.. . ... Infineon Technologies Ag

12/10/15 / #20150357229

Method of manufacturing a semiconductor device comprising field stop zone

A method of manufacturing a semiconductor device includes forming a field stop zone by irradiating a portion of a semiconductor body with a laser beam through a first surface of the semiconductor body. The portion has an oxygen concentration in a range of 5×1016 cm−3 and 5×1017 cm−3. ... Infineon Technologies Ag

12/10/15 / #20150356907

Display device

A display device is provided. The display device comprises a display comprising a plurality of pixels arranged in a display plane. ... Infineon Technologies Ag

12/10/15 / #20150356747

Time-of-flight camera with location sensor system

A time-of-flight (tof) camera system includes a radiation source, a radiation detector, a location sensor system and a processor. The radiation source is configured to generate and emit a radiation that strikes a target object. ... Infineon Technologies Ag

12/10/15 / #20150356334

Antenna arrangement and method for operating an antenna arrangement

In various embodiments, an antenna arrangement is provided. The antenna arrangement includes a first antenna and a second antenna. ... Infineon Technologies Ag

12/10/15 / #20150355319

Method, device and system for processing radar signals

A device is suggested for processing input data received by several antennas, the device including a processing unit including a buffer and at least one multiplier, wherein the processing unit is configured to calculate a second stage fft result based on input data received by a first antenna, multiply the second stage fft result for the first antenna with a first compensation value, and store the result in the buffer. The processing unit is further configured to calculate a second stage fft result based on input data received by a second antenna, multiply the second stage fft for the second antenna with a second compensation value, and add the result to the value stored in the buffer.. ... Infineon Technologies Ag

12/10/15 / #20150355293

Sensor system

A spinning current hall sensor configured to provide a sequence of input signals in response to a bias current being applied to a sequence of terminals of hall sensing elements of the hall sensor, the terminals of the halls sensing elements configured to be interconnected in a sequence of configurations between a bias current supply and ground, with the bias current supply being connected to and applying the bias current to a different one of the terminals of each configuration. A chopping circuit demodulates the sequence of input signals to provide a corresponding sequence of demodulated positive and negative signals, with a residual offset calibration signal for the spinning current hall sensor being based on the sequence of demodulated positive and negative signals.. ... Infineon Technologies Ag

12/10/15 / #20150355292

Method for redundantly measuring a magnetic field

A method for redundantly measuring a magnetic field for a sensor arrangement including a carrier having a first side and a second side, a first sensor disposed on a first semiconductor substrate on the first side of the carrier, and a second sensor disposed on a second semiconductor substrate on the second side of the carrier, the method including: sensing a component of a magnetic field perpendicular to the carrier with the first sensor and sensing the same component of the magnetic field perpendicular to the carrier with the second sensor.. . ... Infineon Technologies Ag

12/10/15 / #20150355291

Magnetic sensor device with ring-shaped magnet

A magnetic sensor device includes a ring-shaped magnet and a sensor chip arranged in an opening of the ring-shaped magnet.. . ... Infineon Technologies Ag

12/10/15 / #20150354999

Sensor device and sensor arrangement

A sensor arrangement according to an embodiment includes a board with a plurality of conductive lines of a first type, and a plurality of conductive lines of a second type different from the conductive lines of the first type, and a recess. The sensor arrangement further includes a plurality of sensor devices mechanically accommodated on a main surface of the board and arranged around the recess, each sensor device being electrically coupled to the conductive lines of the first type and at least to one of the conductive lines of the second type, wherein each conductive line of the second type electrically couples a sensor device with at least one other item different from the sensor devices of the plurality of sensor devices. ... Infineon Technologies Ag

12/03/15 / #20150350241

Data frame for protected data transmissions

A method for generating a data frame is disclosed which contains a user data block with the message and a code block. To generate the code block, a first data record is initially coded by means of a first coding algorithm in order to calculate a first code word. ... Infineon Technologies Ag

12/03/15 / #20150349985

Generation of manchester-decoded binary values

A method for generating manchester-decoded binary values is disclosed, in which a signal having signal edges is first of all read in. A first sequence of decoded binary values is then generated by means of first manchester decoding, in which a decoded binary value is allocated to each signal edge of the signal. ... Infineon Technologies Ag

12/03/15 / #20150349770

System and method for a radio frequency switch

In accordance with an embodiment, a circuit includes a plurality of switching networks coupled between a corresponding plurality of rf ports and a common rf port, and a control circuit. Each of the plurality of switching networks includes a first switch coupled between its corresponding rf port and the common rf port, and at least one of the plurality of switching networks includes a selectable network coupled between the first switch and the common rf port, such that the selectable network provides a dc path in a first state and a series capacitance in a second state.. ... Infineon Technologies Ag

12/03/15 / #20150349636

System and method for switched power supply current sampling

According to an embodiment, a method of operating a switching power supply includes applying a periodic switching signal to a first switch that is coupled to an output node, detecting an offset delay between applying the periodic switching signal and a change in voltage of the output node, calculating a corrected midpoint of a half phase of the periodic switching signal based on the offset delay, generating a sampling pulse based on the corrected midpoint, and sampling a current at the output node according to the sampling pulse.. . ... Infineon Technologies Ag

12/03/15 / #20150349116

Semiconductor device having an active trench and a body trench

A semiconductor substrate having a first main surface and a transistor cell includes a drift region, a body region between the drift region and the first main surface, an active trench at the first main surface extending into the drift region, a gate insulating layer at sidewalls and a bottom side of the active trench, a gate conductive layer in the active trench, a source region in the body region, and adjacent to the active trench, a body trench at the first main surface extending into the drift region, the body trench being adjacent to the body region and to the drift region, an insulating layer at sidewalls and at a bottom side of the body trench, the insulating layer being asymmetric with respect to an axis extending perpendicular to the first main surface at a center of the body trench, and a conductive layer in the body trench.. . ... Infineon Technologies Ag

12/03/15 / #20150349097

Method of manufacturing a semiconductor device having a rectifying junction at the side wall of a trench

A method for forming a field-effect semiconductor device includes: providing a wafer having a main surface and a first semiconductor layer of a first conductivity type; forming at least two trenches from the main surface partly into the first semiconductor layer so that each of the at least two trenches includes, in a vertical cross-section substantially orthogonal to the main surface, a side wall and a bottom wall, and that a semiconductor mesa is formed between the side walls of the at least two trenches; forming at least two second semiconductor regions of a second conductivity type in the first semiconductor layer so that the bottom wall of each of the at least two trenches adjoins one of the at least two second semiconductor regions; and forming a rectifying junction at the side wall of at least one of the at least two trenches.. . ... Infineon Technologies Ag

12/03/15 / #20150349066

Semiconductor device, silicon wafer and silicon ingot

A cz silicon ingot is doped with donors and acceptors and includes an axial gradient of doping concentration of the donors and of the acceptors. An electrically active net doping concentration, which is based on a difference between the doping concentrations of the donors and acceptors varies by less than 60% for at least 40% of an axial length of the cz silicon ingot due to partial compensation of at least 20% of the doping concentration of the donors by the acceptors.. ... Infineon Technologies Ag

12/03/15 / #20150348921

Processing of thick metal pads

In an embodiment of the present invention, a method of forming a semiconductor device includes providing a semiconductor substrate including a first chip region and a second chip region. A first contact pad is formed over the first chip region and a second contact pad is formed over the second chip region. ... Infineon Technologies Ag

12/03/15 / #20150348882

Three-dimensional stack of leaded package and electronic member

An electronic device comprising a package comprising an encapsulated electronic chip, at least one at least partially exposed electrically conductive carrier lead for mounting the package on and electrically connecting the electronic chip to a carrier, and at least one at least partially exposed electrically conductive connection lead, and an electronic member stacked with the package so as to be mounted on and electrically connected to the package by the at least one connection lead.. . ... Infineon Technologies Ag

12/03/15 / #20150348864

Connectable package extender for semiconductor device package

A semiconductor packaging system includes a semiconductor device package having a semiconductor chip with two or more terminals and a protective structure encapsulating and electrically insulating the semiconductor chip. Two or more electrical conductors that are each electrically connected to one of the terminals extend to an outer surface of the protective structure. ... Infineon Technologies Ag

12/03/15 / #20150348852

Etching apparatus and method

An etchant is supplied to a workpiece. Furthermore, the workpiece is irradiated with spatially modulated light to adjust a temperature profile of the workpiece while etchant is supplied.. ... Infineon Technologies Ag

12/03/15 / #20150348824

Semiconductor wafer and method for processing a semiconductor wafer

According to various embodiments, a semiconductor wafer may include: a semiconductor body including an integrated circuit structure; and at least one tetrahedral amorphous carbon layer formed at least one of over or in the integrated circuit structure, the at least one tetrahedral amorphous carbon layer may include a substance amount fraction of sp3-hybridized carbon of larger than approximately 0.4 and a substance amount fraction of hydrogen smaller than approximately 0.1.. . ... Infineon Technologies Ag

12/03/15 / #20150348776

Method of manufacturing a semiconductor device with a continuous silicate glass structure

A method of manufacturing a semiconductor device includes forming a continuous silicate glass structure over a first surface of a semiconductor body, including a first part of the continuous glass structure over an active area of the semiconductor body and a second part of the continuous glass structure over an area of the semiconductor body outside of the active area. A first composition of dopants included in the first part of continuous glass structure differs from a second composition of dopants of the second part of the continuous glass structure.. ... Infineon Technologies Ag

12/03/15 / #20150347758

Methods and systems for securely transferring embedded code and/or data designed for a device to a customer

The invention relates to methods and systems for securely transferring embedded code or data to a customer, in particular to methods and systems for securely transferring embedded code, data files or program files designed for a device to a customer in order to prevent the embedded code, data files or program files from being used on unauthorized devices.. . ... Infineon Technologies Ag

12/03/15 / #20150347227

Marker programming in non-volatile memories

A method for accessing a non-volatile memory is presented. The method comprises reading a first memory region of the non-volatile memory and ascertaining whether the first memory region contains a predetermined data pattern. ... Infineon Technologies Ag

12/03/15 / #20150346744

Method and apparatus for compensating pvt variations

A method and device for compensating pvt (process, voltage temperature) variations are disclosed. In some embodiments an integrated circuit includes a buffer circuit and a pvt (process, temperature, voltage) compensation circuit configured to compensate a pvt variation of the buffer circuit, wherein the pvt compensation circuit includes adders and subtractors.. ... Infineon Technologies Ag

12/03/15 / #20150346703

State observers

State observers and systems using wave digital filter models are discussed.. . ... Infineon Technologies Ag

12/03/15 / #20150346270

Test method and test arrangement

A test method in accordance with one or more embodiments may include: providing a semiconductor device to be tested, the semiconductor device including at least one device cell, the at least one device cell having at least one trench, at least one first terminal electrode region and at least one second terminal electrode region, at least one gate electrode, and at least one additional electrode disposed at least partially in the at least one trench, wherein an electrical potential of the at least one additional electrode may be controlled separately from electrical potentials of the at least one first terminal electrode region, the at least one second terminal electrode region and the at least one gate electrode; and applying at least one electrical test potential to at least the at least one additional electrode to detect defects in the at least one device cell.. . ... Infineon Technologies Ag

12/03/15 / #20150346265

Floating connector safety protection

In one example, a method includes outputting, during a first phase, a first current level at a connector, and outputting, during a second phase, a second current level at the connector, wherein the second current level is complementary to the first current level. In this example, the method also includes determining whether or not a voltage level of the connector satisfies a threshold, and responsive to determining that the voltage level of the connector satisfies the threshold, determining that the connector is floating.. ... Infineon Technologies Ag

12/03/15 / #20150346245

Current or voltage sensing

An example relates to a circuit comprising an electronic switching element and an temperature compensating element, which is arranged in the vicinity of the electronic switching element.. . ... Infineon Technologies Ag

12/03/15 / #20150346242

High di/dt capacity measurement hardware

Hardware test systems are provided that have an electrical test loop with a minimum length of less than 200 mm, a maximum di/dt capacity of at least 1500a/μs and a minimum parasitic inductance of less than 100 nh. The hardware tests systems can be used for commutation measurement or other test applications requiring low stray inductance.. ... Infineon Technologies Ag

12/03/15 / #20150346037

Integrated temperature sensor

An integrated temperature sensor comprising a barrier layer connecting at least two conductive elements, wherein the barrier layer has a positive temperature coefficient.. . ... Infineon Technologies Ag

12/03/15 / #20150344730

Primer composition, method of forming a primer layer on a semiconductor device, and method of encapsulating a semiconductor device

A primer composition is provided. The primer composition includes at least one bi- or multi-functional benzoxazine compound; and at least one compound including a functional group having affinity for a metallic surface, and a cross-linkable group. ... Infineon Technologies Ag

12/03/15 / #20150344294

Lead frame based mems sensor structure

A sensor structure is disclosed. The sensor structure may include a lead frame for supporting a mems sensor, a recess in a surface of the lead frame, and a mems sensor coupled to the surface of the lead frame and arranged over the recess to form a chamber. ... Infineon Technologies Ag

11/26/15 / #20150342073

Electronic module and method of manufacturing the same

An electronic module is provided, comprising an electronic chip arranged in the electronic module and comprising an input terminal and an output terminal; a first current path electrically connected to the input terminal; a second current path electrically connected to the output terminal; and an insulation arranged between the first current path and the second current path, wherein the first current path and the second current path extend in the same direction and arranged in close proximity to each other.. . ... Infineon Technologies Ag

11/26/15 / #20150342055

Semiconductor module with low inductance load connections

A semiconductor module includes a printed circuit board, and first and second embedded semiconductor chips. The first and second semiconductor chips each have a first load connection and a second load connection. ... Infineon Technologies Ag

11/26/15 / #20150341726

Method for manufacturing an opening structure and opening structure

A method for manufacturing an opening structure is provided. The method may include: forming a patterned mask over a first side of a carrier; forming material over the first side of the carrier covering at least a portion of the carrier; forming a first opening in the carrier from a second side of the carrier opposite the first side of the carrier to at least partially expose a surface of the patterned mask; and forming a second opening in the material from the second side of the carrier using the patterned mask as a mask.. ... Infineon Technologies Ag

11/26/15 / #20150340888

Battery management system

A device comprises a control entity configured to monitor an operation parameter of at least one battery cell of a battery. The device further comprises an interface coupled with a power line of the battery and configured to transceive control data via at least one of load modulation or load demodulation of a power line signal of the power line.. ... Infineon Technologies Ag

11/26/15 / #20150340487

Semiconductor device having a lower diode region arranged below a trench

A semiconductor device includes a semiconductor body and at least one device cell integrated in the semiconductor body. Each device cell includes: a drift region, a source region, and a body region arranged between the source and drift regions; a diode region and a pn junction between the diode and drift regions; a trench having a first sidewall, a second sidewall opposite the first sidewall, and a bottom, the body region adjoining the first sidewall, the diode region adjoining the second sidewall, and the pn junction adjoining the bottom; a gate electrode in the trench and dielectrically insulated from the body, diode and drift regions by a gate dielectric. ... Infineon Technologies Ag

11/26/15 / #20150340442

Drain extended field effect transistors and methods of formation thereof

In an embodiment of the invention, a semiconductor device includes a first region having a first doping type, a channel region having the first doping type disposed in the first region, and a retrograde well having a second doping type. The second doping type is opposite to the first doping type. ... Infineon Technologies Ag

11/26/15 / #20150340307

Molded chip package and method of manufacturing the same

A method of manufacturing a molded chip package is provided which comprises arranging an electronic chip on a supporting structure; forming an isolation layer at least on portions of the electronic chip; and molding an encapsulation which covers the electronic chip and the supporting structure at least partially by using a molding material comprising a matrix material and a conductive filler material.. . ... Infineon Technologies Ag

11/26/15 / #20150340306

Semiconductor device package having asymmetric chip mounting area and lead widths

A semiconductor device package includes a solid metal base with a top surface and an electrically conductive chip mounting area on the top surface. First and second pairs of conductive leads are attached to the base and extend away from one another in opposite directions. ... Infineon Technologies Ag

11/26/15 / #20150340277

Method for manufacturing a semiconductor device and semiconductor device

A method for manufacturing a semiconductor device in accordance with various embodiments may include: forming an opening in a first region of a semiconductor substrate, the opening having at least one sidewall and a bottom; implanting dopant atoms into the at least one sidewall and the bottom of the opening; configuring at least a portion of a second region of the semiconductor substrate laterally adjacent to the first region as at least one of an amorphous or polycrystalline region; and forming an interconnect over at least one of the first and second regions of the semiconductor substrate.. . ... Infineon Technologies Ag

11/26/15 / #20150340234

Method for processing a semiconductor device and semiconductor device

A method for processing a semiconductor device in accordance with various embodiments may include: depositing a first metallization material over a semiconductor body; performing a heating process so as to form at least one region in the semiconductor body including a eutectic of the first metallization material and material of the semiconductor body; and depositing a second metallization material over the semiconductor body so as to contact the semiconductor body via the at least one region in the semiconductor body.. . ... Infineon Technologies Ag

11/26/15 / #20150340224

Method for coating a workpiece

In various embodiments, a method for coating a workpiece is provided. The method may include drying a workpiece, the workpiece being coated with at least one oxide layer as an uppermost layer; depositing a dielectric layer over the uppermost layer of the dried workpiece; wherein the workpiece is continuously subject to a pressure which is lower than atmospheric pressure during the drying process and during the depositing process.. ... Infineon Technologies Ag

11/26/15 / #20150340148

Inductor and method of forming an inductor

An inductor for a semiconductor device is provided, which may include: a plurality of structured metallization layers, wherein the plurality of structured metallization layers includes at least a first metallization layer, a second metallization layer disposed over the first metallization layer, a third metallization layer disposed over the second metallization layer, and a fourth metallization layer disposed over the third metallization layer; wherein a portion of the first metallization layer and a portion of the fourth metallization layer form a first coil; wherein a portion of the second metallization layer and a portion of the third metallization layer form a second coil; and wherein the second coil is arranged within the inner space defined by the first coil.. . ... Infineon Technologies Ag

11/26/15 / #20150339565

Smart card module, smart card, and method for producing a smart card module

A smart card module includes a substrate having a first main surface and a second main surface, which is opposite the first main surface. The substrate has a plurality of plated-through holes, which extend through the substrate from the first main surface to the second main surface. ... Infineon Technologies Ag

11/26/15 / #20150338285

System and method for a capacitive thermometer

Various embodiments disclosed herein include a capacitive thermometer including a deflectable membrane and a sense electrode. The deflectable membrane is configured to adjust a capacitive value based on a temperature of the deflectable membrane.. ... Infineon Technologies Ag

11/26/15 / #20150338282

Remote temperature sensing

In one example, a method includes determining, by a device, a plurality of voltage values that each correspond to a respective voltage drop across a remote p-n junction while the remote p-n junction is biased at different respective current levels, wherein each of the plurality of voltage values is a function of at least: one of the different respective current levels, a temperature of the remote p-n junction, and a series resistance between the device and the remote p-n junction. In this example, the method also includes, determining, by the device, an intermediate value based on a difference between at least three voltage values of the plurality of voltage values, wherein the intermediate value is not a function of the series resistance, and determining the temperature of the remote p-n junction based on the intermediate value such that the temperature is not a function of the series resistance.. ... Infineon Technologies Ag

11/26/15 / #20150336434

Apparatus and method for determining a state parameter of an object to be monitored

An apparatus for determining a driving situation of a vehicle to be monitored is disclosed. The apparatus comprises a provider configured to provide measurement values, wherein the provider is configured to obtain the measurement values at non-equidistant sampling instants, wherein the measurement values comprise information relating to the driving situation of the vehicle to be monitored. ... Infineon Technologies Ag

11/26/15 / #20150336314

Device package configuration and method for compensating for unbalanced resin flow in mold cavities

A semiconductor package formation arrangement includes a mold housing with an interior cavity having top, bottom and first and second end sides. A gate for transferring liquefied molding material extends to the first end side. ... Infineon Technologies Ag

11/19/15 / #20150334800

Standby power for led drivers

Methods, devices, and circuits are disclosed regulating a first parameter of one or more leds. The methods, devices, and circuits may further be disclosed switching, in response to an indication of a dimmer interface, from regulating the first parameter of the one or more leds to regulating a second parameter below a light generation threshold of the one or more leds, and switching from regulating the first parameter to regulating the second parameter causes the one or more leds to enter a non-light generation mode.. ... Infineon Technologies Ag

11/19/15 / #20150334499

Glitch detection and method for detecting a glitch

System and method for detecting a glitch is disclosed. An embodiment comprises increasing a bias voltage of a first capacitor, sampling an input signal of a first plate of the first capacitor with a time period, mixing the input signal with the sampled input signal, and comparing the mixed signal with a reference signal.. ... Infineon Technologies Ag

11/19/15 / #20150333752

Low-power magnetic slope detecting circuit

One embodiment of the present invention relates to a method and apparatus to perform a low power activation of a system by measuring the slope of a digital signal corresponding to a motion sensor measurement value. In one embodiment, a low power activation circuit is coupled to magnetic motion sensor configured to output a magnetic signal proportional to a measured magnetic field. ... Infineon Technologies Ag

11/19/15 / #20150333696

System and method for a voltage controlled oscillator

In accordance with an embodiment, a voltage controlled oscillator (vco) includes a vco core having a plurality of transistors, a bias resistor coupled between collector terminals of the vco core and a first supply node, and a varactor circuit coupled to emitter terminals of the vco core. The bias resistor is configured to limit a self-bias condition of the vco core.. ... Infineon Technologies Ag

11/19/15 / #20150333397

Communication module

Various embodiments provide a communication module having a carrier, a loop antenna, a modulation circuit which is coupled to the loop antenna and is configured to modulate or demodulate signals which are received or transmitted using the loop antenna, and an impedance matching circuit for matching the impedance of the loop antenna to the input impedance of the modulation circuit. The modulation circuit and the impedance matching circuit are arranged inside the loop antenna on or in the carrier.. ... Infineon Technologies Ag

11/19/15 / #20150333395

Packaged antenna and method for producing same

Electronic apparatus having an antenna chip with a substrate and an antenna structure, and a method of producing the same. The antenna chip is integrated or packaged in a package having a chip mounting surface for mounting the antenna chip, and an encapsulating material. ... Infineon Technologies Ag

11/19/15 / #20150333161

Insulated gate bipolar transistor

A semiconductor component is described herein. In accordance with one example of the invention, the semiconductor component includes a semiconductor body, which has a top surface and a bottom surface. ... Infineon Technologies Ag

11/19/15 / #20150333060

Semiconductor device

A semiconductor device includes a semiconductor body having a first surface and a second surface opposite to the first surface. The semiconductor body includes a load current component having a load current transistor area and a sensor component including a sensor transistor area. ... Infineon Technologies Ag

11/19/15 / #20150333058

Semiconductor device in a semiconductor substrate and method of manufacturing a semiconductor device in a semiconductor substrate

A semiconductor device in a semiconductor substrate includes a trench in a first main surface of the semiconductor substrate. The trench includes a first trench portion extending in a first direction and a second trench portion extending in the first direction. ... Infineon Technologies Ag

11/19/15 / #20150333034

Semiconductor module bonding wire connection method

A method includes providing a subassembly having a circuit carrier with a first metallic surface portion, a first joining partner, which is integrally connected to the first metallic surface portion by means of a first connecting layer, and a second metallic surface portion. In a heat treatment, the second metallic surface portion is held uninterruptedly at temperatures which are higher than a minimum heat-treatment temperature of at least 300° c. ... Infineon Technologies Ag

11/19/15 / #20150333023

Semiconductor device having solderable and bondable electrical contact pads

A semiconductor device includes a semiconductor chip and a plurality of electrical contact pads disposed on a main face of the semiconductor chip, wherein the electrical contact pads each include a layer stack, each layer stack having one and the same order of layers, and wherein the electrical contact pads are both solderable and bondable.. . ... Infineon Technologies Ag

11/19/15 / #20150332956

Mechanical stress-decoupling in semiconductor device

According to a method in semiconductor device fabrication, a first trench and a second trench are concurrently etched in a semi-finished semiconductor device. The first trench is a mechanical decoupling trench between a first region of an eventual semiconductor device and a second region thereof. ... Infineon Technologies Ag

11/19/15 / #20150332951

Wafer releasing

Embodiments of the present invention provide a chuck system for handling a wafer that comprises a first and a second main surface. The chuck system includes a chuck configured to hold the wafer at the second main surface facing the chuck and a release device. ... Infineon Technologies Ag

11/19/15 / #20150332938

Electronic device package including metal blocks

A method of manufacturing an electronic device package includes structuring a metal layer to generate a structured metal layer having a plurality of openings. Semiconductor chips are placed into at least some of the openings. ... Infineon Technologies Ag

11/19/15 / #20150332756

Method for accessing a memory and memory access circuit

In accordance with one embodiment, a method for accessing a memory is provided, including carrying out a first access to the memory and charging, for a memory cell, a bit line coupled to the memory cell to a value which is stored or to be stored in the memory cell, holding the state of the bit line until a second access, which follows the first access, and outputting the held state if the second access is a read access to the memory cell.. . ... Infineon Technologies Ag

11/19/15 / #20150331810

Randomized memory access

An embodiment relates to a device for a memory access, the device comprising a first component for conducting operations on the memory and a second component for accessing the memory in a randomized manner, wherein the first component conducts at least a portion of the operations via the second component.. . ... Infineon Technologies Ag

11/19/15 / #20150331070

Magnetic-field sensor

An embodiment of a magnetic-field sensor includes a magnetic-field sensor arrangement and a magnetic body which has, for example, a non-convex cross-sectional area with regard to a cross-sectional plane running through the magnetic body, the magnetic body having an inhomogeneous magnetization.. . ... Infineon Technologies Ag

11/19/15 / #20150331069

Magnetic-field sensor

An embodiment of a magnetic-field sensor includes a magnetic-field sensor arrangement and a magnetic body which has, for example, a non-convex cross-sectional area with regard to a cross-sectional plane running through the magnetic body, the magnetic body having an inhomogeneous magnetization.. . ... Infineon Technologies Ag

11/19/15 / #20150331067

Sensor device and sensor arrangement

A vertical hall sensor structure according to an embodiment includes a hall effect region arranged between a first interface and a second interface of the hall effect region, a first contact, a second contact, a third contact, and a fourth contact, the first, second, third and fourth contacts being closer to the first interface than to the second interface and in contact with the hall effect region, wherein an electrical resistance between the first and second contacts is substantially equal to an electrical resistance between the third and second contacts, a conductive layer closer to the second interface than to the first interface and in contact with the hall effect region, the conductive layer comprising a higher conductivity than the hall effect region, wherein a resistance between the fourth contact and the conductive layer is lower than a resistance between the second contact and the conductive layer.. . ... Infineon Technologies Ag

11/19/15 / #20150331056

Battery charge meter testing

A circuit includes a first analog to digital converter configured to convert an analog voltage sample of a rechargeable power source into a digital voltage value, a second analog to digital converter configured to convert an analog current sample of the rechargeable power source into a digital current value, a charge state controller configured to determine a charge state of the rechargeable power source based on the digital voltage value and the digital current value, and a communication interface configured to output a computer-readable indication of the charge state. The charge state controller is further configured to receive pregenerated voltage values and pregenerated current values, and determine a simulated charge state of the rechargeable power source based on the pregenerated voltage values and the pregenerated current values. ... Infineon Technologies Ag

11/19/15 / #20150331013

Multi-channel probe plate for semiconductor package test systems

A test apparatus includes a multi-channel probe plate having an electrically insulating body with opposing first and second main surfaces, and a plurality of spaced apart electrically conductive coupling regions embedded in or attached to the body at the first main surface. Each of the electrically conductive coupling regions is configured to cover a different zone of a semiconductor package when the semiconductor package is positioned in close proximity to the first main surface of the plate. ... Infineon Technologies Ag

11/19/15 / #20150330836

Photocell devices, systems and methods

Embodiments relate to photoreceivers, such as photodiodes. In one embodiment, an integrated circuit device comprises a photodiode, and an electrode arranged over or on top of the photodiode. ... Infineon Technologies Ag

11/12/15 / #20150326336

System having plastic waveguides

The present disclosure relates to a system having a plurality of electronic devices interconnected by way of dielectric waveguides. In some embodiments, the system has a plurality of electronic devices respectively including a data element and a multiplexing element. ... Infineon Technologies Ag

11/12/15 / #20150326203

Phase interpolator

Phase interpolators are provided where an adjustment current is added to currents from a plurality of switchable current sources, for example to reduce an integrated nonlinearity.. . ... Infineon Technologies Ag

11/12/15 / #20150325999

Method of operating an electronic circuit with an electronic switch

The present disclosure relates to a method of advanced motor control that reduces the resource demands (e.g., run-time) used to meet safety requirements by running a reduced portion of feedback control loop processes twice. In some embodiments, the method performs a plurality of processes within a feedback control loop of a motor control process configured to control operation of a motor. An electronic circuit includes an electronic switch having a control terminal and a load path and also includes a monitoring circuit comprising a switched-capacitor circuit with at least one capacitive storage element. The switched-capacitor circuit coupled to the load path of the electronic switch. ... Infineon Technologies Ag

11/12/15 / #20150325688

Semiconductor device and reverse conducting insulated gate bipolar transistor with isolated source zones

A semiconductor device includes a semiconductor mesa with at least one body zone forming first pn junctions with source zones and a second pn junction with a drift zone. A pedestal layer at a side of the drift zone opposite to the at least one body zone includes first zones of a conductivity type of the at least one body zone and second zones of the conductivity type of the drift zone. ... Infineon Technologies Ag

11/12/15 / #20150325535

Method for processing a semiconductor workpiece and semiconductor workpiece

A method for processing a semiconductor device in accordance with various embodiments may include: depositing a first metallization layer over a semiconductor workpiece; patterning the first metallization layer; and depositing a second metallization layer over the patterned first metallization layer, wherein depositing the second metallization layer includes an electroless deposition process including immersing the patterned first metallization layer in a metal electrolyte.. . ... Infineon Technologies Ag

11/12/15 / #20150325503

Method of singularizing packages and leadframe

A method of singularizing a matrix array of packages is provided, wherein the method comprises providing a matrix array of packages, wherein the matrix array is formed on a leadframe; cutting predefined leads of the leadframe by a punching process; and singularizing the packages of the matrix array of packages by a sawing process.. . ... Infineon Technologies Ag

11/12/15 / #20150325440

Method for forming a semiconductor device and semiconductor device

A method for forming a semiconductor device includes depositing an epitaxial layer on a semiconductor substrate, forming an oxygen diffusion region within the epitaxial layer by oxygen diffusion from the semiconductor substrate into a part of the epitaxial layer and tempering at least the oxygen diffusion region of the epitaxial layer at a temperature between 400° c. And 480° c. ... Infineon Technologies Ag

11/12/15 / #20150324599

Processing data in a device

According to an example, a device for processing data is suggested, said device comprising a first component, wherein the first software component is arranged for receiving the data; a security processor for receiving said data and a first signature, wherein the security processor is arranged for determining based on the first signature whether the data are valid; for determining a second signature for the data; and for conveying the second signature to the first component.. . ... Infineon Technologies Ag

11/12/15 / #20150323614

Vertical hall effect device

A vertical hall effect device includes at least four hall effect regions which are partly decoupled from each other, and each of the at least four hall effect regions has first and second opposite faces. Each of the hall effect regions has on the first face a first contact and a second contact that are placed symmetrically with respect to a plane of symmetry at the respective hall effect region, wherein the plane of symmetry is orientated perpendicular to a straight line between the first contact and the second contact of the respective hall effect region. ... Infineon Technologies Ag

11/12/15 / #20150323613

Vertical hall effect-device

A vertical hall effect device is provided and includes a hall effect layer having a first, second, third, and fourth hall effect region, which are at least partly decoupled from each other. The hall effect layer has first and second opposite faces and the vertical hall effect device has a terminal composition comprising a first, second, third and fourth terminal. ... Infineon Technologies Ag

11/12/15 / #20150321901

Semiconductor devices and methods of forming thereof

In accordance with an embodiment of the present invention, a method of forming a semiconductor device includes forming a sacrificial layer over a first surface of a workpiece having the first surface and an opposite second surface. A membrane is formed over the sacrificial layer. ... Infineon Technologies Ag

11/05/15 / #20150318980

Phase detector

A phase detector device having a modulo n operator coupled with an adder is disclosed. Furthermore, clock recovery devices using such a phase detector device are discussed.. ... Infineon Technologies Ag

11/05/15 / #20150318867

High performance crc calculation with small footprint

A cyclic redundancy check (crc) can be determined with fewer resources within a communication system. A crc interface component is configured to receive an array of bits as an input via an n-bit data pathway, and receive a crc previous output from a feedback component coupled to a crc output, in which n can comprise an integer greater than one. ... Infineon Technologies Ag

11/05/15 / #20150318394

Tunable stressed polycrystalline silicon on dielectrics in an integrated circuit

A method of forming an integrated circuit device is disclosed. A polycrystalline silicon layer is formed in direct contact with a dielectric material so that the dielectric material induces a stress in the polycrystalline silicon layer as the polycrystalline silicon layer is formed. ... Infineon Technologies Ag

11/05/15 / #20150318384

Bipolar transistor

A bipolar transistor and a method for fabricating a bipolar transistor are disclosed. In one embodiment the bipolar transistor includes a semiconductor body including a collector region and a base region arranged on top of the collector region, the collector region being doped with dopants of a second doping type and the base region being at least partly doped with dopants of a first doping type and an insulating spacers arranged on top of the base region. ... Infineon Technologies Ag

11/05/15 / #20150318347

Semiconductor device with a field ring edge termination structure and a separation trench arranged between different field rings

A semiconductor device has a semiconductor body with bottom and top sides and a lateral surface. An active semiconductor region is formed in the semiconductor body and an edge region surrounds the active semiconductor region. ... Infineon Technologies Ag

11/05/15 / #20150318272

Semiconductor device including a phase change material

A semiconductor device includes a transistor having a plurality of transistor cells in a semiconductor body. Each transistor cell includes a control terminal and first and second load terminals. ... Infineon Technologies Ag

11/05/15 / #20150318199

Thin substrate electrostatic chuck system and method

In various aspects of the disclosure, a semiconductor substrate processing system may include an electrostatic chuck for holding a semiconductor substrate attached to an electrically insulating carrier; and an ac power supply electrically coupled to the electrostatic chuck.. . ... Infineon Technologies Ag

11/05/15 / #20150317553

Smart card module, smart card body, smart card and smart card production method

In various embodiments, a smart card module is provided. The smart card module includes a carrier having a first main surface and a second main surface opposite the first main surface. ... Infineon Technologies Ag

11/05/15 / #20150316641

Automotive radar transmitter architecture

One embodiment of the present invention relates to a transmitter within a single integrated chip substrate, which is capable of continuous beam steering of a transmitted radar beam as well as an option to change the physical position of the origin of the transmit radar beam. The transmitter has a signal generator that generates an rf signal. ... Infineon Technologies Ag

11/05/15 / #20150316586

Systems and methods for high voltage bridge bias generation and low voltage readout circuitry

A multi voltage sensor system includes one or more charge pumps, a sensor bridge and readout circuitry. The one or more charge pumps are configured to provide a high voltage. ... Infineon Technologies Ag

10/29/15 / #20150312053

Bus architecture and access method for plastic waveguide

The present disclosure relates to a system that uses a switch to convey wireless signals between a plurality of electronic devices interconnected by dielectric waveguides. In some embodiments, the system includes a plurality of electronic devices respectively having a transceiver element that generates a wireless signal that transmits a data packet. ... Infineon Technologies Ag

10/29/15 / #20150311922

System and method for a radio frequency integrated circuit

In accordance with an embodiment, a radio frequency integrated circuit (rfic) includes an adjustable capacitance coupled to an input terminal of the rfic, and a first single-pole multiple-throw (spmt) radio frequency (rf) switch having an input coupled to the adjustable capacitance and a plurality of output nodes coupled to a corresponding plurality of second output terminals of the rfic.. . ... Infineon Technologies Ag

10/29/15 / #20150311883

System and method for a switchable capacitance

In accordance with an embodiment, a switchable capacitance circuit includes a plurality of capacitance-switch cells that each have a capacitance circuit having a capacitance between a first terminal and a second terminal of the capacitance circuit, and a semiconductor switching circuit including a first terminal coupled to the first terminal of the capacitance circuit, a plurality of series connected radio-frequency (rf) switch cells having a load path and a common node. Each of the plurality of series connected rf switch cells has a switch transistor and a gate resistor having a first end coupled to a gate of the switch transistor and a second end coupled to the common node. ... Infineon Technologies Ag

10/29/15 / #20150311870

System and method for capacitive signal source amplifier

In accordance with an embodiment, a system for amplifying a signal provided by a capacitive signal source includes a first voltage follower device, a second voltage follower device, and a first capacitor. The first voltage follower device includes an input terminal configured to be coupled to a first terminal of the capacitive signal source, and the second voltage follower device includes an input terminal coupled to the first output terminal of the first voltage follower device, and an output terminal coupled to a second output terminal of the first voltage follower device. ... Infineon Technologies Ag

10/29/15 / #20150311317

Method of manufacturing a semiconductor device

A method of manufacturing a semiconductor device includes forming a transistor in a semiconductor substrate having a first main surface. The transistor is formed by forming a source region, forming a drain region, forming a channel region, forming a drift zone, and forming a gate electrode adjacent to at least two sides of the channel region. ... Infineon Technologies Ag

10/29/15 / #20150311294

Method for producing a controllable semiconductor component having a plurality of trenches

A method of producing a controllable semiconductor component includes providing a semiconductor body with a top side and a bottom side, and forming a first trench protruding from the top side into the semiconductor body and a second trench protruding from the top side into the semiconductor body. The first trench has a first width and a first depth, and the second trench has a second width greater than the first width and a second depth greater than the first depth. ... Infineon Technologies Ag

10/29/15 / #20150311202

Semiconductor chip

According to one embodiment, a chip has a circuit with at least one p channel field effect transistor (fet); at least one n channel fet; a first and a second power supply terminal; wherein the n channel fet, if supplied with the upper supply potential at its gate, supplies the lower supply potential to the gate of the p channel fet; and the p channel fet, if supplied with the lower supply potential at its gate, supplies the upper supply potential to the gate of the n channel fet; wherein the logic state of the gate of the p channel fet and of the n channel fet can only be changed by at least one of the first and second supply voltage to the circuit; and a connection coupled to the gate of the p channel fet or the n channel fet and a further component of the semiconductor chip.. . ... Infineon Technologies Ag

10/29/15 / #20150311196

Integrated semiconductor device having a level shifter

An integrated semiconductor device is provided. According to an embodiment, the integrated semiconductor device includes a semiconductor body having a first surface with a normal direction defining a vertical direction, an opposite surface, a first area including a vertical power field-effect transistor structure, a second area including a three-terminal step-down level-shifter, and a third area including a three-terminal step-up level-shifter. ... Infineon Technologies Ag

10/29/15 / #20150311163

Anchoring structure and intermeshing structure

An anchoring structure for a metal structure of a semiconductor device includes an anchoring recess structure having at least one overhanging side wall, the metal structure being at least partly arranged within the anchoring recess structure.. . ... Infineon Technologies Ag

10/29/15 / #20150311157

Nanotube structure based metal damascene process

In various embodiments a method for manufacturing a metallization layer on a substrate is provided, wherein the method may include forming a plurality of groups of nanotubes over a substrate, wherein the groups of nanotubes may be arranged such that a portion of the substrate is exposed and forming metal over the exposed portion of the substrate between the plurality of groups of nanotubes.. . ... Infineon Technologies Ag

10/29/15 / #20150309950

System and method to address devices connected to a bus system

A system includes a bus system, such as a lin bus system. A number of components are connected to the bus system. ... Infineon Technologies Ag

10/29/15 / #20150309523

Circuit and method for providing a reference voltage

According one embodiment, a circuit is described comprising a first reference voltage generating circuit comprising an output to provide a first reference voltage and a second reference voltage generating circuit comprising an input receiving a value representative of the first reference voltage, the second reference voltage generating circuit being configured to generate a second reference voltage based on the received value.. . ... Infineon Technologies Ag

10/29/15 / #20150309128

Magnetic field sensor device

Magnetic field sensor devices and associated methods are disclosed. In some implementations, a second magnetic field sensor is provided, for example between bridge parts of a first magnetic field sensor.. ... Infineon Technologies Ag

10/29/15 / #20150309127

Magnetic field current sensors, sensor systems and methods

Embodiments relate to coreless magnetic field current sensors, systems and methods, such as magnetoresistive sensors, systems and methods, to sense current flow in a conductor via a related magnetic field. In an embodiment, a current sensor system for sensing a current in a conductor from a magnetic field induced thereby, comprising a plurality n of magnetoresistive (mr) sensors arranged on a circle concentric to a center of the conductor and spaced apart from one another by 360 degrees/n, wherein each mr sensor has a sensitivity plane and is responsive to a projection of the magnetic field into the sensitivity plane, the sensitivity planes of the plurality of mr sensors being parallel, and wherein the plurality of mr sensors are arranged relative to the conductor such that the magnetic field has a non-vanishing component parallel to the sensitivity plane; at least one magnetic element arranged to provide a bias magnetic field on the plurality of mr sensors; and circuitry coupled to the plurality of mr sensors to determine the current in the conductor by combining signals from each of the plurality of mr sensors.. ... Infineon Technologies Ag

10/29/15 / #20150309078

Current sensor devices and methods

Devices and methods associated with current measurements are provided. A current in a conductor portion may be measured by a current sensing element. ... Infineon Technologies Ag

10/29/15 / #20150307344

Sensor apparatus and method for producing a sensor apparatus

In various embodiments, a sensor apparatus is provided. The sensor apparatus includes a sensor device having a plurality of electrical contacts; a housing having a plurality of sidewalls; and a metal carrier structure, which extends into the housing in a manner passing through two mutually opposite sidewalls from the plurality of sidewalls. ... Infineon Technologies Ag

10/22/15 / #20150303927

Chip and method for manufacturing a chip

According to one embodiment, a chip is described comprising a plurality of supply lines delimiting a plurality of cell areas and a gate comprising a first transistor and a second transistor, wherein the first transistor is located in a first cell area of the plurality of cell areas and the second transistor is located in a second cell area of the plurality of cell areas such that a supply line of the plurality of supply lines lies between the first cell area and the second cell area.. . ... Infineon Technologies Ag

10/22/15 / #20150303260

Vertical semiconductor device

A semiconductor body includes first and second opposing surfaces, an edge extending in a vertical direction substantially perpendicular to the first surface, an active area, a peripheral area arranged in a horizontal direction substantially parallel to the first surface between the active area and edge, and a pn-junction extending from the active area into the peripheral area. In the peripheral area the semiconductor device further includes a first conductive region arranged next to the first surface, a second conductive region arranged next to the first surface, and arranged in the horizontal direction between the first conductive region and edge, and a passivation structure including a first portion at least partly covering the first conductive region, a second portion at least partly covering the second conductive region. ... Infineon Technologies Ag

10/22/15 / #20150303254

Semiconductor structure and a method for processing a carrier

According to various embodiments, a semiconductor structure may include: a first source/drain region and a second source/drain region; a body region disposed between the first source/drain region and the second source/drain region, the body region including a core region and at least one edge region at least partially surrounding the core region; a dielectric region next to the body region and configured to limit a current flow through the body region in a width direction of the body region, wherein the at least one edge region is arranged between the core region and the dielectric region; and a gate structure configured to control the body region; wherein the gate structure is configured to provide a first threshold voltage for the core region of the body region and a second threshold voltage for the at least one edge region of the body region, wherein the first threshold voltage is less than or equal to the second threshold voltage.. . ... Infineon Technologies Ag

10/22/15 / #20150303190

Semiconductor device having an insulated gate bipolar transistor arrangement and a method for forming such a semiconductor device

A semiconductor device includes an insulated gate bipolar transistor (igbt) arrangement. The igbt arrangement includes a carrier confinement reduction region laterally arranged between a cell region and a sensitive region. ... Infineon Technologies Ag

10/22/15 / #20150303135

Method for fabricating a semiconductor package and semiconductor package

A method for fabricating semiconductor packages includes providing a first substrate having an aperture, providing a first semiconductor chip, connecting the first semiconductor chip to the first substrate, filling the aperture with a first insulating material and encapsulating the semiconductor chip with a second insulating material to create a first encapsulation body.. . ... Infineon Technologies Ag

10/22/15 / #20150303134

Universal lead frame for flat no-leads packages

A universal lead frame for semiconductor packages includes a solid lead frame sheet comprising an electrically conductive material and a plurality of columns etched into the lead frame sheet and distributed with a predetermined lead pitch so that the universal lead frame has a solid first main side opposite the columns and a patterned second main side opposite the first main side. A method of manufacturing the universal lead frame includes providing a solid lead frame sheet of an electrically conductive material and etching a plurality of columns into the lead frame sheet so that the columns are distributed with a predetermined lead pitch and the universal lead frame has a solid first main side opposite the columns and a patterned second main side opposite the first main side. ... Infineon Technologies Ag

10/22/15 / #20150303128

Device including multiple semiconductor chips and multiple carriers

A device includes a first semiconductor chip that is arranged over a first carrier and includes a first electrical contact. The device further includes a second semiconductor chip arranged over a second carrier and including a second electrical contact arranged over a surface of the second semiconductor chip facing the second carrier. ... Infineon Technologies Ag

10/22/15 / #20150301552

Cable quality detection and power consumer devices

In one embodiment, a method includes receiving power at a power consumer device coupled to a power provider device by a cable. The received power is supplied at a first current at an input of the power consumer device and is supplied to a load in the power consumer device. ... Infineon Technologies Ag

10/01/15 / #20150280654

System and method for a low noise amplifier

An embodiment described herein includes a low noise amplifier (lna) including a plurality of separate input terminals, a plurality of transistors, and an output network coupled to a first reference terminal and a single output of the lna. Each transistor includes a conduction path and a control terminal coupled to one of the plurality of separate input terminals. ... Infineon Technologies Ag

10/01/15 / #20150280425

Power switch device

Power switch devices having an overload limit are provided. The overload limit may be adjusted based on an inductance coupled with the power switch device.. ... Infineon Technologies Ag

10/01/15 / #20150280416

Controlled switch-off of a power switch

A power circuit is described that includes a switch coupled to a resistive-inductive-capacitive load and a driver coupled to the switch. The driver is configured to detect an emergency event within the power circuit. ... Infineon Technologies Ag

10/01/15 / #20150280289

Lithium ion battery, integrated circuit and method of manufacturing a lithium ion battery

A lithium ion battery includes a first substrate having a first main surface, and a lid including a conductive cover element, the lid being attached to the first main surface. A cavity is formed between the first substrate and the lid. ... Infineon Technologies Ag

10/01/15 / #20150280288

Lithium ion battery, integrated circuit and method of manufacturing a lithium ion battery

A lithium ion battery includes a first substrate having a first main surface, and a lid including an insulating material. The lid is attached to the first main surface of the first substrate, and a cavity is defined between the first substrate and the lid. ... Infineon Technologies Ag

10/01/15 / #20150280287

Battery, integrated circuit and method of manufacturing a battery

A battery includes a first substrate having a first main surface, a second substrate made of a conducting material or semiconductor material, and a carrier of an insulating material. The carrier has a first and a second main surfaces, the second substrate being attached to the first main surface of the carrier. ... Infineon Technologies Ag

10/01/15 / #20150280276

Battery, a battery element and a method for forming a battery

A battery includes at least two externally accessible battery electrodes to provide a supply voltage and at least more than half of a wafer including at least two wafer electrodes. The wafer includes a plurality of trenches reaching into the wafer. ... Infineon Technologies Ag

10/01/15 / #20150280271

Method for forming a battery element, a battery element and a battery

A method for forming a battery element includes etching trenches into a substrate and crystal orientation dependent etching of the trenches. Further, the method includes forming solid state battery structures within the trenches.. ... Infineon Technologies Ag

10/01/15 / #20150280198

Battery element, a battery and a method for forming a battery

A battery element includes a substrate with a plurality of trenches extending into the substrate. At least a part of each trench of the plurality of trenches is filled with a solid state battery structure. ... Infineon Technologies Ag

10/01/15 / #20150279985

Trench transistor device

A transistor device includes a semiconductor mesa region between first and second trenches in a semiconductor body, a body region of a first conductivity type and a source region of a second conductivity type in the semiconductor mesa region, a drift region of the second conductivity type in the semiconductor body, and a gate electrode adjacent the body region in the first trench, and dielectrically insulated from the body region by a gate dielectric. The body region separates the source region from the drift region and extends to the surface of the semiconductor mesa region adjacent the source region. ... Infineon Technologies Ag

10/01/15 / #20150279978

Semiconductor device and integrated circuit

A semiconductor device includes a transistor in a semiconductor substrate having a main surface. The transistor includes a source region, a drain region, a body region, and a gate electrode structure adjacent to the body region. ... Infineon Technologies Ag

10/01/15 / #20150279968

Method for manufacturing a semiconductor device with step-shaped edge termination

A method for manufacturing a semiconductor device includes providing a semiconductor substrate having first and second sides, laterally spaced semiconductor devices integrated into the semiconductor substrate, and a drift region of a first conductivity type. Trenches are formed in the semiconductor substrate at the first side of the semiconductor substrate between laterally adjacent semiconductor devices, each of the trenches having two sidewalls and a bottom. ... Infineon Technologies Ag

10/01/15 / #20150279941

Composite wafer having a graphite core

A composite wafer including a carrier substrate having a graphite core and a monocrystalline semiconductor substrate or layer attached to the carrier substrate and a corresponding method for manufacturing such a composite wafer is provided.. . ... Infineon Technologies Ag

10/01/15 / #20150279930

Semiconductor device including a vertical edge termination structure and method of manufacturing

A semiconductor device includes a semiconductor body with a first surface at a first side, a second surface opposite to the first surface and an edge surface connecting the first and second surfaces. An edge termination structure includes a glass structure and extends along the edge surface, at least from a plane coplanar with the first surface towards the second surface. ... Infineon Technologies Ag

10/01/15 / #20150279833

Protection devices

In accordance with an embodiment of the present invention, a semiconductor package includes a die paddle and a protection device disposed over the die paddle. The protection device includes a first heat generating zone disposed in a substrate. ... Infineon Technologies Ag

10/01/15 / #20150279782

Semiconductor device

A semiconductor device is disclosed. One embodiment includes a carrier, a semiconductor chip attached to the carrier, a first conducting line having a first thickness and being deposited over the semiconductor chip and the carrier and a second conducting line having a second thickness and being deposited over the semiconductor chip and the carrier. ... Infineon Technologies Ag

10/01/15 / #20150279757

Semiconductor die package with multiple mounting configurations

A semiconductor die package includes first, second and third metal blocks insulated from one another. The first metal block has a thinner inner section, a first thicker outer section at a first end of the thinner inner section and a second thicker outer section at a second end of the thinner inner section opposing the first end. ... Infineon Technologies Ag

10/01/15 / #20150279740

Kerf preparation for backside metallization

In accordance with an embodiment of the present invention, a method of forming a semiconductor device includes attaching a substrate to a carrier using an adhesive component and forming a through trench through the substrate to expose the adhesive component. At least a portion of the adhesive component is etched and a metal layer is formed over sidewalls of the through trench.. ... Infineon Technologies Ag

10/01/15 / #20150278670

Chip card and method for operating a chip card

In various embodiments, a chip card is provided. The chip card includes a chip having a memory unit and a control unit, and a coil which is electrically coupled to the control unit and is intended to generate a magnetic field. ... Infineon Technologies Ag

10/01/15 / #20150277456

Temperature dependent current limiting

In one example, a method includes determining, by a temperature sensor, a temperature of a device that controls an amount of current flowing to a load, and determining, based on the temperature of the device, a threshold current. The method also includes, in response to determining that the amount of current flowing to the load is greater than the threshold current, adjusting the amount of current flowing to the load.. ... Infineon Technologies Ag

10/01/15 / #20150276529

Dynamic pressure sensor

According to various embodiments, a dynamic pressure sensor includes a substrate, a reference volume formed in the substrate, a deflectable membrane sealing the reference volume, a deflection sensing element coupled to the membrane and configured to measure a deflection of the membrane, and a ventilation hole configured to equalize an absolute pressure inside the reference volume with an absolute ambient pressure outside the reference volume.. . ... Infineon Technologies Ag

09/24/15 / #20150271585

Microphone package and method for providing a microphone package

A microphone package comprises a microphone. The microphone package also comprises a first analog-to-digital converter coupled to the microphone to provide a first digital signal. ... Infineon Technologies Ag

09/24/15 / #20150270994

Edge-based communication

Methods, devices and systems are disclosed where to generate a pulse a data line is actively driven to a first voltage followed by actively driving the data line to a second voltage.. . ... Infineon Technologies Ag

09/24/15 / #20150270965

Method of using a token in cryptography

Disclosed herein are techniques related to predetermining a token for use in a cryptographic system. A method includes providing a memento, mapping the memento to a candidate token according to a rule that updates a parameter, predetermine the token to be the candidate token, if the candidate token meets a test condition according to the rule, identifying a parameter value of the parameter, and providing the memento and the parameter value for future use as an input to re-generate the token. ... Infineon Technologies Ag

09/24/15 / #20150270954

Device for generating encrypted data segments

A combination module combines a subset of a plurality of successive data blocks to form a combination block. A cipher module encrypts the combination block to obtain an encrypted combination block. ... Infineon Technologies Ag

09/24/15 / #20150270369

Method of manufacturing an insulated gate bipolar transistor with mesa sections between cell trench structures

A method of manufacturing an insulated gate bipolar transistor includes providing trenches extending from a first surface to a layer section in a semiconductor portion, introducing impurities into mesa sections between the trenches, and forming, from the introduced impurities, second portions of doped regions separated from source regions by body regions. The source regions are electrically connected to an emitter electrode. ... Infineon Technologies Ag

09/24/15 / #20150270347

Semiconductor device including at least one type of deep-level dopant

A semiconductor device includes a first semiconductor region including a first semiconductor material and a second semiconductor region adjoining the first semiconductor region, the second semiconductor region including a second semiconductor material different from the first semiconductor material. The semiconductor device further includes at least one of a drift zone and a base zone in the first semiconductor region, and at least one type of deep-level dopant in an emitter region of the second semiconductor region. ... Infineon Technologies Ag

09/24/15 / #20150270276

Semiconductor device and method of forming a semiconductor device

A semiconductor device is provided, which may include: a well of a first conductivity type located within a substrate of a second conductivity type; a well terminal electrically coupled to the well; a floating gate disposed over the well; a floating gate terminal electrically coupled to the floating gate; a control gate disposed over the floating gate and electrically coupled to the well; and a control gate terminal electrically coupled to the control gate; wherein the floating gate terminal is configured to receive a first voltage; wherein the control gate terminal and the well terminal are configured to receive a second voltage.. . ... Infineon Technologies Ag

09/24/15 / #20150270132

Method of manufacturing semiconductor devices including generating and annealing radiation-induced crystal defects

The generation of auxiliary crystal defects is induced in a semiconductor substrate. Then the semiconductor substrate is pre-annealed at a temperature above a dissociation temperature at which the auxiliary crystal defects transform into defect complexes, which may be electrically inactive. ... Infineon Technologies Ag

09/24/15 / #20150270131

Method of manufacturing a vertical semiconductor device

A method for producing a vertical semiconductor device includes providing a semiconductor substrate having a first surface and comprising an n-doped first semiconductor layer, forming a hard mask on the first surface, the hard mask comprising openings defining first zones in the n-doped first semiconductor layer, implanting acceptor ions of a first maximum energy through the hard mask into the first zones, replacing the hard mask by an inverted mask comprising openings that are substantially complementary to the openings of the hard mask; implanting acceptor ions of a second maximum energy different to the first maximum energy through the inverted mask into second zones of the n-doped first semiconductor layer, and carrying out at least one temperature step to activate the acceptor ions in the first zones and the second zones.. . ... Infineon Technologies Ag

09/24/15 / #20150270130

Method for removing crystal originated particles from a crystalline silicon body

A method for removing crystal originated particles from a crystalline silicon body having opposite first and second surfaces includes increasing a surface area of at least one of the first and second surfaces. The method further includes oxidizing the increased surface area at a temperature of at least 1000° c. ... Infineon Technologies Ag

09/24/15 / #20150269294

Generation of test stimuli

Methods and apparatuses related to the generation of test stimuli are described. In some embodiments, a finite state machine is generated based on a mission profile, and test stimuli are generated based on the mission profile.. ... Infineon Technologies Ag

09/24/15 / #20150269019

Communication of information

Methods and devices are provided wherein feedback is included in a checksum.. . ... Infineon Technologies Ag

09/24/15 / #20150268263

Speed sensor device, speed sensor method, electronic control unit and control method

Embodiments relate to a speed sensor device including a sensor element to provide a sensor signal, a status module to provide status information of the speed sensor device; and a processing module to generate an output signal. The output signal is derived from the sensor signal, if the status information is indicative of a non-critical state of the speed sensor device, and the output signal is a safety message signal having signal edges such that time intervals between subsequent congeneric signal edges are equal to or shorter than a preselected threshold, if the status in-formation is indicative of a critical state of the speed sensor device. ... Infineon Technologies Ag

09/24/15 / #20150268065

Cam shaft rotation sensor

A sensor device is provided with a magnetic field sensitive element to be positioned in a magnetic field of a magnet. The magnet is positioned on an end face of a cam shaft of an engine. ... Infineon Technologies Ag

09/24/15 / #20150267304

Methods for etching a workpiece, an apparatus configured to etch a workpiece, and a non-transitory computer readable medium

A method for etching a workpiece may be provided, which may include: determining a plurality of reference etch profiles for a plurality of positions of an etchant dispenser, each reference etch profile corresponding to a respective position of the plurality of positions of the etchant dispenser; determining a thickness profile of the workpiece; determining a respective etch duration for each position of the plurality of positions of the etchant dispenser based on the determined thickness profile and the plurality of reference etch profiles, to reduce a total thickness variation of the workpiece; and dispensing an etchant over the workpiece via the etchant dispenser for the determined respective etch duration for each position of the plurality of positions.. . ... Infineon Technologies Ag

09/17/15 / #20150264796

Electronic module and method of manufacturing the same

An electronic module is provided, which comprises a first carrier; an electronic chip comprising at least one electronic component and arranged on the first carrier; a spacing element comprising a surface arranged on the electronic chip and being in thermal conductive connection with the at least one electronic component; a second carrier arranged on the spacing element; and a mold compound enclosing the electronic chip and the spacing element at least partially; wherein the spacing element comprises a material having a cte value being matched with at least one other cte.. . ... Infineon Technologies Ag

09/17/15 / #20150263789

Circuit arrangement

A circuit arrangement is provided, having an antenna, a first circuit coupled to the antenna and configured to receive an antenna signal, which contains first data, and to process the antenna signal, as a result of which it produces a processed antenna signal having a different voltage level than that of the antenna signal. The first data are data transmitted from a communication device to the arrangement. ... Infineon Technologies Ag

09/17/15 / #20150263724

Gate signal generation with adaptive signal profiles

A gate signal is generated by summation of multiple signal profiles. The gate signal is applied to a switching device to switch the switching device between an off state and an on state. ... Infineon Technologies Ag

09/17/15 / #20150263511

Overvoltage protection for a synchronous power rectifier

A circuit is described that includes a rectifier configured to rectify a dc output from an ac input, a sensing unit configured to detect a voltage level of the dc output, and a control unit configured to control the rectifier based on the voltage level of the dc output. The control unit is configured to control the rectifier output by at least controlling the rectifier to rectify the dc output from the ac input if the voltage level of the dc output does not indicate an overvoltage condition at the circuit. ... Infineon Technologies Ag

09/17/15 / #20150263178

Jfet and method of manufacturing thereof

A jfet has a semiconductor body with a first surface and second surface substantially parallel to the first surface. A source metallization and gate metallization are arranged on the first surface. ... Infineon Technologies Ag

09/17/15 / #20150263165

Semiconductor device having a charge compensation region

A semiconductor device includes a semiconductor material of a first conductivity type, a body region of a second (opposite) conductivity type extending into the semiconductor material from a main surface of the semiconductor material, a source region of the first conductivity type disposed in the body region, and a channel region extending laterally in the body region from the source region along the main surface. A charge compensation region of the second conductivity type can be provided under the body region which extends in a direction parallel to the main surface and terminates prior to a pn-junction between the source and body regions at the main surface, and/or an additional region of the first conductivity type which has at least one peak doping concentration each of which occurs deeper in the semiconductor material from the main surface than a peak doping concentration of the device channel region.. ... Infineon Technologies Ag

09/17/15 / #20150263083

Trench capacitors and methods of forming the same

A method of forming a semiconductor device includes forming an opening having a sidewall in a substrate and forming a first epitaxial layer in the opening. The first epitaxial layer is formed in a first portion of the sidewall without growing in a second portion of the sidewall. ... Infineon Technologies Ag

09/17/15 / #20150262993

Diode-based esd concept for demos protection

The invention relates to an esd protection circuit for an integrated circuit including a drain-extended mos device and an output pad that requires protection. The esd protection circuit includes a first diode coupled to the output pad and to a bias voltage rail, a second diode coupled to the output pad and to another bias voltage rail, and an esd power clamp coupled between the two bias voltage rails. ... Infineon Technologies Ag

09/17/15 / #20150262814

Power semiconductor device,power electronic module, and method for processing a power semiconductor device

A power semiconductor device in accordance with various embodiments may include: a semiconductor body; and a passivation layer disposed over at least a portion of the semiconductor body, wherein the passivation layer includes an organic dielectric material having a water uptake of less than or equal to 0.5 wt % in saturation.. . ... Infineon Technologies Ag

09/17/15 / #20150261708

Connectivity of slave devices in mobile devices

In accordance with an embodiment of the present invention, a chip set for a mobile device includes a slave device chip and an interface circuit chip that includes a slave bus interface for controlling the slave device chip through an analog bus. The slave bus interface is coupled to a master bus interface via a digital bus of the mobile device. ... Infineon Technologies Ag

09/10/15 / #20150257280

Method for producing a dried paste layer, method for producing a sintering connection, method for producing a power semiconductor module and continuous installation

One aspect of the invention relates to producing a dried paste layer on a joining partner. For this purpose, a joining partner having a contact surface is provided, to which contact surface a paste is applied. ... Infineon Technologies Ag

09/10/15 / #20150256940

Double diaphragm mems microphone without a backplate element

A sensor structure, is disclosed. The sensor structure may include a first suspended structure and a second suspended structure disposed from the first suspended structure to form a volume. ... Infineon Technologies Ag

09/10/15 / #20150256914

System and method for a transducer system with wakeup detection

According to embodiments described herein, a circuit includes an interface circuit configured to be coupled to a transducer and a detection circuit. The interface circuit is configured to provide a digital output signal to a signal input terminal of a processing circuit. ... Infineon Technologies Ag

09/10/15 / #20150256913

Mems sensor structure for sensing pressure waves and a change in ambient pressure

A sensor structure, including: a first diaphragm structure, an electrode element, and a second diaphragm structure arranged on an opposite side of the electrode element from the first diaphragm structure is disclosed. The sensor structure may also include a chamber formed by the first and second diaphragm structures, where the pressure in the chamber is lower than the pressure outside of the chamber. ... Infineon Technologies Ag

09/10/15 / #20150256071

Buck-boost converter with active output voltage discharge

Methods, devices, and integrated circuits are disclosed for applying an active output voltage discharge for a buck-boost converter. One example is directed to a method of operating a buck-boost converter that comprises an inductor, an output capacitor, and an output. ... Infineon Technologies Ag

09/10/15 / #20150255597

Semiconductor device and method of making the same

A semiconductor device includes a drift region in a first region of a semiconductor body. The drift region includes dopants of a first conductivity type. ... Infineon Technologies Ag

09/10/15 / #20150255551

Semiconductor structure including guard ring

One or more embodiments relate to a semiconductor structure, comprising: a conductive feature; an outer guard ring; and an inner guard ring between the outer guard ring and the conductive feature, the inner guard ring being electrically coupled to the conductive feature.. . ... Infineon Technologies Ag

09/10/15 / #20150255509

Nonvolatile memory device

A nonvolatile memory device having a first resistive element coupled between a common node and a bit line; a second resistive element coupled between the common node and a word line; and a pass transistor having a gate coupled to the common node, a first node coupled to a reference voltage, and a second node coupled to an output, wherein the word line is orthogonal to the bit line.. . ... Infineon Technologies Ag

09/10/15 / #20150255450

Field-effect device and manufacturing method thereof

Embodiments relate to a field-effect device that includes a body region, a first source/drain region of a first conductivity type, a second source/drain region, and a pocket implant region adjacent to the first source/drain region, the pocket implant region being of a second conductivity type, wherein the second conductivity type is different from the first conductivity type. The body region physically contacts the pocket implant region.. ... Infineon Technologies Ag

09/10/15 / #20150255428

Chip arrangement

A chip arrangement is provided. The chip arrangement includes: a first chip electrically connected to the first chip carrier top side; a second chip electrically connected to the second chip carrier top side; and electrically insulating material configured to at least partially surround the first chip carrier and the second chip carrier; at least one electrical interconnect configured to electrically contact the first chip to the second chip through the electrically insulating material; one or more first electrically conductive portions formed over and electrically contacted to at least one of the first chip carrier top side and second chip carrier top side, and one or more second electrically conductive portions formed over and electrically contacted to at least one of the first chip carrier bottom side and second chip carrier bottom side.. ... Infineon Technologies Ag

09/10/15 / #20150255407

System and method for a microfabricated fracture test structure

According to an embodiment, a micro-fabricated test structure includes a structure mechanically coupled between two rigid anchors and disposed above a substrate. The structure is released from the substrate and includes a test layer mechanically coupled between the two rigid anchors. ... Infineon Technologies Ag

09/10/15 / #20150255362

Semiconductor device with a passivation layer and method for producing thereof

A semiconductor device includes a semiconductor body having a first surface, a contact electrode on the first surface, and a passivation layer on the first surface adjacent the contact electrode and partially overlapping the contact electrode. The passivation layer comprises a layer stack with a first layer comprising an oxide on the first surface, and a second layer comprising a nitride on the first layer.. ... Infineon Technologies Ag

09/10/15 / #20150255136

Symmetrical differential sensing method and system for stt mram

The invention relates to methods and systems for reading a memory cell and in particular, an stt mram. In one example, a system for reading a memory cell includes a sense path and an inverse path. ... Infineon Technologies Ag

09/10/15 / #20150253412

Device and current sensor for providing information indicating a safe operation

An example of a device comprises a signal generator to generate a signal causing a magnetic self test field for a magneto-resistive sensing element. A signal input is configures to receive a first sensor signal at a first time instant before the magnetic self test field is applied and a second sensor signal at a second time instant after the magnetic self test field is applied. ... Infineon Technologies Ag

09/10/15 / #20150253375

Semiconductor device and method for detecting damaging of a semiconductor device

A micro-electro-mechanical device comprising a movable structure, wherein the movable structure comprises an test structure changing an electrical characteristic, if the movable structure is damaged.. . ... Infineon Technologies Ag

09/10/15 / #20150253208

Single diaphragm transducer structure

A transducer structure including a carrier with an opening and a suspended structure mounted on the carrier which extends at least partially over the opening in the carrier is disclosed. The transducer structure may further include configuring the suspended structure to provide an electrostatic field between the suspended structure and the carrier by changing a distance between the suspended structure and the carrier. ... Infineon Technologies Ag

09/10/15 / #20150253157

Xmr angle sensor arrangement with safety mechanism and method for monitoring the same

An xmr angle sensor arrangement with a safety mechanism comprises an xmr angle sensor having a sensing area for sensing an in-plane magnetic field and for outputting a sensor signal based on the in-plane magnetic field component sensed in the sensing area; a permanent magnet, which is rotatably arranged with respect to the xmr angle sensor to generate a first in-plane magnetic field component in the sensing area of the xmr angle sensor; an excitation current rail path, which is arranged proximate to the sensing area of the xmr angle sensor; and an excitation current provider configured to provide the excitation current rail path with an excitation signal having a excitation signal strength, wherein the excitation signal strength of the excitation signal is chosen to generate a second in-plane magnetic field component in the sensing area of the xmr angle sensor which results, due to a super position of the first and second in-plane magnetic field components, in an expected change of the direction of the resulting in-plane magnetic field component, wherein the xmr angle sensor arrangement is correctly functioning when the sensed change of direction of the resulting in-plane magnetic field component due to the excitation signal corresponds to the expected change of direction of the resulting in-plane magnetic field component.. . ... Infineon Technologies Ag

09/10/15 / #20150251899

Sensor structure for sensing pressure waves and ambient pressure

In various embodiments, a sensor structure is provided. The sensor structure may include a first conductive layer; an electrode element; and a second conductive layer arranged on an opposite side of the electrode element from the first conductive layer. ... Infineon Technologies Ag

09/10/15 / #20150251285

Support structure and method of forming a support structure

A structure for fixing a membrane to a carrier including a carrier; a suspended structure; and a holding structure with a rounded concave shape which is configured to fix the suspended structure to the carrier and where a tapered side of the holding structure physically connects to the suspended structure is disclosed. A method of forming the holding structure on a carrier to support a suspended structure is further disclosed. ... Infineon Technologies Ag

09/03/15 / #20150249474

Mixing stage, modulator circuit and a current control circuit

A mixing stage includes a first modulation stage that receives an input signal from a first common node of the mixing stage, a first local oscillator input that receives a local oscillator signal, and a first modulation signal output adapted to provide a first modulated signal. A second modulation stage of the mixing stage includes a second input that receives a phase inverted representation of the input signal from a second common node of the mixing stage, a second local oscillator input that receives the local oscillator signal, and a second modulation signal output adapted to provide a second modulated signal. ... Infineon Technologies Ag

09/03/15 / #20150249211

Memory

A memory includes a first electrode and a second electrode formed within a first layer and includes a third electrode and a fourth electrode formed within a second layer. The memory includes a resistive-switching memory element and an antifuse element. ... Infineon Technologies Ag

09/03/15 / #20150249078

Integrated circuit having an esd protection structure and photon source

An integrated circuit having an esd protection structure is described. One embodiment includes a circuit section interconnected with a first terminal and with a second terminal and being operable at voltage differences between the first terminal and second terminal of greater than +10 v and less than −10 v. ... Infineon Technologies Ag

09/03/15 / #20150249067

Semiconductor device having multiple chips mounted to a carrier

A semiconductor device includes a chip carrier having a first surface and a second surface opposite to the first surface. The device further includes a first semiconductor chip mounted on the first surface of the chip carrier. ... Infineon Technologies Ag

09/03/15 / #20150249047

Interposer with programmable matrix for realizing configurable vertical semiconductor package arrangements

An interposer for establishing a vertical connection between semiconductor packages includes an electrically insulating substrate having a first main side and a second main side opposite the first main side, a plurality of first electrical conductors at the first main side of the substrate, a plurality of second electrical conductors at the second main side of the substrate, and a programmable connection matrix at one or both main sides of the substrate. The programmable connection matrix includes programmable junctions configured to open or close electrical connections between different ones of the first electrical conductors and different ones of the second electrical conductors upon programming of the junctions.. ... Infineon Technologies Ag

09/03/15 / #20150249043

Method of packaging a semiconductor chip using a 3d printing process and semiconductor package having angled surfaces

In one aspect, a method of packaging a semiconductor module includes providing a semiconductor module having a first surface, a second surface opposite the first surface and edge sides extending between the first surface and the second surface. A packaging assembly is formed at least partly by a 3d printing process. ... Infineon Technologies Ag

09/03/15 / #20150247889

Supply self adjustment for systems and methods having a current interface

A sensor system having a current interface includes a supply and current interface, an electronic control unit and an enhanced initialization sensor. The supply and current interface is configured to receive a supply voltage. ... Infineon Technologies Ag

09/03/15 / #20150247879

Acceleration sensor

Various acceleration sensors are disclosed. In some cases, an inertial mass may be formed during back-end-of-line (beol). ... Infineon Technologies Ag

09/03/15 / #20150246809

Devices with thinned wafer

Methods, apparatuses and devices are described where a main wafer is irreversibly bonded to a carrier wafer and thinned to reduce a thickness of the main wafer, for example down to a thickness of 300 μm or below.. . ... Infineon Technologies Ag

08/27/15 / #20150245118

Micromechanical digital loudspeaker

A digital loudspeaker and a method for operating a digital loudspeaker are disclosed. In an embodiment a digital loudspeaker includes a substrate, a first stator fixed with respect to the substrate, a second stator fixed with respect to the substrate and spaced at a distance from the first stator, and a membrane between the first stator and the second stator. ... Infineon Technologies Ag

08/27/15 / #20150243655

Semiconductor devices and methods of manufacture thereof

Semiconductor devices and methods of manufacture thereof are disclosed. In one embodiment, a semiconductor device includes an array having at least one first region and at least one second region. ... Infineon Technologies Ag

08/27/15 / #20150243649

Power transistor die with capacitively coupled bond pad

A power transistor die includes a transistor formed in a semiconductor body. The transistor has a gate terminal, an output terminal and a third terminal. ... Infineon Technologies Ag

08/27/15 / #20150243593

Method of connecting a semiconductor package to a board

A method of connecting a semiconductor package to a board includes providing a board having a plurality of contact regions, providing a semiconductor package having a plurality of contact areas, selecting a specific contact area out of the plurality of contact areas, applying solder balls to the contact areas and therein applying two or more specific solder balls to the specific contact area, and connecting the semiconductor package to the board in such a way that the two or more specific solder balls are connected with each other and with a contact region of the plurality of contact regions of the board.. . ... Infineon Technologies Ag

08/27/15 / #20150243591

Semiconductor device with plated lead frame, and method for manufacturing thereof

A carrier substrate having a plurality of receptacles each for receiving and carrying a semiconductor chip is provided. Semiconductor chips are arranged in the receptacles, and metal is plated in the receptacles to form a metal structure on and in contact with the semiconductor chips. ... Infineon Technologies Ag

08/27/15 / #20150243561

Semiconductor devices and methods of formation thereof

In accordance with an embodiment of the present invention, a method for forming a semiconductor device includes forming a device region in a substrate. The device region extends continuously from one sidewall of the substrate to an opposite sidewall of the substrate. ... Infineon Technologies Ag

08/27/15 / #20150243461

Switching apparatus, switching systemand switching method

The present disclosure relates to a switching device, comprising an input for a sensor signal, the sensor signal having a sensor signal amplitude; and processing circuitry to determine a switching threshold based on the sensor signal amplitude and a weighting factor depending on said sensor signal amplitude and to generate a switching signal when a level of the sensor signal crosses the switching threshold.. . ... Infineon Technologies Ag

08/27/15 / #20150243360

Method, apparatus and device for data processing

A method for data processing is suggested including: (i) transforming electrical variables for each cell of a data bit of a memory into a time domain; and (ii) determining a predetermined state by comparing the transformed electrical variables of at least two data bits.. . ... Infineon Technologies Ag

08/27/15 / #20150243359

Method and device for processing an erase counter

A embodiment relates to a method for processing an erase counter comprising erase counter fields, the method comprising the steps of (i) determining an unused erase counter field; (ii) writing a selection code and an address information in the unused erase counter field, wherein the selection code and the address information are combined to determine at least one physical address of a memory.. . ... Infineon Technologies Ag

08/27/15 / #20150243333

Determining a state of a cell structure

A method is suggested for determining a state of a cell structure, wherein the cell structure includes several memory cells, the method includes: (i) detecting a first condition in a predetermined number of memory cells; and (ii) determining the state of the cell structure by assigning a second condition to the memory cells that do not show the first condition.. . ... Infineon Technologies Ag

08/27/15 / #20150242348

Clockless serial slave device

Various methods and devices involving a slave device are discussed. The slave device, which may be without a clock input, receives a clock message and generates a clock based on the received clock message. ... Infineon Technologies Ag

08/27/15 / #20150242233

Safety hypervisor function

The disclosure relates to systems and methods for defining a processor safety privilege level for controlling a distributed memory access protection system. More specifically, a safety hypervisor function for accessing a bus in a computer processing system includes a module, such as a computer processing unit (cpu) or a direct memory access (dmy) for accessing a system memory and a memory unit for storing a safety code, such as a processor status word (psw) or a configuration register (dma (reg)). ... Infineon Technologies Ag

08/27/15 / #20150241523

Highly efficient diagnostic methods for monolithic sensor systems

Embodiments relate to integrated circuit (ic) sensors and more particularly to ic sensor diagnostics using multiple (e.g., redundant) communication signal paths, wherein one or more of the communication signal paths can be diverse (e.g., in hardware, software or processing, an operating principle, or in some other way) from at least one other of the multiple communication signal paths. Embodiments can relate to a variety of sensor types, implementations and applications, including 3d magnetic field and other sensors.. ... Infineon Technologies Ag

08/27/15 / #20150239363

Circuit, electric power train and method for charging a battery

A circuit is provided, including a battery, an omnipolar switch, a switching element, a dc-intermediate circuit and a current supplying circuit. The omnipolar switch may be coupled to the battery and may be configured to electrically disconnect the battery. ... Infineon Technologies Ag

08/20/15 / #20150236853

Method for permuting data elements and permuting apparatus

One embodiment describes a method for permuting data elements, comprising receiving a sequence of data elements, and carrying out a plurality of interchange operations each comprising randomly selecting a data element from the data elements in the sequence, interchanging the data element with another data element at a deterministically predefined position in the sequence of data elements, and applying a predefined permutation to the deterministically predefined position or to the sequence of data elements.. . ... Infineon Technologies Ag

08/20/15 / #20150236710

Analog-to-digital conversion

A method is disclosed. An analog signal is sampled to form a sample value using a sample and hold circuit. ... Infineon Technologies Ag

08/20/15 / #20150236653

Limiting amplifiers

A limiting amplifier includes a multiplicity of cascaded amplifier stages for amplifying an input signal for the amplifier. A further amplifier stage is supplied with a reference signal. ... Infineon Technologies Ag

08/20/15 / #20150236595

Switching power converter current sensing with phase current estimator

A phase current estimator for a switching power converter includes analog circuitry for generating a phase current estimate error by comparing a phase current of the switching power converter to an analog representation of an estimate of the phase current. The phase current estimator further includes digital circuitry for revising the phase current estimate based on the phase current estimate error and a plurality of parameters associated with operation of the switching power converter. ... Infineon Technologies Ag

08/20/15 / #20150236586

Phase fault detection in switching power converters

A switching power converter includes a phase operable to deliver a phase current to a load through an inductor. The phase current has an expected sawtooth or triangular ripple pattern. ... Infineon Technologies Ag

08/20/15 / #20150236143

Semiconductor device and rc-igbt with zones directly adjoining a rear side electrode

A semiconductor device includes a drift zone of a first conductivity type in a semiconductor body. Controllable cells are configured to form a conductive channel connected with the drift zone in a first state. ... Infineon Technologies Ag

08/20/15 / #20150236142

Semiconductor device with insert structure at a rear side and method of manufacturing

A cavity is formed in a first semiconductor layer that is formed on a semiconducting base layer. The cavity extends from a process surface of the first semiconductor layer to the base layer. ... Infineon Technologies Ag

08/20/15 / #20150236008

Iii-nitride based esd protection device

An esd (electrostatic discharge) protection device includes a first iii-nitride p-i-n diode and a second iii-nitride p-i-n diode connected to the first iii-nitride p-i-n diode in an antiparallel arrangement configured to provide voltage clamping at 5v or less under forward bias of either the first or second iii-nitride p-i-n diode for transient current in both forward and reverse directions. A corresponding method of manufacturing the esd protection device is also provided.. ... Infineon Technologies Ag

08/20/15 / #20150235917

Passivation layer and method of making a passivation layer

A passivation layer and a method of making a passivation layer are disclosed. In one embodiment the method for manufacturing a passivation layer includes depositing a first silicon based dielectric layer on a workpiece, the first silicon based dielectric layer comprising nitrogen, and depositing in-situ a second silicon based dielectric layer on the first silicon based dielectric layer, the second dielectric layer comprising oxygen.. ... Infineon Technologies Ag

08/20/15 / #20150235890

Semiconductor device including a dielectric material

A method for manufacturing a semiconductor device includes providing a carrier and a semiconductor wafer having a first side and a second side opposite to the first side. The method includes applying a dielectric material to the carrier or the semiconductor wafer and bonding the semiconductor wafer to the carrier via the dielectric material. ... Infineon Technologies Ag

08/20/15 / #20150235864

Method for processing a layer and a method for manufacturing an electronic device

A method for processing a layer may include: providing a patterned carbon layer over a layer or over a carrier; and carrying out an ion implantation through the patterned carbon layer into the layer or into the carrier.. . ... Infineon Technologies Ag

08/20/15 / #20150235855

Metal deposition with reduced stress

Various techniques, methods and devices are disclosed where metal is deposited on a substrate, and stress caused by the metal to the substrate is limited, for example to limit a bending of the wafer.. . ... Infineon Technologies Ag

08/20/15 / #20150235853

Increasing the doping efficiency during proton irradiation

A description is given of a method for doping a semiconductor body, and a semiconductor body produced by such a method. The method comprises irradiating the semiconductor body with protons and irradiating the semiconductor body with electrons. ... Infineon Technologies Ag

08/13/15 / #20150230039

Method for manufacturing a plurality of microphone structures, microphone and mobile device

In various embodiments, a method for manufacturing microphone structures is provided. The method may include: providing a substrate having a front side and a back side, the backside facing away from the front side, and having an inner area and an outer area laterally surrounding the inner area, with the inner area comprising a plurality of microphone areas each microphone are being provided for one microphone of the plurality of microphones; forming a plurality of layers for the plurality of microphones in the microphone areas on the front side of the substrate; forming a recess from the backside of the substrate with the recess laterally overlapping the entire inner area; forming a plurality of cavities into a bottom of the recess with each cavity of the plurality of cavities being formed in one of the microphone areas; processing the layers to form the plurality of microphone structures, wherein each microphone structure comprises at least one layer of the plurality of layers and one cavity; and separating the plurality of microphone structures from each other.. ... Infineon Technologies Ag

08/13/15 / #20150229469

Sensor subassembly and method for sending a data signal

A sensor subassembly having a memory unit for storing a sensor data value from the sensor subassembly and a transmission unit for sending a data signal with information about the stored sensor data value to an external receiver at a data rate that is dependent on a clock frequency of a clock signal produced by the sensor subassembly. The transmission unit sends the data signal with the information about the stored sensor data value on the basis of a piece of trigger information in an externally received control signal.. ... Infineon Technologies Ag

08/13/15 / #20150229447

Network retransmission protocols using a proxy node

One embodiment relates to a device. The device includes reception circuitry adapted to receive a data unit from a first node of a network and a confirmation message signal from a second node of the network. ... Infineon Technologies Ag

08/13/15 / #20150229126

Semiconductor esd circuit and method

In an embodiment, an electrostatic discharge (esd) circuit for providing protection between a first node and a second node includes a first mos device having a first source/drain coupled to a first node, and a second source/drain coupled to an intermediate node. The esd circuit also includes a first capacitor coupled between a gate of the first mos device and the first node, a first resistor coupled between the gate of the first mos device the intermediate node, a second mos device having a first source/drain coupled to the intermediate node, and a second source/drain coupled to the second node, a second capacitor coupled between a gate of the second mos device and the first node, and a second resistor coupled between the gate of the second mos device and the second node.. ... Infineon Technologies Ag

08/13/15 / #20150228878

Light emitting device and method for operating a plurality of light emitting arrangements

According to various examples, systems, methods, and devices for a light emitting device are described herein. As one example, a light emitting device includes a light emitting element and a capacitor. ... Infineon Technologies Ag

08/13/15 / #20150228744

Transistor device with integrated gate-resistor

A transistor device includes an individual transistor cell arranged in a transistor cell field on a semiconductor body, the individual transistor cell having a gate electrode. The transistor device further includes a gate contact, electrically coupled to the gate electrode and configured to switch on the individual transistor cell by providing a gate current in a first direction and configured to switch off the individual transistor cell by providing a gate current in a second direction, the second direction being opposite to the first direction. ... Infineon Technologies Ag

08/13/15 / #20150228723

Semiconductor device, method for manufacturing the same and igbt with emitter electrode electrically connected with impurity zone

A semiconductor device includes a semiconductor body including a drift zone of a first conductivity type, an emitter region of a second, complementary conductivity type configured to inject charge carriers into the drift zone, and an emitter electrode. The emitter electrode includes a metal silicide layer in direct ohmic contact with the emitter region. ... Infineon Technologies Ag

08/13/15 / #20150228616

Semiconductor modules with semiconductor dies bonded to a metal foil

A method of manufacturing semiconductor modules includes providing a metal composite substrate including a metal foil attached to a metal layer, the metal foil being thinner than and comprising a different material than the metal layer, attaching a first surface of a plurality of semiconductor dies to the metal foil prior to structuring the metal foil, and encasing the semiconductor dies attached to the metal foil in an electrically insulating material. The metal layer and the metal foil are structured after the semiconductor dies are encased with the electrically insulating material so that surface regions of the electrically insulating material are devoid of the metal foil and the metal layer. ... Infineon Technologies Ag

08/13/15 / #20150228607

Layer stacks and integrated circuit arrangements

In various embodiments, a layer stack is provided. The layer stack may include a carrier; a first metal disposed over the carrier; a second metal disposed over the first metal; and a solder material disposed above the second metal or a material that provides contact to a solder that is supplied by an external source. ... Infineon Technologies Ag

08/13/15 / #20150228446

Implantation apparatus with ion beam directing unit, semiconductor device and method of manufacturing

An ion implantation apparatus includes an ion beam directing unit, a substrate support, and a controller. The controller is configured to effect a relative movement between an ion beam passing the ion beam directing unit and the substrate support. ... Infineon Technologies Ag

08/13/15 / #20150228436

Fuses and fuse programming methods

A fuse may be provided, which may include: a first fuse link; a second fuse link coupled in series to the first fuse link; and a connection element coupled between the first and second fuse links and disposed in the same level as the first and second fuse links.. . ... Infineon Technologies Ag

08/13/15 / #20150228355

Pre-charge sample-and-hold circuit and method for pre-charging a sample-and-hold circuit

Disclosed herein are embodiments of a pre-charge sample-and-hold circuit. The circuit has an input terminal, a reference voltage terminal and an output terminal. ... Infineon Technologies Ag

08/13/15 / #20150227157

Precision current sensing

Example current tracking circuits and systems as well as methods for tracking current are described herein. In one example, a current tracking circuit comprises a current mirror that receives a power supply input and a control signal as inputs, wherein the current mirror has a mirror ratio. ... Infineon Technologies Ag

08/13/15 / #20150226810

Sensor arrangement, battery cell and energy system

A sensor arrangement according to an embodiment includes a substrate, and at least one sensor and a control circuit mounted on the substrate, wherein the at least one sensor and the control circuit are located on the substrate to be mountable inside a battery cell and outside the battery cell, respectively.. . ... Infineon Technologies Ag

08/13/15 / #20150226787

Insulated-gate bipolar transistor collector-emitter saturation voltage measurement

In one example, a method includes determining that an insulated-gate bipolar transistor (igbt) is saturated, and while the igbt is saturated, determining a collector-emitter saturation voltage (vcesat) of the igbt.. . ... Infineon Technologies Ag

08/13/15 / #20150226779

Ground fault detection

In one example, a method includes receiving, at an input of a system, an ac signal, rectifying the ac signal into a dc signal, and determining, based on a value of one or more counters in a detection logic, whether or not the input is connected to ground.. . ... Infineon Technologies Ag

08/13/15 / #20150226643

Extraction of tire characteristics combining direct tpms and tire resonance analysis

Embodiments relate to tire characterization systems and methods for combining direct tire pressure monitoring systems (tpms) and tire resonance analysis in indirect tire pressure monitoring systems (tpms) for the extraction of tire characteristics to characterize other tire parameters. In embodiments, itpms and methods that utilize anti-lock braking system (abs) sensed signals coupled to an electronic control unit (ecu) that may comprise circuitry and/or controllers to process the sensed signals using a resonance frequency analysis (rfa) technique can be combined with direct tire pressure sensor measurements from direct tpms systems. ... Infineon Technologies Ag

08/06/15 / #20150222317

Switching device, a communication device, and a method for processing a carrier

According to various embodiments, a switching device may include: an antenna terminal; a switch including a first switch terminal and a second switch terminal, the first switch terminal coupled to the antenna terminal, the switch including at least one transistor at least one of over or in a silicon region including an oxygen impurity concentration of smaller than about 3×1017 atoms per cm3; and a transceiver terminal coupled to the second switch terminal, wherein the transceiver terminal is at least one of configured to provide a signal received via the antenna terminal or configured to receive a signal to be transmitted via the antenna terminal.. . ... Infineon Technologies Ag

08/06/15 / #20150222187

Digital slope control for switched capacitor dc-dc converter

Representative implementations of devices and techniques minimize switching losses in a switched capacitor dc-dc converter. The slope of the charging and/or discharging phase may be modified, smoothing the transitions from charge to discharge and/or discharge to charge of the switched capacitor.. ... Infineon Technologies Ag

08/06/15 / #20150221766

Semiconductor device having a field-effect structure

A semiconductor device includes a silicon semiconductor body having a main surface and a nitrogen concentration which is lower than about 2*1014 cm−3 at least in a first portion of the silicon semiconductor body, the first portion extending from the main surface to a depth of about 50 μm. The nitrogen concentration increases with a distance from the main surface at least in the first portion. ... Infineon Technologies Ag

08/06/15 / #20150221764

Wafer based beol process for chip embedding

In various embodiments a semiconductor device is provided, including a semiconductor body including a drift region and a gate electrode arranged adjacent to the drift region; and a contact structure provided over the drift region of the semiconductor body and having a first metal layer, an adhesion layer over the first metal layer and a second metal layer over the adhesion layer.. . ... Infineon Technologies Ag

08/06/15 / #20150221756

Semiconductor device and insulated gate bipolar transistor with barrier structure

A semiconductor device includes a semiconductor mesa which is formed between cell trench structures extending from a first surface into a semiconductor body. The semiconductor mesa includes a body zone forming a first pn junction with a drift zone between the body zone and a second surface opposite to the first surface. ... Infineon Technologies Ag

08/06/15 / #20150221578

Semiconductor package and method for producing a semiconductor

A device includes a die and at least one of an encapsulant at least partly encapsulating the die and a carrier to which the die is attached. The at least one of the encapsulant and the carrier includes a thermoplastic polymer that includes metallic particles.. ... Infineon Technologies Ag

08/06/15 / #20150221569

Chip assembling on adhesion layer or dielectric layer, extending beyond chip, on substrate

Electronic module (100), which comprises a first substrate (102), a first dielectric layer (104) on the first substrate (102), at least one electronic chip (106), which is mounted with a first main surface (108) directly or indirectly on partial region of the first dielectric layer (104), a second substrate (110) over a second main surface (114) of the at least one electronic chip (106), and an electrical contacting (116) for the electric contact of the at least one electronic chip (106) through the first dielectric layer (104), wherein the first adhesion layer (104) on the first substrate (102) extends over an area, which exceeds the first main surface (108).. . ... Infineon Technologies Ag

08/06/15 / #20150221523

Arrangement and method for manufacturing the same

An arrangement is provided. The arrangement may include: a substrate having a front side and a back side, a die region within the substrate, a multi-purpose layer defining a back side of the die region, and an etch stop layer disposed over the multi-purpose layer between the multi-purpose layer and the back side of the substrate. ... Infineon Technologies Ag

08/06/15 / #20150221356

Nonvolatile memory with enhanced efficiency to address asymetric nvm cells

This application describes embodiments of mram cells that utilize a pmos transistor as an access transistor. The mram cells are configured to mitigate the effects of applying asymmetric current loads to transition a magnetic-tunnel junction of the mram cell between magnetoresistive states.. ... Infineon Technologies Ag

08/06/15 / #20150220755

Solution for security, safe and time integrity communications in automotive environments

A method is disclosed for transmitting user data, wherein a first codeword is initially calculated using a transmit-side time value. The user data are then transmitted together with the first codeword to a receiver. ... Infineon Technologies Ag

08/06/15 / #20150220667

Application-based verification coverage using metamodels

At least one processor of a computing device may create at least one metamodel. The at least one processor may further perform, on the at least one metamodel, one or more of: a split operation, a merge operation, a reduce operation, a mathematical transform, an inverse operation, a derive operation, a cascading operation, and an algebraic operation on the at least one metamodel.. ... Infineon Technologies Ag

08/06/15 / #20150220307

Operation based on two operands

A method for performing an operation based on at least two operands is proposed, in which steps of the operation are performed in time-randomized fashion. In addition, an apparatus, a computer program product and a computer-readable storage medium are accordingly specified.. ... Infineon Technologies Ag

08/06/15 / #20150220128

Method and apparatus for use in a data processing system

Disclosed herein are techniques related to control of a system. According to some embodiments the system includes a plurality of elements and a power supply to supply power to the elements. ... Infineon Technologies Ag

08/06/15 / #20150219715

Methods and devices for the computer-aided determination of deviation patterns during the production and/or testing of a multiplicity of dies and computer program products

In various embodiments, a method for the computer-aided determination of deviation patterns during at least one of the production or testing of a multiplicity of dies is provided. The dies are uniquely identified. ... Infineon Technologies Ag

08/06/15 / #20150219701

System and method for a phase detector

In accordance with an embodiment, a method of detecting a phase difference between a first signal and a second signal include latching a state of the first signal using the second signal as a clock to produce a first latched signal, latching a state of the second signal using the first signal as a clock to produce a second latched signal summing the first latched signal and the second latched signal to produce an indication of whether the first signal is leading or lagging the second signal.. . ... Infineon Technologies Ag

08/06/15 / #20150219472

Axial and perpendicular angle sensor in single package

Embodiments relate to magnetic field angle sensors that utilize axial and perpendicular sensors collectively to infer a rotational angle. In embodiments, a sensor system comprises at least one axial sensor unit and at least one perpendicular sensor unit arranged in a single sensor package or on a single substrate. ... Infineon Technologies Ag

08/06/15 / #20150217997

Method for simultaneous structuring and chip singulation

A method for structuring a substrate and a structured substrate are disclosed. In an embodiment a method includes providing a substrate with a first main surface and a second main surface, wherein the substrate is fixed to a carrier arrangement at the second main surface, performing a photolithography step at the first main surface of the substrate to mark a plurality of sites at the first main surface, the plurality of sites corresponding to future perforation structures and future kerf regions for a plurality of future individual semiconductor chips to be obtained from the substrate, and plasma etching the substrate at the plurality of sites until the carrier arrangement is reached, thus creating the perforation structures within the plurality of individual semiconductor chips and simultaneously separating the individual semiconductor chips along the kerf regions.. ... Infineon Technologies Ag

08/06/15 / #20150217994

Micromechanical semiconductor sensing device

Micromechanical semiconductor sensing device comprises a micromechanical sensing structure being configured to yield an electrical sensing signal, and a piezoresistive sensing device provided in the micromechanical sensing structure, said piezoresistive sensing device being arranged to sense a mechanical stress disturbing the electrical sensing signal and being configured to yield an electrical disturbance signal based on the sensed mechanical stress disturbing the electrical sensing signal.. . ... Infineon Technologies Ag

07/30/15 / #20150215129

Data encryption of a storage area

A method for encrypting data stored in a memory area is proposed, wherein the data are encrypted on the basis of a key identification for the data and on the basis of a one-time key.. . ... Infineon Technologies Ag

07/30/15 / #20150214930

Method of operating a semiconductor device having an igbt and desaturation channel structure

A semiconductor device having an igbt structure is operated by applying a gate voltage with a first value to a gate electrode terminal such that current flows through the igbt between first and second electrode terminals and current flow through a desaturation channel is substantially blocked. A gate voltage with a second value is applied to the gate electrode terminal, the absolute value of the second value being lower than the absolute value of the first value, such that current flows through the igbt between the first and second electrode terminals and charge carriers flow as a desaturating current through the desaturation channel to the first electrode terminal. ... Infineon Technologies Ag

07/30/15 / #20150214357

Vertical transistor component

A vertical transistor component includes a semiconductor body with first and second surfaces, a drift region, and a source region and body region arranged between the drift region and the first surface. The body region is also arranged between the source region and the drift region. ... Infineon Technologies Ag

07/30/15 / #20150214347

Semiconductor device including undulated profile of net doping in a drift zone

A semiconductor device includes a semiconductor body having opposite first and second sides. The semiconductor device further includes a drift zone in the semiconductor body between the second side and a pn junction. ... Infineon Technologies Ag

07/30/15 / #20150214303

Electrical contact for graphene part

An electrical or electronic device is disclosed. In some embodiments, an electrical device includes a single-layer graphene part extending in a lateral direction and a multi-layer graphene structure laterally contacting the single-layer graphene part. ... Infineon Technologies Ag

07/30/15 / #20150214297

Electronic array and chip package

An electronic array may include a first electronic component which has a first operation voltage, a second electronic component which has a second operation voltage, wherein the second operation voltage is different from the first operation voltage and wherein the first electronic component and the second electronic component are arranged over each other, an isolation layer between the first electronic component and the second electronic component, wherein the isolation layer electrically isolates the first electronic component from the second electronic component, at least one connection layer formed at least partially between the isolation layer and the first electronic component or between the isolation layer and the second electronic component, wherein the connection layer includes a first portion and a second portion, wherein the first portion and the second portion each extend from the corresponding electronic component to the isolation layer, wherein the first portion includes an electrically isolating material which fixes the isolation layer to the corresponding electronic component and wherein the second portion includes an electrically conductive material which electrically couples the corresponding electronic component to the isolation layer.. . ... Infineon Technologies Ag

07/30/15 / #20150214204

Electronic device and method for fabricating an electronic device

A method for fabricating an electronic device includes simultaneously attaching a first and a second semiconductor chip to a carrier using a transfer means, wherein attaching the first semiconductor chip includes a first attaching method and attaching the second semiconductor chip includes a second attaching method different from the first attaching method.. . ... Infineon Technologies Ag

07/30/15 / #20150214179

Semiconductor device including flexible leads

A semiconductor device includes a semiconductor chip including a transistor. A first flexible lead is electrically coupled to a first electrode on a first surface of the semiconductor chip. ... Infineon Technologies Ag

07/30/15 / #20150214163

Chip and method for detecting an attack on a chip

According to one embodiment, a chip is described comprising a transistor level, a semiconductor region in, below, or in and below the transistor level, a test signal circuit configured to supply a test signal to the semiconductor region, a determiner configured to determine a behavior of the semiconductor region in response to the test signal and a detector configured to detect a change of geometry of the semiconductor region based on the behavior and a reference behavior of the semiconductor region in response to the test signal.. . ... Infineon Technologies Ag

07/30/15 / #20150214144

Nanotube structure based metal damascene process

In various embodiments a method for manufacturing a metallization layer on a substrate is provided, wherein the method may include forming a plurality of groups of nanotubes over a substrate, wherein the groups of nanotubes may be arranged such that a portion of the substrate is exposed and forming metal over the exposed portion of the substrate between the plurality of groups of nanotubes.. . ... Infineon Technologies Ag

07/30/15 / #20150214133

Electronic device and method for fabricating an electronic device

An electronic device includes a semiconductor chip including an electrode, a substrate element and a contact element connecting the electrode to the substrate element. The electronic device further includes an encapsulant configured to leave the contact element at least partially exposed such that a heatsink may be connected to the contact element.. ... Infineon Technologies Ag

07/30/15 / #20150214095

Method for producing a copper layer on a semiconductor body using a printing process

A method for producing a metal layer on a wafer is described. In one embodiment the method comprises providing a semiconductor wafer including a coating, printing a metal particle paste on the semiconductor wafer thereby forming a metal layer and heating the metal layer in a reductive gas for sintering the metal particle paste or for annealing a sintered metal particle paste in an oven.. ... Infineon Technologies Ag

07/30/15 / #20150214084

Frame cassette

According to various embodiments, a frame cassette may include: a housing; a mounting structure inserted in the housing, the mounting structure including a plurality of tape-frame slots, wherein each tape-frame slot is configured to receive a tape-frame, wherein the housing includes an opening to introduce a tape-frame into a tape-frame slot of the plurality of tape-frame slots or to remove a tape-frame from a tape-frame slot of the plurality of tape-frame slots, and a door mounted at the housing, wherein the door is configured to close the opening of the housing to seal the interior of the housing from the exterior of the housing.. . ... Infineon Technologies Ag

07/30/15 / #20150212877

Apparatus and method for improving data storage by data inversion

An apparatus includes a processing unit and a memory. The processing unit is configured to encode a plurality of bits to obtain a plurality of encoded bits, the processing unit is configured to determine an inversion decision. ... Infineon Technologies Ag

07/30/15 / #20150212196

Method, device and system for processing radar signals

An embodiment relates to a method for processing input data that includes multiplying a portion of the input data with a first set of coefficients or with a second set of coefficients, wherein the first set of coefficients and the second set of coefficients are stored in a memory, wherein the first set of coefficients is used on phase modulated input data and wherein the second set of coefficients is used on input data that are not phase modulated.. . ... Infineon Technologies Ag

07/30/15 / #20150212160

Method and apparatuses for determining a state of charge

Methods and apparatuses for determining a state of charge of a battery are provided, wherein measurements of a terminal voltage of the battery and stored precharacterization parameters are used for determining the state of charge.. . ... Infineon Technologies Ag

07/30/15 / #20150211889

Magnetic field sensor and method of operation thereof with a determination of offset values selectable during operation of the sensor

At least one embodiment relates to magnetic field sensors being operable at different calibration modes, wherein the magnetic sensor is capable of switching between the different calibration modes during normal operation of the sensor. The switching may be possible in response to different motion types detected within the sensor. ... Infineon Technologies Ag

07/30/15 / #20150210542

Mems device with polymer layer, system of a mems device with a polymer layer, method of making a mems device with a polymer layer

A mems device, a method of making a mems device and a system of a mems device are shown. In one embodiment, a mems device includes a first polymer layer, a mems substrate disposed on the first polymer layer and a mems structure supported by the mems substrate. ... Infineon Technologies Ag

07/23/15 / #20150207532

System and method for a mixer

In accordance with an embodiment, a circuit includes a mixer having a signal input port, a local oscillator input port and an output port, a lowpass filter circuit having an input coupled to the output port of the mixer and a terminal configured to be connected to a shunt capacitor, and a difference circuit having a first input coupled to the output port of the mixer, and a second input coupled to an output of the lowpass filter. The output of the difference circuit substantially rejects a dc signal component at the output port of the mixer.. ... Infineon Technologies Ag

07/23/15 / #20150207313

Noise-tolerant active clamp with esd protection capability in power up mode

A circuit is described comprising electrostatic discharge (esd) protection circuitry, keep-off circuitry and esd detection circuitry. When the esd detection circuitry detects an esd event, the esd detection circuitry is configured to both enable the esd protection circuitry and disable the keep-off circuitry.. ... Infineon Technologies Ag

07/23/15 / #20150207061

Electronic device with ring-connected hall effect regions

An electronic device includes a number of n hall effect regions with n>1, wherein the n hall effect regions are isolated from each other. The electronic device also includes at least eight contacts in or on surfaces of the n hall effect regions, wherein the contacts include: a first and a second contact of each hall effect region. ... Infineon Technologies Ag

07/23/15 / #20150206983

Semiconductor diode and method of manufacturing a semiconductor diode

A semiconductor diode includes a semiconductor body having opposite first and second sides. A first and a second semiconductor region are consecutively arranged along a lateral direction at the second side. ... Infineon Technologies Ag

07/23/15 / #20150206802

Singulation of semiconductor dies with contact metallization by electrical discharge machining

A method of separating individual dies of a semiconductor wafer includes forming a metal layer on a first surface of a semiconductor wafer, the semiconductor wafer including a plurality of dies, separating the plurality of dies from one another, and electrical discharge machining the metal layer into individual segments each of which remains attached to one of the dies. A corresponding semiconductor die produced by such a method is also provided.. ... Infineon Technologies Ag

07/23/15 / #20150206797

Semiconductor device and method for making same

One or more embodiments relate to a semiconductor device that includes: a conductive layer including a sidewall; a conductive capping layer disposed over the conductive layer and laterally extending beyond the sidewall of the conductive layer by a lateral overhang; and a conductive via in electrical contact with the conductive capping layer.. . ... Infineon Technologies Ag

07/23/15 / #20150205322

Electronic circuit and method for providing a clock signal

According to an embodiment, an electronic circuit is described comprising a processing circuit, a power supply configured to supply power to the processing circuit via two supply nodes; a determiner configured to determine whether the voltage between the two supply nodes is above a predetermined reference voltage; and a clock generator configured to generate a clock signal for the processing circuit wherein the clock generator is configured to if the determiner determines that the voltage between the two supply nodes is again, after pausing the generation of clock edges, above the predetermined threshold the clock generator generates a clock edge irrespective of whether it is currently a time point given by the predetermined periodicity.. . ... Infineon Technologies Ag

07/23/15 / #20150204950

3-d magnetic sensor

One embodiment of the present invention relates to a magnetic field sensor having a squat soft-magnetic body disposed on a surface of a substrate including a magnetic sensor array having a plurality of spatially diverse magnetic sensor elements disposed in a predetermined configuration. In the presence of an external magnetic field the squat soft-magnetic body becomes magnetized to generate a reactionary magnetic field. ... Infineon Technologies Ag

07/23/15 / #20150203988

Silicon ingot and method of manufacturing a silicon ingot

A method of czochralski growth of a silicon ingot includes melting a mixture of silicon material and an n-type dopant material in a crucible. The silicon ingot is extracted from the molten silicon over an extraction time period. ... Infineon Technologies Ag

07/23/15 / #20150203350

Method of fabricating isolating semiconductor structures

Embodiments related to semiconductor manufacturing and semiconductor devices with semiconductor structure are described and depicted.. . ... Infineon Technologies Ag

07/16/15 / #20150200437

System and method for a directional coupler

In accordance with an embodiment, a circuit includes a current sensing circuit comprising a current input terminal coupled to an input port, a current output terminal coupled to a transmitted port, and a current sensing output terminal configured to provide a current sensing signal proportional to a current flowing between the current input terminal and the current output terminal. The circuit further includes a voltage sensing circuit having a voltage input terminal coupled to the transmitted port and a voltage sensing output terminal configured to provide a voltage sensing signal proportional to a voltage at the transmitted port. ... Infineon Technologies Ag

07/16/15 / #20150200247

Bipolar semiconductor device and method of manufacturing thereof

A power semiconductor device has a semiconductor body having a first surface and a second surface that runs substantially parallel to the first surface. A first metallization is arranged on the first surface. ... Infineon Technologies Ag

07/16/15 / #20150200244

Moisture barrier capacitors in semiconductor components

Structures and methods of forming moisture barrier capacitor on a semiconductor component are disclosed. The capacitor is located on the periphery of a semiconductor chip and includes an inner plate electrically connected to a voltage node, an outer plate with fins for electrically connecting to a different voltage node.. ... Infineon Technologies Ag

07/16/15 / #20150198679

Current sensors, systems and methods for sensing current in a conductor

Embodiments relate to magnetic current sensors. In various embodiments, a current sensor can include a simple conductor having a constant cross-sectional profile, such as round, square or rectangular, and being generally free of any notches or slots to divert current and thereby having a simpler manufacturing process, lower resistance and improved mechanical robustness. ... Infineon Technologies Ag

07/16/15 / #20150198633

Wide interposer for an electronic testing system

A test interposer includes an interposer layer configured to receive a test socket, and a stiffening layer attached to the interposer layer so that the interposer layer is kept in an unalterable shape.. . ... Infineon Technologies Ag

07/16/15 / #20150197869

Method for fabricating a heat sink, and heat sink

A method for fabricating a heat sink according to an embodiment may include: providing a carbon fiber fabric having a plurality of carbon fibers and a plurality of openings, the openings leading from a first side of the fabric to a second side of the carbon fiber fabric; and electroplating the carbon fiber fabric with metal, wherein metal is deposited with a higher rate at the first side than at the second side of the carbon fiber fabric. A method for fabricating a heat sink according to another embodiment may include: providing a carbon metal composite having a plurality of metal-coated carbon fibers and a plurality of openings, the openings leading from a first side of the carbon metal composite to a second side of the carbon metal composite; disposing the carbon metal composite over a semiconductor element such that the first side of the carbon metal composite faces the semiconductor element; and bonding the carbon metal composite to the semiconductor element by means of an electroplating process, wherein metal electrolyte is supplied to an interface between the carbon metal composite and the semiconductor element via the plurality of openings.. ... Infineon Technologies Ag

07/09/15 / #20150194992

Signal interface and a signal processing system

A signal interface for a receiver includes a first receiver module configured to receive a first message related to a content. The first receiver module is configured to generate a first adapted message based on the first message and a first transformation protocol. ... Infineon Technologies Ag

07/09/15 / #20150194480

Compressive polycrystalline silicon film and method of manufacture thereof

In one embodiment a method of forming a compressive polycrystalline semiconductive material layer is disclosed. The method comprises forming a polycrystalline semiconductive seed layer over a substrate and forming a silicon layer by depositing silicon directly on the polycrystalline silicon seed layer under amorphous process conditions at a temperature below 600 c.. ... Infineon Technologies Ag

07/09/15 / #20150194398

Conductive lines and pads and method of manufacturing thereof

A semiconductor device and method are disclosed. The semiconductor device includes a substrate having a first region and a second region and an insulating layer arranged on the substrate. ... Infineon Technologies Ag

07/09/15 / #20150194373

Semiconductor packaging arrangement

A semiconductor packaging arrangement includes a transistor device including a first side including a source electrode and a gate electrode, a die pad having a first surface, and a lead having a first surface. A first conductive member is arranged between the source electrode and the first surface of the die pad and spaces the source electrode from the first surface of the die pad by a distance that is greater than a distance between the gate electrode and the first surface of the lead.. ... Infineon Technologies Ag

07/09/15 / #20150194358

Circuit and method for internally assessing dielectric reliability of a semiconductor technology

A semiconductor wafer includes dielectric regions of different thicknesses, some of the dielectric regions being thinner and other ones of the dielectric regions being thicker. The semiconductor wafer further includes a stress circuit operable to stress at least one of the dielectric regions internally within the semiconductor wafer for assessing dielectric reliability. ... Infineon Technologies Ag

07/09/15 / #20150194249

Magnet package and method for producing a magnet package

A magnet package is created, which includes a package body, wherein the package body is formed of a permanent magnetic material, and at least one electric contact, which is covered by the package body.. . ... Infineon Technologies Ag

07/09/15 / #20150194192

Sense amplifier of a memory cell

A sense amplifier of a memory cell having a sense voltage generating circuit configured to generate a sense voltage; and a sensing circuit configured to compare a bitline voltage of the memory cell with the sense voltage, and to output a digital output signal indicating a content of the memory cell, wherein during a sense phase, the sensing circuit is decoupled from a voltage supply which charges a bitline capacitance during a precharge phase, and is coupled to and supplied by the bitline capacitance. The sense voltage generating circuit may be further configured to generate a sense voltage that during a precharge phase is dependent on the voltage supply and during a sense phase is independent of the voltage supply.. ... Infineon Technologies Ag

07/09/15 / #20150193235

Arithmetic logical unit array, microprocessor, and method for driving an arithmetic logical unit array

In various embodiments an arithmetic logical unit array is provided, which may include: at least two data registers for storing data, a plurality of fixed instruction registers for storing machine code instructions, and at least one programmable instruction register for storing instruction data being representative for a machine code instruction. A selection circuit of the arithmetic logical unit array may be configured to select one of the machine code instructions from the fixed instruction registers or the machine code instruction represented by the instruction data. ... Infineon Technologies Ag

07/09/15 / #20150192178

Universal solenoid driver

A device may include a driver integrated circuit (ic) comprising a first control unit and a second control unit, a first solenoid that is electrically coupled to the first control unit, a second solenoid that is electrically coupled to the second control unit; at least one sensor, a clock that synchronizes a microcontroller and the driver ic, and a peripheral bus that communicatively couples the first control unit, the second control unit. The microcontroller and the driver ic form an outer control loop that actuates the first solenoid and the second solenoid, and the first control unit, the second control unit, and the at least one sensor form an inner control loop that controls the first solenoid and the second solenoid.. ... Infineon Technologies Ag

07/02/15 / #20150188532

Circuit and method for operating a half-bridge

A circuit for operating a half-bridge is provided. The circuit may include a first multiplier circuit. ... Infineon Technologies Ag

07/02/15 / #20150187871

Silicon carbide device and a method for manufacturing a silicon carbide device

A silicon carbide device includes an epitaxial silicon carbide layer including a first conductivity type and a buried lateral silicon carbide edge termination region located within the epitaxial silicon carbide layer including a second conductivity type. The buried lateral silicon carbide edge termination region is covered by a silicon carbide surface layer including the first conductivity type.. ... Infineon Technologies Ag

07/02/15 / #20150185759

Synchronization of a data signal

A method for synchronizing a data signal in a bus environment is suggested, the method may include providing multiple clock phases based on a reference oscillator; determining a phase out of the multiple clock phases for a transition of a data signal; and synchronizing the data signal based on the phase determined.. . ... Infineon Technologies Ag

07/02/15 / #20150185297

Device, magnetic sensor device and method

A device according to an embodiment may comprise a magneto-resistive structure comprising a magnetic free layer with a spontaneously generated in-plane closed flux magnetization pattern and a magnetic reference layer having a non-closed flux magnetization pattern.. . ... Infineon Technologies Ag

07/02/15 / #20150185180

Fluid sensor chip and method for manufacturing the same

A fluid sensor chip includes an isolator substrate including amorphous carbon, an electrical conductor including graphite and an active material including graphene or carbon nanotubes.. . ... Infineon Technologies Ag

07/02/15 / #20150183631

Semiconductor device having a micro-mechanical structure

According to an embodiment of a semiconductor device, the semiconductor device includes a micro-mechanical structure and a semiconductor material arranged over the micro-mechanical structure. A side surface of the semiconductor material includes a first region and a second region. ... Infineon Technologies Ag

06/25/15 / #20150181658

Device having a plurality of driver circuits to provide a current to a plurality of loads and method of manufacturing the same

In various embodiments, a device is provided. The device includes a substrate having a first side and a second side opposite the first side. ... Infineon Technologies Ag

06/25/15 / #20150181335

System and method for a cancelation circuit

In accordance with an embodiment, a cancelation circuit includes a current mirror and a low pass filter. The current mirror includes an input terminal configured to accept an input current comprising a first noise signal, a first mirrored output and a second mirrored output. ... Infineon Technologies Ag

06/25/15 / #20150180590

Circuit and method for a circuit

A circuit comprises a transmitter to provide a transmit signal. The circuit also comprises a coupler element to receive the transmit signal at an input port, to provide a first representation of the transmit signal at an antenna port and a second representation of the transmit signal at a testing port. ... Infineon Technologies Ag

06/25/15 / #20150180581

Exchanging information between time-of-flight ranging devices

Embodiments address a concept for exchanging information between time-of-flight ranging devices. For example, a first time-of-flight camera has an illumination unit configured to transmit information to a second time-of-flight camera by modulating a light signal to be emitted in accordance with an information bearing signal. ... Infineon Technologies Ag

06/25/15 / #20150180500

Quantizer

In one embodiment the quantizer includes a signal-to-phase converter configured to generate a phase signal according to an input signal and a phase difference digitization block configured to generate a quantization output according to differentiated samples of the phase signal, where the phase signal generated by the signal-to-phase converter has a sinusoidal shape.. . ... Infineon Technologies Ag

06/25/15 / #20150180483

Oscillator devices and methods

Oscillator devices and corresponding methods are disclosed. In some embodiments an apparatus includes an oscillator circuit arrangement, a frequency variable resistor circuit coupled to an output of the oscillator circuit arrangement and a reference resistor circuit. ... Infineon Technologies Ag

06/25/15 / #20150180333

System and method for a controlled feedback charge pump

According to various embodiments, a circuit includes a charge pump and a feedback circuit. The charge pump includes a first input, a second input configured to receive an offset signal, and an output terminal configured to provide a charge pump signal based on the first and second inputs. ... Infineon Technologies Ag

06/25/15 / #20150179833

Photodetector and method for manufacturing the same

A photodetector includes a substrate and an insulating arrangement formed in the substrate. The insulating arrangement electrically insulates a confined region of the substrate. ... Infineon Technologies Ag

06/25/15 / #20150179637

Semiconductor devices

A semiconductor device includes a first doping region extending from a main surface of a semiconductor substrate into the semiconductor substrate. Further, the semiconductor device includes a second doping region arranged adjacent to the first doping region. ... Infineon Technologies Ag

06/25/15 / #20150179636

Semiconductor device

A semiconductor device includes at least one field effect transistor structure, which is formed on a semiconductor substrate. The field effect transistor structure includes a drift region, a body region, a source region and a gate. ... Infineon Technologies Ag

06/25/15 / #20150179606

Method of processing a semiconductor wafer

A method of processing a semiconductor wafer includes forming semiconductor dies in the semiconductor wafer, each die having an active region containing devices of an integrated circuit and an edge region surrounding the active region, adjacent ones of the dies being separated by a scribe line. The method further includes forming interconnect wiring over the active region of each semiconductor die in an interlayer dielectric, forming ancillary wiring over the edge region of each die in the interlayer dielectric, forming a passivation on the interlayer dielectric, forming bond pads over the interconnect wiring of each die, the bond pads of each die being in electrical connection with the interconnect wiring of that die, and forming additional bond pads over the ancillary wiring of each semiconductor die, the additional bond pads of each die being in electrical connection with the interconnect wiring of that die.. ... Infineon Technologies Ag

06/25/15 / #20150179584

Alignment mark arrangement, semiconductor workpiece, and method for aligning a wafer

In various embodiments, an alignment mark arrangement may include a plurality of alignment marks disposed next to each other in a row, wherein at least one of the following holds true: a first alignment mark of the plurality of alignment marks has a first width and a second alignment mark of the plurality of alignment marks has a second width that is different from the first width; a first pair of neighboring alignment marks of the plurality of alignment marks is arranged at a first pitch and a second pair of neighboring alignment marks of the plurality of alignment marks is arranged at a second pitch that is different from the first pitch.. . ... Infineon Technologies Ag

06/25/15 / #20150179534

Testing of semiconductor components and circuit layouts therefor

In one embodiment of the present invention, a method of forming a semiconductor device includes performing a test during the forming of the semiconductor device within and/or over a substrate. A first voltage is applied to a first node coupled to a component to be tested in the substrate and a test voltage at a pad coupled to the component to be tested through a second node. ... Infineon Technologies Ag

06/25/15 / #20150179507

Methods for processing a semiconductor device

According to one embodiment, a method for processing a semiconductor device is provided including forming a final metal layer forming a passivation layer over the final metal layer and structuring the passivation layer and the final metal layer to form a patterned metal layer and a patterned passivation layer, wherein the patterned metal layer includes a pad region covered by the patterned passivation layer.. . ... Infineon Technologies Ag

06/25/15 / #20150179413

Process tools and methods of forming devices using process tools

In accordance with an embodiment of the present invention, a process tool includes a chuck configured to hold a substrate. The chuck is disposed in a chamber. ... Infineon Technologies Ag

06/25/15 / #20150179270

Method and system for reducing the size of nonvolatile memories

Embodiments relate to system and methods including a plurality of nonvolatile memory elements wherein sets of least two nonvolatile memory elements each share one select element for selecting one of the nonvolatile memory elements of a particular one of the sets of nonvolatile memory elements for a read operation or a program operation.. . ... Infineon Technologies Ag

06/25/15 / #20150178130

Method and system for secure data processing

Described herein are embodiments that relate to a method for use in data processing. An embodiment includes providing an arithmetic unit configured to perform any one in a set of operations. ... Infineon Technologies Ag

06/25/15 / #20150177753

Fast transient response voltage regulator

Techniques are described for adjusting an amount of current flowing through a first and second transistor of a voltage regulator connected to an output of a voltage regulator to maintain an output of the voltage regulator at a constant output voltage level. Also, a resistor connects a gate of the first transistor to a gate of a second transistor. ... Infineon Technologies Ag

06/25/15 / #20150177373

Wireless communication system, a radar system and a method for determining a position information of an object

A wireless communication system includes a first semiconductor module and a second semiconductor module. The first semiconductor module includes a semiconductor die connected to an antenna structure. ... Infineon Technologies Ag

06/25/15 / #20150177339

Current difference sensors, systems and methods

Embodiments relate to current difference sensors, systems and methods. In an embodiment, a current difference sensor includes first and second conductors arranged relative to one another such that when a first current flows through the first conductor and a second current, equal to the first current, flows through the second conductor, a first magnetic field induced in the first conductor and a second magnetic field induced in the second conductor cancel each other at a first position and a second position; and first and second magnetic field sensing elements arranged at the first and second positions, respectively.. ... Infineon Technologies Ag

06/25/15 / #20150177310

Testing of semiconductor devices and devices, and designs thereof

In accordance with an embodiment of the present invention, a method of testing a plurality of semiconductor devices includes applying a stress voltage having a peak voltage on a shield line disposed over a substrate. The substrate has functional circuitry of a semiconductor device. ... Infineon Technologies Ag

06/18/15 / #20150172826

Circuit assembly for processing an input signal, microphone assembly and method for following an input signal

A circuit assembly and a method for processing an input signal are disclosed. In one embodiment a circuit assembly comprises a voltage provider configured to receive a supply voltage and to provide an internal supply voltage higher than the supply voltage and a signal follower coupled to an output port of the voltage provider, the signal follower being configured to receive the internal supply voltage and the input signal, and to provide an output signal depending on the input signal.. ... Infineon Technologies Ag

06/18/15 / #20150171729

System and method for a power converter

According to an embodiment, a power supply controller includes a first controller, a second controller, a transformation circuit, a switch signal generator. The first controller is configured to provide a first control parameter based on a first power supply measurement signal and the second controller is configured to provide a second control parameter based on a second power supply measurement signal. ... Infineon Technologies Ag

06/18/15 / #20150171484

Panel, a method for fabricating a panel and a method

A panel according to an embodiment includes a translucent layer arrangement and a battery cell embedded at least partially into the translucent layer arrangement.. . ... Infineon Technologies Ag

06/18/15 / #20150171045

Compound structure and method for forming a compound structure

A compound structure including a carrier wafer and at least one semiconductor piece bonded onto the carrier wafer by a bonding material obtained by a ceramic-forming polymer precursor.. . ... Infineon Technologies Ag

06/18/15 / #20150171033

Semiconductor package with integrated microwave component

A semiconductor device package includes an encapsulant and a semiconductor chip. The semiconductor chip is at least partly embedded in the encapsulant. ... Infineon Technologies Ag

06/18/15 / #20150170987

Semiconductor devices and methods for manufacturing semiconductor devices

A method includes arranging multiple semiconductor chips over a first carrier and depositing a first material layer over surfaces of the multiple semiconductor chips, wherein depositing the first material layer includes a vapor deposition, and wherein the first material layer includes at least one of an organic material and a polymer.. . ... Infineon Technologies Ag

06/18/15 / #20150170835

Method of manufacturing an inductor core for a chip assembly and chip assembly

A method for manufacturing an inductor core is developed, wherein the method comprises the following: forming a first electrical conductor on a first surface of a plate-shaped magnetic core; forming a second electrical conductor on a second surface of the plate-shaped magnetic core, which is opposite the first surface; and forming the inductor core by dicing the plate-shaped magnetic core transverse to the first electrical conductor and second electrical conductor.. . ... Infineon Technologies Ag

06/18/15 / #20150170762

Word line address scan

The disclosure relates to systems and methods for performing a word line address scan in a semiconductor memory. More specifically, the disclosure provides a system and method for performing three scans for testing address decoder and word line drive circuits. ... Infineon Technologies Ag

06/18/15 / #20150170717

Method, apparatus and device for data processing

An embodiment relates to a method for data processing and comprises determining an electrical variable for each cell of a data bit, transforming each electrical variable into the time domain, and determining a blank state for at least one data bit based on a comparison of the transformed electrical variables.. . ... Infineon Technologies Ag

06/18/15 / #20150169488

Bus driver circuit with improved transition speed

A bus driver circuit may include a first and a second circuit node, wherein the first circuit node is operably coupled to a bus line, which causes a bus capacitance between the first and the second circuit node. A switching circuit is coupled to the first circuit node and configured to apply an output voltage between the first and the second circuit node. ... Infineon Technologies Ag

06/18/15 / #20150169438

Method and device for incrementing an erase counter

A method for incrementing an erase counter comprising several marker units is suggested, the method comprising the steps: (i) setting a marker unit in case a preceding marker unit was set; and (ii) not setting the marker unit in case the preceding marker unit was not set.. . ... Infineon Technologies Ag

06/18/15 / #20150168508

Low offset spinning current hall plate and method to operate it

One embodiment of the present invention relates to a method and apparatus for removing the effect of contact resistances for hall effect device contacts. In one embodiment, the apparatus comprises a hall effect device comprising a plurality of force and sense contact pairs. ... Infineon Technologies Ag

06/18/15 / #20150168456

Probe card and method for producing a probe card

A probe card for a wafer tester includes a mother card having a reinforcing element and at least one daughter card which is rigidly connected to the reinforcing element detachably. The mother card includes electrical contacts for producing an electrical connection with the wafer tester. ... Infineon Technologies Ag

06/18/15 / #20150168226

Temperature sensing circuit and method for sensing temperature

According to one embodiment, a temperature sensing circuit is described comprising a multiplicity of transistor circuits having a multiplicity of different temperature characteristics and a circuit configured to determine a plurality of mismatch values comprising, for each transistor circuit, a mismatch value representing the temperature characteristic of the transistor circuit and to determine a temperature value using the determined plurality of mismatch values.. . ... Infineon Technologies Ag

06/18/15 / #20150165835

Pressure module, transceiver module, control module, methods and computer programs for providing information related to a tire pressure

Embodiments may provide a pressure module, a transceiver module, a control module, methods and computer programs for providing information related to a tire pressure. The pressure module is configured to provide information related to a pressure of a tire in a vehicle and comprises a pressure determiner configured to determine the information related to the pressure of the tire. ... Infineon Technologies Ag

06/11/15 / #20150162418

Method for forming a semiconductor device

A method for forming a semiconductor device includes forming an electrical structure at a main surface of a semiconductor substrate and carrying out an anodic oxidation of a back side surface region of a back side surface of the semiconductor substrate to form an oxide layer at the back side surface of the semiconductor substrate.. . ... Infineon Technologies Ag

06/11/15 / #20150162411

Method of manufacturing a semiconductor structure and semiconductor structure

A method for manufacturing a semiconductor structure is provided, which may include: forming a p-doped region adjacent to an n-doped region in a substrate; carrying out an anodic oxidation to form an oxide layer on a surface of the substrate, wherein the oxide layer in a first portion of the surface extending along the n-doped region has a greater thickness than the oxide layer in a second portion of the surface extending along the p-doped region.. . ... Infineon Technologies Ag

06/11/15 / #20150162407

Semiconductor device with recombination region

A semiconductor device includes a drift zone in a semiconductor body. A charge-carrier transfer region forms a pn junction with the drift zone in the semiconductor body. ... Infineon Technologies Ag

06/11/15 / #20150162406

Semiconductor device with recombination region

A semiconductor device includes a pn junction between a drift zone and a charge-carrier transfer region in a semiconductor body. An access channel provides a permanent charge carrier path connecting the drift zone with a recombination region through a separation region between the drift zone and the recombination region. ... Infineon Technologies Ag

06/11/15 / #20150162318

Chip, chip package and die

In various embodiments, a chip for a chip package is provided. The chip may include a substrate and an integrated circuit over the substrate. ... Infineon Technologies Ag

06/11/15 / #20150162192

Method for forming a semiconductor device

A method for forming a semiconductor device includes carrying out an anodic oxidation of a surface region of a semiconductor substrate to form an oxide layer at a surface of the semiconductor substrate by generating an attracting electrical field between the semiconductor substrate and an external electrode within an electrolyte to attract oxidizing ions of the electrolyte, causing an oxidation of the surface region of the semiconductor substrate. Further, the method includes reducing the number of remaining oxidizing ions within the oxide layer, while the semiconductor substrate is within an electrolyte.. ... Infineon Technologies Ag

06/11/15 / #20150162056

Wordline activation

Methods and devices are disclosed where a voltage on a wordline is changed from a first voltage to a second voltage via a plurality of intermediate voltages.. . ... Infineon Technologies Ag

06/11/15 / #20150161308

Method and apparatus for use in design of a system

A method is disclosed for use in design of a system, the system to include a plurality of sources contributing to a variable system effect. The method includes determining a plurality of functional units to form the system, obtaining a plurality of constant functional unit source informations, determining at least one variable quantity, associating each functional unit with one of the at least one variable quantity, obtaining variable functional unit source information by combining the constant functional unit source information with the variable quantity associated with the functional unit, and deriving the variable system effect based on combining the variable functional unit source informations. ... Infineon Technologies Ag

06/11/15 / #20150160923

Random permutation generator and method for generating a random permutation sequence

According to one embodiment, a permutation generator is described comprising a memory configured to store, for each number of a predetermined set of numbers, whether the number has already been included in a number sequence; a receiver configured to receive a random number; a determiner configured to select a number from those numbers of the set of numbers that have not yet been included in the number sequence as next element of the number sequence based on the random number and an output configured to output the selected number as the next element of the number sequence.. . ... Infineon Technologies Ag

06/11/15 / #20150160325

Offset error compensation systems and methods in sensors

Embodiments relate to reducing offset error in sensor systems. In embodiments, the sensitivity and offset of a sensor depend differently on some parameter, e.g. ... Infineon Technologies Ag

06/11/15 / #20150160266

Passive input filter with adjustable clamping for shunt measurements

A method and an apparatus for a shunt measurement are provided. In one embodiment a measurement unit includes an input for a source device, the source device configured to provide a first analog voltage level to be measured in a first operating mode of the source device and a second analog voltage level to be measured in a second operating mode of the source device, a control input configured to detect the operating mode of the source device and an input stage configured to minimize a reaction time of the measurement unit after a change of the operating mode of the source device.. ... Infineon Technologies Ag

06/04/15 / #20150156872

Integrated ic package

An integrated circuit (ic) package comprises a package comprising a first set of pads having a pinout that is compatible with a chip core of a product family. A second set of pads are on substantially the same plane as the first set of pads and outside the package core. ... Infineon Technologies Ag

06/04/15 / #20150156834

Feedforward circuit for fast analog dimming in led drivers

Methods, devices, and circuits are disclosed delivering a first level of output current to one or more loads in a buck-boost converter comprising an inductor. The methods, devices, and circuits may further be disclosed applying, in response to an indication of an altered output current requirement to one or more loads in a buck-boost converter comprising an inductor, a change in a supplied reference voltage to one or more elements including a feedforward control element, wherein applying the change in the supplied reference voltage to the feedforward control element causes an adjustment of the output current from the first level to a second level corresponding to the altered current output requirement.. ... Infineon Technologies Ag

06/04/15 / #20150155777

Charge pumps with improved latchup characteristics

Some embodiments of the present disclosure relate to improved regulators for charge pumps. Such regulators selectively activate a charge pump based not only on the voltage output of the charge pump, but also on an series of wake-up pulses that are delivered at predetermined time intervals and which are delivered independently of the voltage output of the charge pump. ... Infineon Technologies Ag

06/04/15 / #20150155769

Method of di/dt current sensing

An integrated circuit package includes a power circuit having a plurality of transistors which form part of a main current loop of the power circuit, the plurality of transistors arranged in one or more layers of the integrated circuit package. The integrated circuit package further includes a conductive loop electrically decoupled from the plurality of transistors. ... Infineon Technologies Ag

06/04/15 / #20150155279

Semiconductor device with bipolar junction transistor cells

A semiconductor device includes a bipolar junction transistor cell including an emitter region which is at least partly formed between mesas of a semiconductor body. The emitter region extends between a first surface of the semiconductor body and an emitter bottom plane. ... Infineon Technologies Ag

06/04/15 / #20150155271

Device including two power semiconductor chips and manufacturing thereof

A device includes a first power semiconductor chip with a first contact pad and a second contact pad on a first face and a third contact pad on the second face. The device further includes a second power semiconductor chip with a first contact pad and a second contact pad on a first face and a third contact pad on the second face. ... Infineon Technologies Ag

06/04/15 / #20150155267

Electronic component with sheet-like redistribution structure

An electronic component comprising an electrically conductive chip carrier comprising an electrically insulating core structure at least partially covered with electrically conductive material, at least one electronic chip each having a first main surface attached to the chip carrier, and a sheet-like redistribution structure attached to a second main surface of the at least one electronic chip and configured for electrically connecting the second main surface of the at least one electronic chip with the chip carrier.. . ... Infineon Technologies Ag

06/04/15 / #20150155229

Leadless semiconductor package with optical inspection feature

A semiconductor package includes a plurality of bond pads having a first side and a second side opposing the first side, a coating covering the first side of the bond pads, semiconductor dies and electrical conductors attached to the second side of the bond pads, and a molding compound encasing the semiconductor dies and the electrical conductors at the second side of the bonds pads. The molding compound has a first side through which the bond pads protrude and a second side opposing the first side, the first side of the molding compound having a planar surface between adjacent ones of the bond pads. ... Infineon Technologies Ag

06/04/15 / #20150153425

Vertical hall sensor with high electrical symmetry

A vertical hall sensor includes a hall effect region and a plurality of contacts formed in or on a surface of the hall effect region. The plurality of contacts are arranged in a sequence along a path extending between a first end and a second end of the hall effect region. ... Infineon Technologies Ag

05/28/15 / #20150148958

Method and apparatus for failure handling of a robot

. . A method and apparatus for failure handling of a robot having at least a first and a second movement axis are disclosed. In one embodiment the method includes receiving a first position information of the first movement axis for a first point of time and a first position information of the second movement axis for the first point of time and storing the received first position information as a motion data set, receiving a second position information of the first movement axis for a second point of time and a second position information of the second movement axis for the second point of time and storing the received second position information in the motion data set and controlling the robot according to a failure procedure.. ... Infineon Technologies Ag

05/28/15 / #20150147850

Methods for processing a semiconductor workpiece

Methods for processing a semiconductor workpiece can include providing a semiconductor workpiece that includes one or more kerf regions; forming one or more trenches in the workpiece by removing material from the one or more kerf regions from a first side of the workpiece; mounting the workpiece with the first side to a carrier; thinning the workpiece from a second side of the workpiece; and forming a metallization layer over the second side of the workpiece.. . ... Infineon Technologies Ag

05/28/15 / #20150146894

Semiconductor device and a method for forming a semiconductor device

A semiconductor device includes a microphone module implemented on a first semiconductor die and a signal processing module implemented on a second semiconductor die. The microphone module includes a movable microphone element arranged at a main side of the first semiconductor die and the second semiconductor die is mounted to the main side of the first semiconductor die.. ... Infineon Technologies Ag

05/28/15 / #20150146831

Sensor, control unit and method to communicate between sensors and control units

A sensor may include a clock generator configured to generate a clock. A receiver may be configured to receive signals from a control unit, and a transmitter they be configured to send signals to the control unit. ... Infineon Technologies Ag

05/28/15 / #20150145538

Circuits and methods for measuring a current

A circuit is provided, including a first resistor, a second resistor and a control unit. The second resistor may have an adjustable resistance. ... Infineon Technologies Ag

05/28/15 / #20150145499

Interrupt protection circuits, systems and methods for sensors and other devices

Embodiments relate to circuits, systems and methods for providing interruption protection for sensors and other devices. One example embodiment includes an interruption protection circuit comprising at least one charge pump and at least one buffer capacitor configured to maintain and/or provide sufficient voltage for output signals of sensors or other devices during micro-breaks or other interruptions.. ... Infineon Technologies Ag

05/28/15 / #20150145149

Semiconductor device packaging

A method of manufacturing a semiconductor device package includes encapsulating at least partially a plurality of semiconductor chips with encapsulating material to form an encapsulation body. The encapsulation body has a first main surface and a second main surface. ... Infineon Technologies Ag

05/28/15 / #20150145112

Electronic component

In an embodiment, an electronic component includes a housing, a die pad having a first surface and a second surface opposing the first surface, a first high voltage semiconductor device arranged on the first surface of the die pad, a further semiconductor device arranged on the second surface of the die pad and a conductive connection between the first high voltage semiconductor device and the further semiconductor device. The conductive connection is surrounded by the housing and includes a portion arranged adjacent the die pad.. ... Infineon Technologies Ag

05/28/15 / #20150145107

Semiconductor chip with electrically conducting layer

A semiconductor device includes a semiconductor chip having a first main surface, a second main surface opposite to the first main surface, and a side wall surface. An electrical contact area is exposed at the side wall surface of the semiconductor chip. ... Infineon Technologies Ag

05/28/15 / #20150145079

Semiconductor devices and methods of fabrication thereof

In one embodiment, a method of manufacturing a semiconductor device includes oxidizing a substrate to form local oxide regions that extend above a top surface of the substrate. A membrane layer is formed over the local oxide regions and the top surface of the substrate. ... Infineon Technologies Ag

05/28/15 / #20150145078

Semiconductor package with air gap

A semiconductor package includes a semiconductor die having a first main side and a second main side opposite the first main side, the first main side having an inner region surrounded by a periphery region. The semiconductor package further includes a film covering the semiconductor die and adhered to the periphery region of the first main side of the semiconductor die. ... Infineon Technologies Ag

05/28/15 / #20150145074

Mems device

A mems device includes a fixed electrode and a movable electrode arranged isolated and spaced from the fixed electrode by a distance. The movable electrode is suspended against the fixed electrode by one or more spacers including an insulating material, wherein the movable electrode is laterally affixed to the one or more spacers.. ... Infineon Technologies Ag

05/28/15 / #20150145028

Semiconductor device with cell trench structures and contacts and method of manufacturing a semiconductor device

A semiconductor mesa is formed in a semiconductor layer between a first cell trench structure and a second cell trench structure extending from a first surface into the semiconductor layer. An opening is formed in a capping layer formed on the first surface, wherein the opening exposes at least a portion of the semiconductor mesa. ... Infineon Technologies Ag

05/28/15 / #20150144996

Semiconductor esd device and method of making same

A semiconductor device includes an scr esd device region disposed within a semiconductor body, and a plurality of first device regions of the first conductivity type disposed on a second device region of the second conductivity type, where the second conductivity type is opposite the first conductivity type. Also included is a plurality of third device regions having a sub-region of the first conductivity type and a sub-region of the second conductivity type disposed on the second device region. ... Infineon Technologies Ag

05/28/15 / #20150144988

Semiconductor device and insulated gate bipolar transistor with barrier regions

In a semiconductor device a barrier region is sandwiched between a drift region and a charge carrier transfer region. The barrier and charge carrier transfer regions form a pn junction. ... Infineon Technologies Ag

05/28/15 / #20150144966

Schottky diode with reduced forward voltage

A semiconductor component includes a semiconductor body of a first conduction type and a metal layer on the semiconductor body, wherein the metal layer forms with the semiconductor body a schottky contact along a contact surface. A doping concentration of the first conduction type on the contact surface varies along a direction of the contact surface.. ... Infineon Technologies Ag

05/28/15 / #20150144697

Chip arrangement and method for checking whether a chip is arranged in an intended chip carrier

One embodiment describes a chip arrangement having a chip carrier; a chip which is arranged in or on the chip carrier; a light sensor arrangement; a transparent layer which covers the light sensor arrangement, the light sensor arrangement being set up to determine a light pattern of light received by the light sensor arrangement from outside the chip arrangement through the transparent layer; and a test circuit which is set up to check whether the light pattern matches a reference light pattern and to output a signal on the basis of the result of the check.. . ... Infineon Technologies Ag

05/21/15 / #20150143550

Chip and method for detecting an attack on a chip

According to one embodiment, a chip is described comprising a substrate; an energy source configured to provide energy to the substrate; an energy receiver configured to receive energy from the energy source via the substrate and a determiner configured to determine a value of a parameter of the energy transmission between the energy source and the energy receiver, to check whether the value matches a predetermined value of the parameter and to output a signal depending on the result of the check.. . ... Infineon Technologies Ag

05/21/15 / #20150143189

Coverage enhancement and power aware clock system for structural delay-fault test

Methods and devices applying to a clock system of scan circuits to enhance the test coverage for structural delay-fault tests are provided. According to an aspect, a method applying to a clock system of a scan circuit of a scan test containing one or more clock gating cells includes at any stage of the scan test outputting a controllable waveform of a clock signal at each clock gating cell, and eliminating a partially enabled clock signal during a capture cycle at each clock gating cell.. ... Infineon Technologies Ag

05/21/15 / #20150143005

Method and apparatus for use in a data processing system

A method is described, for use in a data processing system, the system having a node and a communication link, wherein the communication link is coupled to the node. The method can comprise obtaining first digital signal information associated with a first signal, transmitting the first signal from the node to the communication link, receiving a second signal from the communication link at the node, and analysing the second signal to obtain second digital signal information. ... Infineon Technologies Ag

05/21/15 / #20150142376

Perpendicular gradiometric angle sensors, systems and methods

Embodiments relate to magnetic field sensors, such as gradiometric magnetic field angle sensors with generally on-axis arrangements of sensor elements relative to a rotation axis of a magnet. In one embodiment, an angle sensor is arranged on-axis with respect to the rotation axis of a magnet that generates a magnetic field that can be detected by the angle sensor and analyzed to determine an angular position of the magnet. ... Infineon Technologies Ag

05/21/15 / #20150140770

Methods for producing a tunnel field-effect transistor

A method for producing a tunnel field-effect transistor is disclosed. Connection regions of different doping types are produced by means of self-aligning implantation methods.. ... Infineon Technologies Ag

05/21/15 / #20150138906

Systems and methods for non-volatile memory

A self powered memory system is disclosed. The system includes a volatile supply component, a battery component, a switch component, and a volatile memory component. ... Infineon Technologies Ag

05/21/15 / #20150138847

Converter

A converter may include a transformer; a first circuit arrangement coupled to a first transformer side; a second circuit arrangement coupled to a second transformer side, wherein the second circuit arrangement is configured to provide an output voltage; a first coupler configured to provide information about the output voltage to the first circuit arrangement; wherein the first circuit arrangement is configured to determine a state of the secondary side based on the received information about the output voltage, and to generate a switch control signal dependent on the determined state; a switch circuit arranged on the second side; and a second coupler configured to provide a switch control signal from the first circuit arrangement to the switch circuit; wherein the switch circuit is coupled to the first circuit arrangement to provide a first circuit arrangement control signal to the first circuit arrangement depending on the switch control signal.. . ... Infineon Technologies Ag

05/21/15 / #20150138371

Integrated reference pixel

Representative implementations of devices and techniques provide dynamic calibration for imaging devices and systems. A reference pixel is arranged to receive an electrical reference signal and to output a calibration signal. ... Infineon Technologies Ag

05/21/15 / #20150138006

Multi-rate pipelined adc structure

Representative implementations of devices and techniques provide analog to digital conversion of analog inputs. A plurality of analog-to-digital converters (adcs) can be arranged such that one or more of the adcs is operating at a sampling rate that is less than others of the plurality of adcs. ... Infineon Technologies Ag

05/21/15 / #20150137805

Vertical hall sensor with series-connected hall effect regions

A vertical hall sensor includes first and second vertical hall effect regions formed in a semiconductor substrate and of the same doping type, with first and second pluralities of contacts arranged at one side of the first or second vertical hall effect regions, respectively. The second vertical hall effect region is connected in series with the first vertical hall effect region regarding a power supply to the first and second vertical hall effect regions. ... Infineon Technologies Ag

05/21/15 / #20150137800

Rotation sensing method and system

A sensing system and method. A coded wheel is configured to generate a signal that varies with rotation of the coded wheel. ... Infineon Technologies Ag

05/21/15 / #20150137797

Off-axis magnetic field angle sensors

Embodiments relate to magnetic field angle sensing systems and methods. In an embodiment, a magnetic field angle sensing system configured to determine a rotational position of a magnetic field source around an axis, comprises n sensor devices arranged in a circle concentric to an axis, wherein n>1 and the sensor devices are spaced apart from one another by about (360/n) degrees along the circle, each sensor device comprising a magnetic field sensing device having a sensitivity plane comprising at least one reference direction of the magnetic field sensing device, wherein the magnetic field sensing device is sensitive to a magnetic field component in the sensitivity plane and configured to provide a signal related to a (co)sine of an angle between the reference direction and the magnetic field in the sensitivity plane; and circuitry coupled to the n sensor devices and configured to provide a signal indicative of a rotational position of a magnetic field source around the axis determined by combining the signals from the magnetic field sensing devices of the n sensor devices.. ... Infineon Technologies Ag

05/21/15 / #20150137796

On-axis magnetic field angle sensors, systems and methods

Embodiments relate to magnetic field sensors, such as magnetic field angle sensors with generally on-axis arrangements of sensor elements relative to a rotation axis of a magnet or shaft. The shaft comprises or is coupled to an end portion that comprises a soft magnetic material, in embodiments, with the end portion having an end surface proximate the sensor that is rotationally asymmetric with respect to the rotation axis running through the length of the shaft. ... Infineon Technologies Ag

05/21/15 / #20150137789

System and method for a serial bus interface

In accordance with an embodiment, a method of operating a charging port having a power connection and a first data connection includes determining whether a compatible device is coupled to the charging port and receiving a serial data stream from the compatible device via the first data connection. The serial data stream includes a plurality of symbols representing a request for a power supply voltage and/or current, and the method further includes applying the requested power supply voltage and/or current to the power connection.. ... Infineon Technologies Ag

05/21/15 / #20150137309

Methods of fabricating isolation regions of semiconductor devices and structures thereof

Methods of fabricating isolation regions of semiconductor devices and structures thereof are disclosed. In a preferred embodiment, a semiconductor device includes a workpiece and at least one trench formed in the workpiece. ... Infineon Technologies Ag

05/21/15 / #20150137305

Protective structure and method for producing a protective structure

Described herein is a protective structure. The protective structure includes a semiconductor substrate, a first diode disposed at least one of in or on the semiconductor substrate and a diode arrangement disposed at least one of in or on the semiconductor substrate. ... Infineon Technologies Ag

05/21/15 / #20150137253

Stress-inducing structures, methods, and materials

Stress-inducing structures, methods, and materials are disclosed. In one embodiment, an isolation region includes an insulating material in a lower portion of a trench formed in a workpiece and a stress-inducing material disposed in a top portion of the trench over the insulating material.. ... Infineon Technologies Ag

05/21/15 / #20150137226

Semiconductor device and method for producing a semiconductor device

A semiconductor device includes a semiconductor substrate having first regions of a first conductivity type and body regions of the first conductivity type, which are arranged in a manner adjoining the first region and overlap the latter in each case on a side of the first region which faces a first surface of the semiconductor substrate, and having a multiplicity of drift zone regions arranged between the first regions and composed of a semiconductor material of a second conductivity type, which is different than the first conductivity type. The first regions and the drift zone regions are arranged alternately and form a superjunction structure. ... Infineon Technologies Ag

05/21/15 / #20150137224

Semiconductor device, integrated circuit and method of forming a semiconductor device

A semiconductor device comprises a transistor formed in a semiconductor body having a first main surface. The transistor comprises a source region, a drain region, a channel region, a drift zone, a source contact electrically connected to the source region, a drain contact electrically connected to the drain region, and a gate electrode at the channel region. ... Infineon Technologies Ag

05/21/15 / #20150137144

Predetermined kerf regions and methods of fabrication thereof

In one embodiment, the semiconductor die includes a selective epitaxial layer including device regions, and a masking structure disposed around sidewalls of the epitaxial layer. The masking structure is part of an exposed surface of the semiconductor die.. ... Infineon Technologies Ag

05/21/15 / #20150137143

Junction field effect transistor cell with lateral channel region

A junction field effect transistor cell of a semiconductor device includes a top gate region, a lateral channel region and a buried gate region arranged along a vertical direction. The lateral channel region includes first zones of a first conductivity type and second zones of a second conductivity type which alternate along a lateral direction perpendicular to the vertical direction. ... Infineon Technologies Ag

05/21/15 / #20150137142

Junction field effect transistor cell with lateral channel region

A semiconductor device includes a junction field effect transistor cell with a top gate region, a lateral channel region and a buried gate region. The lateral channel region is arranged between the top gate region and the buried gate region along a vertical direction with respect to a first surface of a semiconductor body. ... Infineon Technologies Ag

05/07/15 / #20150125003

System and method for a mems transducer

An embodiment as described herein includes a microelectromechanical system (mems) with a first mems transducer element, a second mems transducer element, and a semiconductor substrate. The first and second mems transducer elements are disposed at a top surface of the semiconductor substrate and the semiconductor substrate includes a shared cavity acoustically coupled to the first and second mems transducer elements.. ... Infineon Technologies Ag

05/07/15 / #20150124420

Electronic device and method of fabricating an electronic device

An electronic device may comprise a semiconductor element and a wire bond connecting the semiconductor element to a substrate. Using a woven bonding wire may improve the mechanical and electrical properties of the wire bond. ... Infineon Technologies Ag

05/07/15 / #20150124363

Electronic safety path

A system is described that includes a first portion including one or more components configured to implement one or more safety functions of an application. The system further includes, a second, different portion comprising one or more different components configured to activate a safety path in response to a detection of a voltage overstress in the first portion. ... Infineon Technologies Ag

05/07/15 / #20150124359

Combined esd active clamp for cascaded voltage pins

A combined electro static discharge clamp for cascaded voltage pins can include an electronic switch, a plurality of discharge paths, and a plurality of trigger circuits. In response to detecting a voltage event across any two voltage pins, the trigger circuitry can turn on the electronic switch causing current caused by the voltage event to flow through one or more of the discharge paths instead of through functional circuitry which could potentially be damaged by the current caused by the voltage event.. ... Infineon Technologies Ag

05/07/15 / #20150123729

Voltage regulating circuit

In various embodiments, a circuit is provided including a supply terminal, a logic circuit, an inverter and a control transistor which may include a body region, first and second source/drain regions, a gate insulating region having a layer thickness and a gate region. The first source/drain region may be coupled to the supply terminal. ... Infineon Technologies Ag

05/07/15 / #20150123264

Semiconductor devices and methods of forming thereof

In accordance with an embodiment of the present invention, a method of forming a semiconductor device includes forming a contact layer over a first major surface of a substrate. The substrate includes device regions separated by kerf regions. ... Infineon Technologies Ag

05/07/15 / #20150123255

Method for manufacturing a chip arrangement, and chip arrangement

A method for manufacturing a chip arrangement in accordance with various embodiments may include: placing a chip on a carrier within an opening of a metal structure disposed over the carrier; fixing the chip to the metal structure; removing the carrier to thereby expose at least one contact of the chip; and forming an electrically conductive connection between the at least one contact of the chip and the metal structure.. . ... Infineon Technologies Ag

05/07/15 / #20150123247

Semiconductor component having a dopant region formed by a dopant composed of an oxygen / vacancy complex

A semiconductor component includes a semiconductor body having a first side and a second side opposite the first side. In the semiconductor body, a dopant region is formed by a dopant composed of an oxygen complex. ... Infineon Technologies Ag

05/07/15 / #20150123201

Strained semiconductor device and method of making the same

In a method for forming a semiconductor device, a gate electrode is formed over a semiconductor body (e.g., bulk silicon substrate or soi layer). The gate electrode is electrically insulated from the semiconductor body. ... Infineon Technologies Ag

05/07/15 / #20150123149

Semiconductor device and method for producing the same

A semiconductor device comprises a semiconductor body with a front face and a back face, having an active zone located at the front face, a front surface metallization layer having a front face and a back face directed towards the active zone, the front surface metallization layer being provided on the front face of the semiconductor body and being electrically connected to the active zone, and a first barrier layer, comprising amorphous metal nitride, located between the active zone and the metallization layer. Further, a method for producing such a device is provided.. ... Infineon Technologies Ag

05/07/15 / #20150123145

Semiconductor device and method for producing the same

A semiconductor device includes a semiconductor body with a front face and a back face, having an active zone located at the front face, a front surface metallization layer having a front face and a back face directed towards the active zone, the front surface metallization layer being provided on the front face of the semiconductor body and being electrically connected to the active zone, and a first barrier layer, including amorphous molybdenum nitride, located between the active zone and the metallization layer. Further, a method for producing such a device is provided.. ... Infineon Technologies Ag

05/07/15 / #20150123142

Power semiconductor device including a cooling material

A power semiconductor device includes a wiring structure adjoining at least one side of a semiconductor body and comprising at least one electrically conductive compound. The power semiconductor device further includes a cooling material in the wiring structure. ... Infineon Technologies Ag

05/07/15 / #20150123131

Semiconductor devices and methods of formation thereof

In one embodiment, a semiconductor device includes a first contact pad disposed at a top side of a workpiece, a second contact pad disposed at the top side of the workpiece. An isolation region is disposed between the first contact pad and the second contact pad. ... Infineon Technologies Ag

04/30/15 / #20150121016

Method, apparatus and device for data processing

A method for data processing is disclosed. A blank state is determined for several data bits based on a majority decision. ... Infineon Technologies Ag

04/30/15 / #20150120035

Systems and methods for linking trace information with sensor data

A trace correlation system includes a data source, a controller, a probe component, and a tool. The data source is configured to provide raw data. ... Infineon Technologies Ag

04/30/15 / #20150117862

System and method for a millimeter wave circuit board

According to an embodiment, a circuit board includes a signal line including at least portion of a first conductive layer that has a first portion extending over a cavity in the circuit board from a first side of the cavity. The circuit board also includes a first plurality of conductive vias surrounding the cavity and the first plurality of vias include at least one blind via disposed adjacent to the first side of the cavity.. ... Infineon Technologies Ag

04/30/15 / #20150116105

Apparatus and method for determining a state parameter of an object to be monitored

An apparatus for determining a state parameter of an object to be monitored comprises a means for providing a plurality of measurement values, wherein the measurement values comprise information relating to the state parameter of the object to be monitored, a comparison means for comparing the measurement value to a predeterminable comparison parameter, wherein the comparison means is formed to output a first comparison signal when a predeterminable number of measurement values falls below the comparison parameter within a measurement interval, or to output a second comparison signal when the predeterminable number of measurement values exceeds or reaches the comparison parameter, wherein the first comparison signal or the second comparison signal indicate the state parameter.. . ... Infineon Technologies Ag

04/30/15 / #20150115946

Systems and methods having omnipolar comparators for magnetic switches

An omnipolar magnetic sensor system includes an input stage and a behavior component. The input stage is configured to receive a source signal and to selectively chop the source signal. ... Infineon Technologies Ag

04/30/15 / #20150115932

Circuit, method and sensor for obtaining information on a physical quantity

A circuit for obtaining information on a physical quantity according to an embodiment includes a sensor arrangement sensitive to the physical quantity, at least one further sensor element sensitive to the physical quantity and a supply circuit configured to provide the sensor arrangement with a supply signal comprising a supply voltage controlled by the supply circuit in a closed-loop configuration. The supply circuit is further configured to provide the at least one further sensor element with a further supply signal comprising a further supply current such that a magnitude of the further supply current fulfills a predetermined relationship with a magnitude of a supply current of the supply signal. ... Infineon Technologies Ag

04/30/15 / #20150115475

Device including semiconductor chips and method for producing such device

A device includes a first semiconductor chip including a first face, wherein a first contact pad is arranged over the first face. The device further includes a second semiconductor chip including a first face, wherein a first contact pad is arranged over the first face, wherein the first semiconductor chip and the second semiconductor chip are arranged such that the first face of the first semiconductor chip faces in a first direction and the first face of the second semiconductor chip faces in a second direction opposite to the first direction. ... Infineon Technologies Ag

04/30/15 / #20150115458

Semiconductor device and method for manufacturing a semiconductor device

A device includes a first semiconductor chip including a first face, wherein a first contact pad is arranged over the first face. The device further includes a second semiconductor chip including a first face, wherein a first contact pad is arranged over the first face, wherein the first semiconductor chip and the second semiconductor chip are arranged such that the first face of the first semiconductor chip faces in a first direction and the first face of the second semiconductor chip faces in a second direction opposite to the first direction. ... Infineon Technologies Ag

04/30/15 / #20150115449

Semiconductor device having a corrosion-resistant metallization and method for manufacturing thereof

A semiconductor device includes a semiconductor substrate having a first side, a second side opposite the first side, an active area, an outer rim, and an edge termination area arranged between the outer rim and the active area. A metallization structure is arranged on the first side of the semiconductor substrate and comprising at least a first metal layer comprised of a first metallic material and a second metal layer comprised of a second metallic material, wherein the first metallic material is electrochemically more stable than the second metallic material. ... Infineon Technologies Ag

04/30/15 / #20150115448

Method for processing wafer

A method for processing a wafer including a plurality of chips is provided. The method may include: forming a trench in the wafer between the plurality of chips; forming a diffusion barrier layer at least over the sidewalls of the trench; forming encapsulation material over the plurality of chips and in the trench; and singularizing the plurality of chips from a side opposite the encapsulation material.. ... Infineon Technologies Ag

04/30/15 / #20150115442

Redistribution layer and method of forming a redistribution layer

A redistribution layer for a chip is provided, wherein the redistribution layer comprises at least one electrical conductor path connecting two connection points with each other, wherein the at least one electrical conductor path is arranged on a planar supporting layer and wherein the electrical conductor path comprises copper and at least one other further electrical conductive material in an amount of more than 0.04 mass percent.. . ... Infineon Technologies Ag

04/30/15 / #20150115417

Methods for manufacturing a chip arrangement, methods for manufacturing a chip package, a chip package and chip arrangements

A method for manufacturing a chip arrangement is provided, the method including: forming a hole in a carrier including at least one chip, wherein forming a hole in the carrier includes: selectively removing carrier material, thereby forming a cavity in the carrier, forming passivation material over one or more cavity walls exposed by the selective removal of the carrier material; selectively removing a portion of the passivation material and further carrier material exposed by the selective removal of the passivation material, wherein a further portion of the passivation material remains over at least one cavity side wall; the method further including subsequently forming a layer over the further portion of passivation material remaining over the at least one cavity side wall.. . ... Infineon Technologies Ag

04/30/15 / #20150115356

Method for manufacturing a vertical semiconductor device and vertical semiconductor device

Producing a vertical semiconductor device includes: providing a semiconductor wafer including a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type forming a first pn-junction with the first layer, and a third semiconductor layer of the first conductivity type forming a second pn-junction with the second layer and extending to a main surface of the wafer; forming a hard mask on the main surface that includes hard mask portions spaced apart from each other by first openings; using the hard mask to etch deep trenches from the main surface into the first layer so that mesa regions covered at the main surface by respective hard mask portions are formed between adjacent trenches; filling the trenches and first openings of the hard mask; and etching the hard mask to form second openings in the hard mask at the main surface of the mesas.. . ... Infineon Technologies Ag

04/30/15 / #20150115353

Field effect semiconductor component and method for producing it

What is provided is a field effect component including a semiconductor body, which extends in an edge zone from a rear side as far as a top side and which includes a semiconductor mesa, which extends in a vertical direction, which is perpendicular to the rear side and/or the top side. The semiconductor body in a vertical cross section further includes a drift region, which extends at least in the edge region as far as the top side and which is arranged partly in the semiconductor mesa, and a body region, which is arranged at least partly in the semiconductor mesa and which forms a pn junction with the drift region. ... Infineon Technologies Ag

04/23/15 / #20150113637

Data processing arrangement and method for ensuring the integrity of the execution of a computer program

According to one embodiment, a data processing arrangement is described comprising a processor configured to carry out a computer program including a plurality of program instructions; a signature determination arrangement configured to determine a signature of the program instructions carried out by the processor wherein the processor is configured to, when it carries out a program instruction of the plurality of program instructions which indicates the next program instruction of the plurality of program instructions to be carried out, provide information about the indication to the signature determination arrangement; wherein the signature determination arrangement is configured to take into account the information in the determination of the signature; and a detector configured to check, when the computer program is completely carried out, whether the determined signature is equal to a reference signature.. . ... Infineon Technologies Ag

04/23/15 / #20150111343

Electronic component

An electronic component includes an electrically conductive carrier. The electrically conductive carrier includes a carrier surface and a semiconductor chip includes a chip surface. ... Infineon Technologies Ag

04/23/15 / #20150110300

System and method for a transducer interface

According to an embodiment, an interface circuit includes a current replicator and a receiver. The current replicator includes a power terminal coupled to a first reference node, an output terminal configured to output a signal proportional to a signal received from a transducer, and an interface terminal coupled to the transducer. ... Infineon Technologies Ag

04/23/15 / #20150110296

System and method for transducer biasing and shock protection

In accordance with an embodiment, an interface circuit includes an amplifier configured to be coupled to a transducer, a first bypass circuit coupled to a first voltage reference and the amplifier, a second bypass circuit coupled to the first voltage reference and the amplifier, and a control circuit coupled to the second bypass circuit. The first bypass circuit conducts a current when an input signal amplitude greater than a first threshold is applied to the transducer and the control circuit causes the second bypass circuit to conduct a current for a first time period after the first bypass circuit conducts a current.. ... Infineon Technologies Ag

04/23/15 / #20150110295

System and method for automatic calibration of a transducer

In accordance with an embodiment, an interface circuit includes a variable voltage bias generator coupled to a transducer, and a measurement circuit coupled to an output of the transducer. The measurement circuit is configured to measure an output amplitude of the transducer. ... Infineon Technologies Ag

04/23/15 / #20150109072

System and method for a tunable capacitance circuit

A tunable capacitance circuit comprises a plurality of varactor transistors which are coupled in series. An antenna tuner comprises such a tunable capacitance circuit.. ... Infineon Technologies Ag

04/23/15 / #20150109050

Method of operating a reverse conducting igbt

According to an embodiment of a method, a semiconductor device is operated in a reverse biased unipolar mode before operating the semiconductor device in an off-state in a forward biased mode. The semiconductor device includes at least one floating parasitic region disposed outside a cell region of the device.. ... Infineon Technologies Ag

04/23/15 / #20150108972

Sensor device and method

Embodiments relate to a sensor device including a layer stack 600, the layer stack 600 including at least ferromagnetic and non-magnetic layers formed on a common substrate 620. The sensor device 600 further includes at least a first magneto-resistive sensor element 711 provided by a first section 611 of the layer stack 600. ... Infineon Technologies Ag

04/23/15 / #20150108971

Apparatus and method for detecting an error in a measurement of a quantity

Embodiments relate to an apparatus comprising a first measurement bridge circuit. The first measurement bridge circuit comprises a first half bridge for providing a first half bridge signal in response to a quantity to be measured and a second half bridge for providing a second half bridge signal in response to the quantity. ... Infineon Technologies Ag

04/23/15 / #20150108666

Thinning in package using separation structure as stop

A method of forming a thinned encapsulated chip structure, wherein the method comprises providing a separation structure arranged within an electronic chip, encapsulating part of the electronic chip by an encapsulating structure, and thinning selectively the electronic chip partially encapsulated by the encapsulating structure so that the encapsulating structure remains with a larger thickness than the thinned electronic chip, wherein the separation structure functions as a thinning stop.. . ... Infineon Technologies Ag

04/16/15 / #20150103452

Esd protection devices and methods

Various embodiments described below relate to an esd protection device that includes a voltage controlled shunt (e.g., a transistor) to selectively shunt energy of an incoming esd pulse away from a circuit that includes a semiconductor device to be protected. In some embodiments, the esd protection device includes a power up detection element to determine whether the circuit has powered up. ... Infineon Technologies Ag

04/16/15 / #20150103349

Photodetector with controllable spectral response

A photodetector includes a semiconductor substrate having an irradiation zone configured to generate charge carriers having opposite charge carrier types in response to an irradiation of the semiconductor substrate. The photodetector further includes an inversion zone generator configured to operate in at least two operating states to generate different inversion zones within the substrate, wherein a first inversion zone generated in a first operating state differs from a second inversion zone generated in a second operating state, and wherein the first inversion zone and the second inversion zone have different extensions in the semiconductor substrate. ... Infineon Technologies Ag

04/16/15 / #20150102807

Hall effect sensor with graphene detection layer

A hall effect sensor with a graphene detection layer implemented in a variety of geometries, including the possibility of a so-called “full 3-d” hall sensor, with the option for integration in a bicmos process and a method for producing said hall effect sensor is disclosed.. . ... Infineon Technologies Ag

04/16/15 / #20150102479

Electrically insulating thermal interface on the discontinuity of an encapsulation structure

Method for manufacturing an electronic semiconductor package, in which method an electronic chip (100) is coupled to a carrier, the electronic chip is at least partially encapsulated by means of an encapsulation structure having a discontinuity, and the carrier is partially encapsulated, and at least one part of the discontinuity and a volume connected thereto adjoining an exposed surface section of the carrier are covered by an electrically insulating thermal interface structure, which electrically decouples at least one part of the carrier with respect to its surroundings.. . ... Infineon Technologies Ag

04/16/15 / #20150102404

Semiconductor device

A semiconductor device includes a transistor formed in a semiconductor substrate including a main surface. The transistor includes a source region, a drain region, a channel region, and a gate electrode. ... Infineon Technologies Ag

04/16/15 / #20150102372

Semiconductor device for emitting frequency-adjusted infrared light

A semiconductor device for emitting frequency-adjusted infrared light includes a lateral emitter structure and a lateral filter structure. The lateral emitter structure is configured to emit infrared light with an emitter frequency distribution. ... Infineon Technologies Ag

04/16/15 / #20150101395

Photoacoustic gas sensor device and a method for analyzing gas

A photoacoustic gas sensor device for analyzing gas includes an emitter module and a pressure-sensitive module. The emitter module is arranged on a carrier substrate and emits light pulses. ... Infineon Technologies Ag

04/09/15 / #20150100264

Resolver calibration for permanent magnet synchronous motor

The present invention relates to resolver calibration for permanent magnet synchronous motor. According to embodiments of the present invention, the high frequency rotating voltage vector is generated and injected into a resolver associated with a permanent magnet synchronous motor (pmsm). ... Infineon Technologies Ag

04/09/15 / #20150099341

Methods for producing polysilicon resistors

A method for producing a polysilicon resistor device may include: forming a polysilicon layer; implanting first dopant atoms into at least a portion of the polysilicon layer, wherein the first dopant atoms include deep energy level donors; implanting second dopant atoms into said at least a portion of said polysilicon layer; and annealing said at least a portion of said polysilicon layer.. . ... Infineon Technologies Ag

04/09/15 / #20150098292

Methods and systems for addressing memory with variable density

Embodiments relate to systems and methods for simplified addressing of a memory device whose total memory capacity is extendible by an additional memory capacity or a factor to a total extended memory capacity, the method comprising dividing the additional memory capacity into a set of binary memory fractions of the total memory capacity such that a sum of all binary memory fractions equals the additional memory capacity, and addressing each one of the binary memory fractions by a binary based addressing scheme.. . ... Infineon Technologies Ag

04/09/15 / #20150097741

Antenna with multifrequency capability for miniaturized applications

A circuit arrangement includes a first antenna configured to couple to an electromagnetic field from a first frequency band and a second antenna configured to couple to an electromagnetic field from a second frequency band, the second frequency band being different than the first frequency band. The first antenna is connected in series with the second antenna as an electrical supply line therefor.. ... Infineon Technologies Ag

04/09/15 / #20150097613

Gate clamping

A circuit is described that includes a switch, a switchable clamping element coupled to the switch, and a driver configured to control the switch based at least in part on a driver control signal. The driver is further configured to enable or disable the switchable clamping element. ... Infineon Technologies Ag

04/09/15 / #20150097294

Method for processing a wafer and wafer structure

A method for processing a wafer in accordance with various embodiments may include: removing wafer material from an inner portion of the wafer to form a structure at an edge region of the wafer to at least partially surround the inner portion of the wafer, and printing material into the inner portion of the wafer using the structure as a printing mask. A method for processing a wafer in accordance with various embodiments may include: providing a carrier and a wafer, the wafer having a first side and a second side opposite the first side, the first side of the wafer being attached to the carrier, the second side having a structure at an edge region of the wafer, the structure at least partially surrounding an inner portion of the wafer; and printing material onto at least a portion of the second side of the wafer.. ... Infineon Technologies Ag

04/09/15 / #20150097282

Chip packages, chip arrangements, a circuit board, and methods for manufacturing chip packages

A chip package is provided, the chip package including: a chip carrier; a chip disposed over and electrically connected to a chip carrier top side; an electrically insulating material disposed over and at least partially surrounding the chip; one or more electrically conductive contact regions formed over the electrically insulating material and in electrical connection with the chip; a further electrically insulating material disposed over a chip carrier bottom side; wherein an electrically conductive contact region on the chip carrier bottom side is released from the further electrically insulating material.. . ... Infineon Technologies Ag

04/09/15 / #20150097233

Semiconductor device and method of manufacturing the same

A semiconductor device includes a vertical igfet in a first area of a semiconductor body, the vertical igfet having a drift zone between a body zone and a drain electrode, the drift zone having a vertical dopant profile of a first conductivity type being a superposition of a first dopant profile declining with increasing distance from the drain electrode and dominating the vertical dopant profile in a first zone next to the drain electrode and a second dopant profile being a broadened peak dopant profile and dominating the vertical dopant profile in a second zone next to the body zone.. . ... Infineon Technologies Ag

04/09/15 / #20150097184

Semiconductor device and a method for forming a semiconductor device

A semiconductor device includes a semiconductor substrate. The semiconductor substrate includes a plurality of first doping regions of a first doping structure arranged at a main surface of the semiconductor substrate and a plurality of second doping regions of the first doping structure arranged at the main surface of the semiconductor substrate. ... Infineon Technologies Ag

04/09/15 / #20150097105

Photodiode with compensated spectral response

An optical detector includes a first set of one or more photodiodes configured to generate a first photocurrent according to a first spectral response function of an incident light, a second set of one or more photodiodes configured to generate a second photocurrent according to a second spectral response function of the incident light, and a third set of one or more photodiodes configured to generate a third photocurrent according to a third spectral response function of the incident light. The optical detector further includes a module configured to output an indication of the intensity of the incident light according to a fourth spectral response function based on each of the first photocurrent, the second photocurrent, and the third photocurrent.. ... Infineon Technologies Ag

04/09/15 / #20150097040

Booster antenna structure

In various embodiments, a booster antenna structure is provided, comprising a chip coupling region; a coil having a conductor forming multiple windings, wherein the coil encloses the chip coupling region substantially completely, wherein the conductor is arranged around the chip coupling region in a crossover-free manner.. . ... Infineon Technologies Ag

04/09/15 / #20150096362

Extraction of tire characteristics combining direct tpms and tire resonance analysis

Embodiments relate to tire characterization systems and methods for combining direct tire pressure monitoring systems (tpms) and tire resonance analysis in indirect tire pressure monitoring systems (tpms) for the extraction of tire characteristics to characterize other tire parameters. In embodiments, itpms and methods that utilize anti-lock braking system (abs) sensed signals coupled to an electronic control unit (ecu) that may comprise circuitry and/or controllers to process the sensed signals using a resonance frequency analysis (rfa) technique can be combined with direct tire pressure sensor measurements from direct tpms systems. ... Infineon Technologies Ag

04/02/15 / #20150095660

Computational system

A computational system is configured to protect against integrity violation. The computational system includes a processing unit and a critical resource, the critical resource being controllable by the processing unit so as to be locked or unlocked. ... Infineon Technologies Ag

04/02/15 / #20150095395

Processing device and method for multiplying polynomials

According to one embodiment, a processing device for multiplying a first polynomial with a second polynomial is described including a first memory storing a representation of the first polynomial, a controller configured to separate the first polynomial into parts, a second memory storing pre-determined results of the multiplications of the second polynomial with possible forms of the parts of the first polynomial, a third memory for storing the result of the multiplication, an address logic, configured to determine, for each part of the first polynomial, a start address of a memory block of the second memory based on the form of the part and the location of the part within the first polynomial and an adder configured to add, for each determined address of the memory block of the second memory, the content of the memory block of the second memory at least partially to the contents of the third memory, wherein the data element of the third memory to which the content of a data element of the memory block of the second memory is added is the same for a plurality of the parts of the first polynomial.. . ... Infineon Technologies Ag

04/02/15 / #20150092814

Method of examining a substrate and corresponding device

A method of examining a substrate is provided. The method may include: generating a temperature gradient along a surface of the substrate; detecting a heat radiation emitted from the substrate; and determining as to whether the substrate is damaged based on the detected heat radiation.. ... Infineon Technologies Ag

04/02/15 / #20150092467

Driver circuit for a pair of semiconductor switches in a leg of a three-level inverter half-bridge

A three-level driver circuit for an inverter half-bridge includes an output inverter half-bridge, which has four switches in series. The switches are controlled by signals from a switch controller applied via gate drivers. ... Infineon Technologies Ag

04/02/15 / #20150092380

Semiconductor module comprising printed circuit board and method for producing a semiconductor module comprising a printed circuit board

A semiconductor module includes a printed circuit board, a ceramic substrate and a semiconductor chip. The printed circuit board includes an insulating material, a cutout formed in the insulating material, and a first metallization layer, which is partly embedded into the insulating material. ... Infineon Technologies Ag

04/02/15 / #20150092376

Power semiconductor module and method for producing a power semiconductor module

A printed circuit board (pcb) has a first, structured metalization arranged on its top side and at least one second metalization arranged below the first metalization in a vertical direction, parallel to the first metalization and insulated therefrom. Also on the pcb top side is a bare semiconductor chip having contact electrodes connected by bonding wires to corresponding contact pads of the first metalization on the pcb top side. ... Infineon Technologies Ag

04/02/15 / #20150092371

Contact pad structure, an electronic component, and a method for manufacturing a contact pad structure

According to various embodiments, a contact pad structure may be provided, the contact pad structure may include: a dielectric layer structure; at least one contact pad being in physical contact with the dielectric layer structure; the at least one contact pad including a metal structure and a liner structure, wherein the liner structure is disposed between the metal structure of the at least one contact pad and the dielectric layer structure, and wherein a surface of the at least one contact pad is at least partially free from the liner structure, and a contact structure including an electrically conductive material; the contact structure completely covering at least the surface being at least partially free from the liner structure of the at least one contact pad, wherein the liner structure and the contact structure form a diffusion barrier for a material of the metal structure of the at least one contact pad.. . ... Infineon Technologies Ag

04/02/15 / #20150092307

On chip reverse polarity protection compliant with iso and esd requirements

A semiconductor device is disclosed. In one embodiment a semiconductor device includes a semiconductor chip including a substrate, a ground terminal configured to be provided with a reference potential and a supply terminal electrically coupled to the substrate, the supply terminal configured to be provided with a load current and configured to be provided with a supply voltage between the substrate and the ground terminal. ... Infineon Technologies Ag

04/02/15 / #20150091668

System and method for a radio frequency coupler

In accordance with an embodiment, a directional coupler includes a coupler circuit and at least one amplifier coupled between a coupler circuit isolated port and a directional coupler isolated port and/or between a coupler circuit coupled port and a directional coupler coupled port. In various embodiments, the directional coupler is disposed over and/or in a substrate.. ... Infineon Technologies Ag

04/02/15 / #20150091663

System and method for a voltage controlled oscillator

In accordance with an embodiment, a voltage controlled oscillator (vco) includes a vco core having a plurality of transistors, a bias resistor coupled between collector terminals of the vco core and a first supply node, and a varactor circuit coupled to emitter terminals of the vco core. The bias resistor is configured to limit a self-bias condition of the vco core.. ... Infineon Technologies Ag

04/02/15 / #20150091595

Touchdown monitoring for individual dies of a semiconductor wafer

A prober system comprises a chuck, sensor and processing circuit. The chuck is configured to horizontally move a semiconductor wafer having a plurality of dies to position a selected group of the dies for parallel testing and vertically move the wafer to press the selected group of dies in contact with probes of a tester probe card. ... Infineon Technologies Ag

04/02/15 / #20150091551

Vertical shunt resistor

A measurement resistor for current measurement is described. According to one exemplary embodiment, the measurement resistor includes a first and a second metal layer, an electrically insulating interlayer and a resistive layer. ... Infineon Technologies Ag

04/02/15 / #20150091195

Method of packaging a die

A method of attaching a die to a substrate is disclosed. A major surface of the die has an array of electrical contacts, and is covered with a tape segment having an array of apertures in register with the contacts. ... Infineon Technologies Ag

04/02/15 / #20150091183

Arrangement and method for manufacturing the same

An arrangement is provided. The arrangement may include: a die including at least one electronic component and a first terminal on a first side of the die and a second terminal on a second side of the die opposite the first side, wherein the first side being the main processing side of the die, and the die further including at least a third terminal on the second side; a first electrically conductive structure providing current flow from the third terminal on second side of the die to the first side through the die; a second electrically conductive structure on the first side of the die laterally coupling the second terminal with the first electrically conductive structure; and an encapsulation material disposed at least over the first side of the die covering the first terminal and the second electrically conductive structure.. ... Infineon Technologies Ag

04/02/15 / #20150091171

Metal redistribution layer for molded substrates

Integrated circuits are packaged by placing a plurality of semiconductor dies on a support substrate, each one of the semiconductor dies having a plurality of terminals at a side facing the support substrate and covering the semiconductor dies with a molding compound to form a molded structure. The support substrate is then removed from the molded structure to expose the side of the semiconductor dies with the terminals, and a metal redistribution layer is formed on the molded structure and in direct contact with the terminals of the semiconductor dies and the molding compound. ... Infineon Technologies Ag

04/02/15 / #20150091148

Explosion-protected semiconductor module

A semiconductor module has a carrier, a semiconductor chip mounted on the carrier, a bond wire, a module housing, and a first sound absorber. The module housing has a housing side wall. ... Infineon Technologies Ag

04/02/15 / #20150091109

Magnetic shielding of perpendicular stt-mram

A memory having an array of perpendicular spin-transfer torque (stt) magnetic random access memory (mram) cells, wherein each cell has a magnetic layer stack. A magnetic shield disposed between the cells and having a minimum height of at least the height of the magnetic layer stacks.. ... Infineon Technologies Ag

04/02/15 / #20150091088

Integrated circuit and method of manufacturing an integrated circuit

An integrated circuit includes a transistor in a semiconductor substrate having a main surface. The transistor includes a source region, a drain region, a channel region, a drift zone, a gate electrode, and a gate dielectric adjacent to the gate electrode. ... Infineon Technologies Ag

04/02/15 / #20150091053

Igbt with reduced feedback capacitance

An igbt includes at least one first type transistor cell, including a base region, a first emitter region, a body region, and a second emitter region. The body region is arranged between the first emitter region and the base region. ... Infineon Technologies Ag

04/02/15 / #20150091052

Semiconductor device and method for forming a semiconductor device

A semiconductor device includes an insulated gate bipolar transistor (igbt) arrangement. The igbt arrangement includes a first configuration region of emitter-side insulated gate bipolar transistor structures and a second configuration region of emitter-side insulated gate bipolar transistor structures. ... Infineon Technologies Ag

04/02/15 / #20150091051

Semiconductor device and method for forming a semiconductor device

A semiconductor device includes an insulated gate bipolar transistor (igbt) arrangement. The igbt arrangement includes a carrier confinement reduction region laterally arranged between a cell region and a sensitive region. ... Infineon Technologies Ag

04/02/15 / #20150090798

Electronic document with two antennas

In various embodiments, a circuit arrangement is provided, including a first antenna tuned to a first frequency range, a second antenna tuned to a second frequency range being different from the first frequency range, a controller coupled to the first antenna and the second antenna, wherein the controller is configured to receive its operational power via at least one of the first antenna and the second antenna, and a deactivating structure configured to deactivate the communication of the controller via the second antenna upon reception of electromagnetic waves with the first frequency range via the first antenna.. . ... Infineon Technologies Ag

04/02/15 / #20150090043

Mems

Embodiments provide a mems including a mems device and an detector circuit. The mems device includes a membrane, wherein a material of the membrane comprises a band gap and a crystal structure with structural elements (unit cells) connected by covalent bonds in two dimensions only. ... Infineon Technologies Ag

04/02/15 / #20150090042

Pressure sensor package with integrated sealing

A pressure sensor package includes a lead and a semiconductor die spaced apart from the lead and including a terminal and a diaphragm disposed at a first side of the die. The die is configured to change an electrical parameter responsive to a pressure difference across the diaphragm. ... Infineon Technologies Ag

04/02/15 / #20150090030

Transducer arrangement comprising a transducer die and method of covering a transducer die

According to an exemplary aspect a transducer arrangement comprising a supporting structure; a transducer die arranged on the supporting structure; and a lid comprising a porous material connected to the supporting structure and arranged to at least partially cover the transducer die.. . ... Infineon Technologies Ag

03/26/15 / #20150089333

Circuit arrangement and method for realizing check bit compacting for cross parity codes

A circuit arrangement for determining m check bits c1, . . ... Infineon Technologies Ag

03/26/15 / #20150089175

Bus system and method of protected memory access

A bus system includes a functional unit to which a unit identifier is assigned, a memory module for storage of data that has a storage region, and a bus. The functional unit is connected to the memory module via the bus. ... Infineon Technologies Ag

03/26/15 / #20150087145

Chip comprising an integrated circuit, fabrication method and method for locally rendering a carbonic layer conductive

A chip includes an integrated circuit and a carbonic layer. The carbonic layer includes a graphite-like carbon, wherein a lateral conducting path through the graphite-like carbon electrically connects two circuit elements of the integrated circuit.. ... Infineon Technologies Ag

03/26/15 / #20150087131

Method for processing a chip

A method for processing a chip is provided. The method may include: providing a chip having a front side and a back side; and forming an orientation marker on the back side of the chip by forming a hole into the chip from the front side of the chip, the hole forming the orientation marker.. ... Infineon Technologies Ag

03/26/15 / #20150086809

Integrated circuit structure and a battery structure

According to various embodiments, an integrated circuit structure may include: an electronic circuit being arranged on a surface of a carrier, and a solid state electrolyte battery being at least partially arranged within the carrier, wherein at least a part of the solid state electrolyte battery being arranged within the carrier is overlapping with the electronic circuit along a direction parallel to the surface of the carrier.. . ... Infineon Technologies Ag

03/26/15 / #20150086064

Sound processing

Embodiments of the present invention provide a socket that comprises a socket body. The socket body forms a socket cavity for receiving a plug. ... Infineon Technologies Ag

03/26/15 / #20150085446

Substrate, chip arrangement, and method for manufacturing the same

In various embodiments, a substrate is provided. The substrate may include: a ceramic carrier having a first side and a second side opposite the first side; a first metal layer disposed over the first side of the ceramic carrier; a second metal layer disposed over the second side of the ceramic carrier; and a cooling structure formed into or over the second metal layer.. ... Infineon Technologies Ag

03/26/15 / #20150084659

Contact arrangements and methods for detecting incorrect mechanical contacting of contact structures

A contact arrangement is provided, including a contact structure and a sense structure. The sense structure may be arranged in proximity of the contact structure. ... Infineon Technologies Ag

03/26/15 / #20150084618

Electronic circuit and method for measuring a load current

An electronic circuit is described comprising a load, a power supply node, a first transistor coupled between the supply node and the load such that the input at a control terminal of the first transistor controls current flow from the supply node to the load through the first transistor, a current source, a second transistor coupled between the current source and the load such that the input at a control terminal of the second transistor controls current flow from the current source to the load through the second transistor, a control node coupled to the control terminal of the first transistor and the control terminal of the second transistor and a measuring circuit connected to the point of coupling between the current source and the second transistor configured to measure the difference between the current provided by the current source and the current consumed by the second transistor.. . ... Infineon Technologies Ag

03/26/15 / #20150084196

Devices formed with dual damascene process

Structures and methods of forming metallization layers on a semiconductor component are disclosed. The method includes etching a metal line trench using a metal line mask, and etching a via trench using a via mask after etching the metal line trench. ... Infineon Technologies Ag

03/26/15 / #20150084157

Electronic structure, a battery structure, and a method for manufacturing an electronic structure

According to various embodiments, an electronic structure may be provided, the electronic structure may include: a semiconductor carrier, and a battery structure monolithically integrated with the semiconductor carrier, the battery structure including a plurality of thin film batteries.. . ... Infineon Technologies Ag

03/19/15 / #20150081940

Enhanced serial interface systems and methods having a higher throughput

An enhanced serial interface system is disclosed. The system includes a master component and a slave component. ... Infineon Technologies Ag

03/19/15 / #20150081599

Method, apparatus and computer program product for determining failure regions of an electrical device

One or more failure regions are determined for an electrical device by training a machine learning classifier, including analyzing data points for the device and recognizing patterns in the data points. Each data point indicates pass or fail of the device for a particular combination of factors relating to the operation of the device. ... Infineon Technologies Ag

03/19/15 / #20150079749

Termination arrangement for vertical mosfet

Representative implementations of devices and techniques provide a termination arrangement for a transistor structure. The periphery of a transistor structure may include a recessed area having features arranged to improve performance of the transistor at or near breakdown.. ... Infineon Technologies Ag

03/19/15 / #20150078587

Adjustable ventilation openings in mems structures

A mems structure and a method for operation a mems structure are disclosed. In accordance with an embodiment of the present invention, a mems structure comprises a substrate, a backplate, and a membrane comprising a first region and a second region, wherein the first region is configured to sense a signal and the second region is configured to adjust a threshold frequency from a first value to a second value, and wherein the backplate and the membrane are mechanically connected to the substrate.. ... Infineon Technologies Ag

03/19/15 / #20150077542

Adaptive distance estimation

Representative implementations of devices and techniques provide adaptive distance estimation for imaging devices and systems. Distance estimation may be based on phase delays in reflected light. ... Infineon Technologies Ag

03/19/15 / #20150077151

Apparatus and method for testing electric conductors

A testing device for testing electric conductors includes a probe configured to measure a magnetic field caused by a current in one or more electric conductors of a device under testing (dut). An output generator configured to generate output data, wherein the output data depend on the measured magnetic field.. ... Infineon Technologies Ag

03/19/15 / #20150077081

System and method for a switch driver

In accordance with an embodiment, switch driver includes a first switch driver configured to be coupled to a control node of a first switch, a second driver configured to be coupled to a control node of a second switch, and a first terminal and a second terminal configured to be couple to a boot capacitor. The first terminal is coupled between a boot input of the first switch driver and the second terminal is configured to be coupled to outputs of the first switch and the second switch. ... Infineon Technologies Ag

03/19/15 / #20150076672

Method of manufacturing a chip package, chip package, method of manufacturing a chip assembly and chip assembly

A method of manufacturing a chip package is provided. The method may include electrically contacting at least one first chip, the first chip including a first side and a second side opposite the first side, with its second side to an electrically conductive carrier. ... Infineon Technologies Ag

03/19/15 / #20150076650

Semiconductor device and a method for forming a semiconductor device

A semiconductor device includes a semiconductor substrate. The semiconductor substrate includes a first doping region arranged at a main surface of the semiconductor substrate, an emitter layer arranged at a back side surface of the semiconductor substrate, at least one first conductivity type area separated from the first doping region by a second doping region of the semiconductor substrate and at least one temperature-stabilizing resistance area. ... Infineon Technologies Ag

03/19/15 / #20150076636

Current sensor device

A current sensor device for sensing a measuring current includes a semiconductor chip having a magnetic field sensitive element. The current sensor device further includes an encapsulant embedding the semiconductor chip. ... Infineon Technologies Ag

03/19/15 / #20150076597

Semiconductor component having a passivation layer and production method

A semiconductor component and a method for producing a semiconductor component are described. The semiconductor component includes a semiconductor body including an inner zone and an edge zone, and a passivation layer, which is arranged at least on a surface of the semiconductor body adjoining the edge zone. ... Infineon Technologies Ag

03/19/15 / #20150076591

Semiconductor device and method of manufacturing the same

A semiconductor device includes a semiconductor body having a first surface and a second surface opposite to the first surface. The semiconductor device further includes first and second trenches extending from the first surface into the semiconductor body. ... Infineon Technologies Ag

03/19/15 / #20150076590

Semiconductor device, integrated circuit and method of manufacturing a semiconductor device

A semiconductor device includes a transistor in a semiconductor substrate having a first main surface. The transistor includes a source region, a drain region, a channel region, a drift zone, and a gate electrode adjacent to at least two sides of the channel region. ... Infineon Technologies Ag

03/19/15 / #20150076568

Junction field effect transistor with vertical pn junction

An embodiment relates to a jfet with a channel region and a gate region forming a pn junction. Between a source region and a drain region in a semiconductor portion, the pn junction extends along a vertical direction perpendicular to a first surface of the semiconductor portion. ... Infineon Technologies Ag

03/19/15 / #20150076554

Insulated gate bipolar transistor with mesa sections between cell trench structures and method of manufacturing

An igbt includes a mesa section that extends between two cell trench structures from a first surface of a semiconductor portion to a layer section of the semiconductor portion. A source region, which is electrically connected to an emitter electrode, is formed in the mesa section. ... Infineon Technologies Ag

03/19/15 / #20150075990

Ion pump

A membrane structure is provided. The membrane structure may include: a membrane; at least one hole extending into the membrane configured to receive a fluid. ... Infineon Technologies Ag

03/12/15 / #20150074422

Electronic circuit and method for monitoring a data processing

According to one embodiment, an electronic circuit is described comprising a processing circuit configured to perform a data processing including a plurality of successive operations, wherein in at least some of the plurality of operations, a predetermined input value is processed; a check value memory; a controller configured to check, for each operation of the data processing performed by the processing circuit, whether the predetermined input value is processed in the operation, and, if the predetermined input value is processed in the operation, combine the predetermined input value to the content of the check value memory and a detector configured to check, when the processing is complete, whether the content of the check value memory is equal to a predetermined value.. . ... Infineon Technologies Ag

03/12/15 / #20150071369

Sensor systems and methods utilizing band pass filter tuning

A communication system having a configurable bandpass filter is disclosed. The system includes a bandpass filter and a bandpass controller. ... Infineon Technologies Ag

03/12/15 / #20150070060

Multi-output phase detector

Representative implementations of devices and techniques provide a multi-bit binary representation of a phase difference between two signals. The multi-bit binary representation may include information regarding a sign of the phase difference and a magnitude of the phase difference.. ... Infineon Technologies Ag

03/12/15 / #20150070042

Systems and methods for internal and external error detection in sensor output interfaces

Integrated circuit systems, such as sensor systems, having on-board-diagnostic (obd) circuits for the detection of errors presenting internal to the systems are disclosed, along with related methods. In one embodiment, an adc multiplexer receives analog output readback from an output driver and provides a signal triggering an obd circuit for internal error indication performed completely independent of digital-to-analog converters (dac) and output drivers, which can be the point of failure.. ... Infineon Technologies Ag

03/12/15 / #20150070009

Electronic device comprising hall effect region with three contacts

An electronic device is disclosed as a part of a magnetic field sensor or a mechanical stress sensor. The electronic device includes a hall effect region, a first contact (temporarily functioning as a first supply contact), a second contact (second supply contact), and a third contact (temporarily functioning as a first sense contact) that are arranged in or on a surface of the hall effect region. ... Infineon Technologies Ag

03/12/15 / #20150070008

Magnetic field sensors and systems with sensor circuit portions having different bias voltages and frequency ranges

Embodiments relate to hall effect sensor circuits and devices that provide improved performance, such as reduced residual offset errors and/or improved s/n ratios. In an embodiment, a hall effect sensor circuit comprises two circuit portions, a first with a higher bandwidth for higher frequencies and having an improved s/n ratio, and a second with a lower bandwidth for lower frequencies and having low residual offset. ... Infineon Technologies Ag

03/12/15 / #20150069591

Method for manufacturing a semiconductor device, and semiconductor device

According to various embodiments, a method for manufacturing a semiconductor device may include providing a semiconductor workpiece including a device region at a first side of the semiconductor workpiece, wherein a mechanical stability of the semiconductor workpiece is insufficient to resist at least one back end process without damage, and depositing at least one conductive layer over a second side of the semiconductor workpiece opposite the first side of the semiconductor workpiece, wherein the at least one conductive layer increases the mechanical stability of the semiconductor workpiece to be sufficient to resist the at least one back end process without damage.. . ... Infineon Technologies Ag

03/12/15 / #20150069576

Semiconductor device and method for manufacturing a semiconductor device

A method includes providing a semiconductor wafer including multiple semiconductor chips, forming a first scribe line on a frontside of the semiconductor wafer, wherein the first scribe line has a first width and separates semiconductor chips of the semiconductor wafer, forming a second scribe line on the frontside of the semiconductor wafer, wherein the second scribe line has a second width and separates semiconductor chips of the semiconductor wafer, wherein the first scribe line and the second scribe line intersect in a crossing area which is greater than a product of the first width and the second width, and plasma etching the semiconductor wafer in the crossing area.. . ... Infineon Technologies Ag

03/12/15 / #20150069424

Semiconductor component and method of triggering avalanche breakdown

A semiconductor component includes an auxiliary semiconductor device configured to emit radiation. The semiconductor component further includes a semiconductor device. ... Infineon Technologies Ag

03/12/15 / #20150069411

Semiconductor device, junction field effect transistor and vertical field effect transistor

A semiconductor device according to an embodiment is at least partially arranged in or on a substrate and includes a recess forming a mesa, wherein the mesa extends along a direction into the substrate to a bottom plane of the recess and includes a semiconducting material of a first conductivity type, the semiconducting material of the mesa including at least locally a first doping concentration not extending further into the substrate than the bottom plane. The semiconductor device further includes an electrically conductive structure arranged at least partially along a sidewall of the mesa, the electrically conductive structure forming a schottky or schottky-like electrical contact with the semiconducting material of the mesa, wherein the substrate comprises the semiconducting material of the first conductivity type comprising at least locally a second doping concentration different from the first doping concentration along a projection of the mesa into the substrate.. ... Infineon Technologies Ag

03/12/15 / #20150069394

Semiconductor device and method for manufacturing a semiconductor device

A device includes a semiconductor chip. An outline of a frontside of the semiconductor chip includes at least one of a polygonal line including two line segments joined together at an inner angle of greater than 90° and an arc-shaped line.. ... Infineon Technologies Ag

03/12/15 / #20150069132

Smart card module arrangement, smart card, method for producing a smart card module arrangement and method for producing a smart card

A method for producing a smart card module arrangement includes: arranging a smart card module on a first carrier layer, wherein the first carrier layer is free of a prefabricated smart card module receptacle cutout for receiving the smart card module. The smart card module includes: a substrate; a chip on the substrate; a first mechanical reinforcement structure between the chip and the substrate. ... Infineon Technologies Ag

03/12/15 / #20150068918

Wafer contacting device, and arrangement and method for electrochemical etching of a wafer

A wafer contacting device may include: a receiving region configured to receive a wafer; and an elastically deformable carrier disposed in the receiving region and including an electrically conductive surface region.. . ... Infineon Technologies Ag

03/05/15 / #20150067447

Method, apparatus and device for data processing

. . An embodiment relates to a method for data processing that includes reading data, the data comprising overhead information and payload information, and determining a state of each portion of the data, wherein the state is one of a first binary state, a second binary state, and an undefined state. The method also includes decoding at least one portion of data that has an undefined state based on its location and based on the overhead information.. ... Infineon Technologies Ag

03/05/15 / #20150067012

Method and data processing device for reconstructing a vector

A method for reconstructing a first vector from a second vector includes: storing code for the row vectors according to a first code and a second code; correcting the row vectors of the second vector corresponding to the first vector so that the row vectors of the second vector have the same code as the row vectors of the first vector; calculating the code of the column vectors of the second vector according to the second code; comparing the code of the row vectors of the second vector with the code of the column vectors of the first vector; identifying the columns in which the first vector is unequal to the second vector; the rows in which the first vector is unequal to the second vector; and the components in which the first vector is not equal to the second vector, and correcting the components of the second vector.. . ... Infineon Technologies Ag

03/05/15 / #20150066592

Methods of semiconductor manufacturing and supply chain management systems

In various embodiments, a method of semiconductor manufacturing is provided. The method may include: gathering information impacting production of semiconductor goods via a computer network platform; gathering information from a social networking platform via an interface of the computer network platform to the social networking platform; modelling at least one agent of a manufacturing entity in carrying out its tasks to manufacture semiconductor goods; and determining manufacturing capacity of the manufacturing entity as a function of at least the gathered information impacting the production of semiconductor goods, the gathered information from the social networking platform and the modelled agent.. ... Infineon Technologies Ag

03/05/15 / #20150065071

Mixing stage, modulator circuit and a current control circuit

A mixing stage includes a first modulation stage that receives an input signal from a first common node of the mixing stage, a first local oscillator input that receives a local oscillator signal, and a first modulation signal output adapted to provide a first modulated signal. A second modulation stage of the mixing stage includes a second input that receives a phase inverted representation of the input signal from a second common node of the mixing stage, a second local oscillator input that receives the local oscillator signal, and a second modulation signal output adapted to provide a second modulated signal. ... Infineon Technologies Ag

03/05/15 / #20150064890

Method for producing a semiconductor

A method for producing a semiconductor is disclosed, the method having: providing a semiconductor body having a first side and a second side; forming an n-doped zone in the semiconductor body by a first implantation into the semiconductor body via the first side to a first depth location of the semiconductor body; and forming a p-doped zone in the semiconductor body by a second implantation into the semiconductor body via the second side to a second depth location of the semiconductor body, a pn-junction forming between said n-doped zone and said p-doped zone in the semiconductor body.. . ... Infineon Technologies Ag

03/05/15 / #20150064879

Separation of chips on a substrate

Various methods and apparatuses are provided relating to separation of a substrate into a plurality of parts. For example, first a partial separation is performed and then the partially separated substrate is completely separated into a plurality of parts.. ... Infineon Technologies Ag

03/05/15 / #20150064877

Methods for processing a semiconductor wafer

A method for processing a semiconductor wafer in accordance with various embodiments may include: providing a semiconductor wafer including at least one chip and at least one kerf region adjacent to the at least one chip, the kerf region including at least one auxiliary structure; applying a mask layer to the semiconductor wafer; removing the at least one auxiliary structure in the at least one kerf region; removing the applied mask layer; and separating the semiconductor wafer along the at least one kerf region.. . ... Infineon Technologies Ag

03/05/15 / #20150064849

Lead frame strips with electrical isolation of die paddles

A lead frame strip includes connected unit lead frames each having a die paddle, a tie bar directly connecting the die paddle to a periphery of the unit lead frame, leads directly connected to the periphery of the unit lead frame and projecting toward the die paddle, and an opening in the periphery adjacent the tie bar. The openings in the periphery of the unit lead frames are spanned with an electrically insulating material that connects the tie bar of each unit lead frame to the periphery of the unit lead frame. ... Infineon Technologies Ag

03/05/15 / #20150064846

Semiconductor device

A number of semiconductor chips each include a first main face and a second main face opposite to the first main face. A first encapsulation layer is applied over the second main faces of the semiconductor chips. ... Infineon Technologies Ag

03/05/15 / #20150064844

Multichip power semiconductor device

An electronic device includes a first chip carrier and a second chip carrier isolated from the first chip carrier. A first power semiconductor chip is mounted on and electrically connected to the first chip carrier. ... Infineon Technologies Ag

03/05/15 / #20150063969

Method and apparatus for dynamic alignment of semiconductor devices

A semiconductor device is aligned by placing the semiconductor device in a nest between first and second sections of the nest when the nest is in a receiving position in which the first and second sections are spaced further apart from one another than when the nest is in an aligning position. The nest is moved from the receiving position to the aligning position with the semiconductor device in the nest so that the first and second sections are spaced closer to one another and align the semiconductor device in the nest. ... Infineon Technologies Ag

03/05/15 / #20150062825

Overmolded substrate-chip arrangement with heat sink

An electronic device comprises a substrate, at least one electronic chip mounted on and electrically connected to the substrate and being configured as a system control unit for controlling a connected system, a heat removal structure thermally connected to the at least one electronic chip and configured for removing heat generated by the at least one electronic chip upon operation of the electronic device, and an overmolding structure configured for at least partially encapsulating at least the at least one electronic chip and the substrate.. . ... Infineon Technologies Ag

03/05/15 / #20150061912

Analog-to-digital converter and control circuit with a low quiescent current at low load

A circuit contains a successive approximation register and an adjustable capacitor with a set input for adjusting a capacitance value of the adjustable capacitor. Moreover, it comprises a comparator having an input coupled to a terminal of the adjustable capacitor, and with an at least one output, wherein at least one of the outputs of the comparator is coupled to an input of the successive approximation register. ... Infineon Technologies Ag

03/05/15 / #20150061662

Current sensor

Embodiments of the disclosure provide a current sensor including a conductive element and at least two magnetic field sensors. The conductive element includes at least three separate terminal areas, a common conductive area and at least three separate intermediate areas connecting the respective separate terminal areas to the common conductive area. ... Infineon Technologies Ag

03/05/15 / #20150061661

Low offset vertical hall device and current spinning method

One embodiment of the present invention relates to a vertical hall-effect device. The device includes at least two supply terminals arranged to supply electrical energy to the first hall-effect region; and at least one hall signal terminal arranged to provide a first hall signal from the first hall-effect region. ... Infineon Technologies Ag

03/05/15 / #20150061658

Xmr angle sensors

Embodiments relate to xmr sensors, in particular amr and/or tmr angle sensors with an angle range of 360 degrees. In embodiments, amr angle sensors with a range of 360 degrees combine conventional, highly accurate amr angle structures with structures in which an amr layer is continuously magnetically biased by an exchange bias coupling effect. ... Infineon Technologies Ag

03/05/15 / #20150061382

Charging a capacitor

In one example, a method comprises alternately switching on a first switch connected in series with a capacitor and connected in parallel with a first capacitive element, and a second switch connected in series with the capacitor and connected in parallel with a second capacitive element. Aeries circuit with the first switch, the capacitor and the second switch may be coupled to supply nodes for receiving a supply voltage.. ... Infineon Technologies Ag

03/05/15 / #20150061144

Semiconductor arrangement, method for producing a semiconductor module, method for producing a semiconductor arrangement and method for operating a semiconductor arrangement

A semiconductor arrangement includes upper and lower contact plates and basic chip assemblies. Each chip assembly has a semiconductor chip having a semiconductor body with upper and lower spaced apart sides. ... Infineon Technologies Ag

03/05/15 / #20150061140

Molded semiconductor package with pluggable lead

A semiconductor package includes a semiconductor die having a plurality of terminals, a molding compound encapsulating the semiconductor die, and a pluggable lead dimensioned for insertion into an external receptacle. The pluggable lead protrudes from the molding compound and provides a separate electrical pathway for more than one terminal of the semiconductor die. ... Infineon Technologies Ag

03/05/15 / #20150061113

Semiconductor dies having opposing sides with different reflectivity

A method of processing semiconductor dies is provided. Each semiconductor die has a first side with one or more terminals, a second side opposite the first side and sidewalls extending between the first and the second sides. ... Infineon Technologies Ag

03/05/15 / #20150061108

Packaged semiconductor device

A packaged semiconductor device includes a semiconductor component, first and second heat dissipation means disposed between the semiconductor component and the first and second main faces, respectively, encapsulated by an encapsulant, the shape of the packaged semiconductor device being non-rectangular cuboid.. . ... Infineon Technologies Ag

03/05/15 / #20150061100

Semiconductor arrangement, method for producing a number of chip assemblies, method for producing a semiconductor arrangement and method for operating a semiconductor arrangement

A semiconductor arrangement includes top and bottom contact plates, a plurality of chip assemblies, a dielectric embedding compound, and a control electrode interconnection structure. Each chip assembly has a semiconductor chip having a semiconductor body. ... Infineon Technologies Ag

03/05/15 / #20150061096

Semiconductor package with multi-level die block

A semiconductor package includes a block having a first side, a second side opposite the first side and a recessed region extending from the second side toward the first side so that the block has a thinner part in the recessed region and a thicker part outside the recessed region. The semiconductor package further includes a first semiconductor die and a second semiconductor die each having opposing first and second sides. ... Infineon Technologies Ag

03/05/15 / #20150061091

Functionalised redistribution layer

An electronic device which comprises at least one interconnect, a semiconductor chip comprising at least one electric chip pad, an encapsulant structure packaging at least a part of the semiconductor chip, and an electrically conductive redistribution layer arranged between and electrically coupled with the at least one interconnect and the at least one chip pad, wherein the redistribution layer comprises at least one adjustment structure configured for adjusting radio frequency properties of a transition between the semiconductor chip and its periphery.. . ... Infineon Technologies Ag

03/05/15 / #20150061089

Vertical semiconductor device and method of manufacturing thereof

A vertical semiconductor device has a semiconductor body with a first surface and a second surface substantially parallel to the first surface. A first metallization is arranged on the first surface. ... Infineon Technologies Ag

03/05/15 / #20150061048

Packaged mems device

A packaged mems device may include an embedding arrangement, a mems device disposed in the embedding arrangement, a sound port disposed in the embedding arrangement and acoustically coupled to the mems device, and a grille within the sound port. Some embodiments relate to a sound transducer component including an embedding material and a substrate-stripped mems die embedded into the embedding material. ... Infineon Technologies Ag

03/05/15 / #20150061045

Mems device

A mems device includes a first chip and a mems chip. The first chip has a mounting surface and includes at least an integrated circuit. ... Infineon Technologies Ag

03/05/15 / #20150061003

Power semiconductor package

A power semiconductor package includes a housing, a semiconductor chip embedded in the housing, and at least four terminals partially embedded in the housing and partially exposed to the outside of the housing. The semiconductor chip includes a first doping region in ohmic contact with a first metal layer, a second doping region in ohmic contact with a second metal layer, and a plurality of first trenches that includes gate electrodes and first field electrodes electrically insulated from the gate electrodes. ... Infineon Technologies Ag

03/05/15 / #20150060878

Semiconductor packages having multiple lead frames and methods of formation thereof

In accordance with an embodiment of the present invention, a semiconductor package includes a first lead frame having a first die paddle, and a second lead frame, which has a second die paddle and a plurality of leads. The second die paddle is disposed over the first die paddle. ... Infineon Technologies Ag

02/26/15 / #20150057806

Driver circuit for driving electromagnetic actuators

Techniques for driving a plurality of inductive actuators are described herein. According to these techniques, a driver unit includes a clock terminal that receives an external clock signal used by an external control unit. ... Infineon Technologies Ag

02/26/15 / #20150056788

Semiconductor device with a passivation layer

A semiconductor device includes a semiconductor body with a first surface, a contact electrode arranged on the first surface, and a passivation layer on the first surface adjacent the contact electrode. The passivation layer includes a layer stack with an amorphous semi-insulating layer on the first surface, a first nitride layer on the amorphous semi-insulating layer, and a second nitride layer on the first nitride layer.. ... Infineon Technologies Ag

02/26/15 / #20150055795

Microphone, a microphone arrangement and a method for processing signals in a microphone

A microphone includes a first signal input, a second signal input and a control unit coupled to the first signal input and the second signal input. The control unit is configured to, upon receiving a support signal at one of the first signal input and second signal input, process a signal received at the other of the first signal input and second signal input as an incoming data signal.. ... Infineon Technologies Ag

02/26/15 / #20150055377

Techniques to reduce audible noise in a power supply transformer

This disclosure relates to a switching power supply with regulated voltage suppression to reduce transformer audio noise. The switching power supply is operable to be fed a zero crossing voltage and to generate an output voltage. ... Infineon Technologies Ag

02/26/15 / #20150054175

Semiconductor device and method for making same

One or more embodiments relate to a semiconductor device that includes: a conductive layer including a sidewall; a conductive capping layer disposed over the conductive layer and laterally extending beyond the sidewall of the conductive layer by a lateral overhang; and a conductive via in electrical contact with the conductive capping layer.. . ... Infineon Technologies Ag

02/26/15 / #20150054166

Semiconductor arrangement, method for producing a number of chip assemblies and method for producing a semiconductor arrangement

A semiconductor arrangement includes a plurality of chip assemblies, each of which includes a semiconductor chip having a semiconductor body with a top side and an underside, a top main electrode arranged on the top side, a bottom main electrode arranged on the underside, an electrically conductive top compensation lamina arranged on a side of the top main electrode facing away from the semiconductor body and cohesively and electrically conductively connected to the top main electrode, an electrically conductive bottom compensation lamina arranged on a side of the bottom main electrode facing away from the semiconductor body and cohesively and electrically conductively connected to the bottom main electrode, and a dielectric embedding compound enclosing the semiconductor chip laterally circumferentially in a ring-shaped fashion such that the side of the compensation laminae facing away from the semiconductor body are at least not completely covered by the embedding compound.. . ... Infineon Technologies Ag

02/26/15 / #20150054159

Semiconductor module and a method for fabrication thereof by extended embedding technologies

The semiconductor module includes a carrier, a plurality of semiconductor transistor chips disposed on the carrier, a plurality of semiconductor diode chips disposed on the carrier, an encapsulation layer disposed above the semiconductor transistor chips and the semiconductor diode chips, and a metallization layer disposed above the encapsulation layer. The metallization layer includes a plurality of metallic areas forming electrical connections between selected ones of the semiconductor transistor chips and the semiconductor diode chips.. ... Infineon Technologies Ag

02/26/15 / #20150054102

Method for applying magnetic shielding layer, method for manufacturing a die, die and system

A method for applying a magnetic shielding layer to a substrate is provided, wherein a first magnetic shielding layer is adhered to a first surface of the substrate. A first film layer is adhered to the first magnetic shielding layer and the first magnetic shielding layer is more adherent to the first surface than the film layer to the first magnetic shielding layer.. ... Infineon Technologies Ag

02/26/15 / #20150054097

Method for manufacturing a mems device and mems device

A method for manufacturing a mems device includes providing a cavity within a layer adjacent to a sacrificial layer. The cavity extends to the sacrificial layer and includes a capillary slot protruding into the layer. ... Infineon Technologies Ag

02/26/15 / #20150054026

Inhomogeneous power semiconductor devices

A power semiconductor device includes a power transistor including a plurality of transistor cells on a semiconductor die. At least some of the transistor cells are inhomogeneous by design so that the number of current filaments in the transistor cells with reduced local current density increases and fewer transient avalanche oscillations occur in the power transistor during operation.. ... Infineon Technologies Ag

02/26/15 / #20150053772

Chip arrangement, analysis apparatus, receiving container, and receiving container system

In various embodiments, a chip arrangement includes a first chip having a first antenna which is monolithically integrated in the first chip and is intended to communicate with at least one of an external reader or an external writer; a second chip having a second antenna which is monolithically integrated in the second chip and is intended to communicate with the at least one of the external reader or the external writer; and a booster antenna which is coupled to the first antenna in a first coupling area in order to increase a range of the first antenna and is coupled to the second antenna in a second coupling area in order to increase a range of the second antenna.. . ... Infineon Technologies Ag

02/26/15 / #20150053764

Rfid apparatus, rfid reader, portion hot-drinks machine and system

In various embodiments, a radio frequency identification apparatus includes a coupling body having a metal material and a transponder chip configured to contactlessly transmit data. The transponder chip is physically coupled to the coupling body, has a storage element which stores the data, and has a first electrode which is at a distance from the coupling body. ... Infineon Technologies Ag

02/19/15 / #20150052387

Systems and methods utilizing a flexible read reference for a dynamic read window

A memory system having a flexible read reference is disclosed. The system includes a memory partition, a failcount component, and a controller. ... Infineon Technologies Ag

02/19/15 / #20150051796

Crash detection

An implementation determines crash severity quantifier values based on crash sensor samples and determining an air bag firing based at least on the crash severity quantifier values.. . ... Infineon Technologies Ag

02/19/15 / #20150049560

Circuit arrangement and method for operating a circuit arrangement

A circuit arrangement comprising a plurality of electronic components; a plurality of first access lines and second access lines, wherein each electronic component is coupled with at least one first access line and second access lines, the second access lines comprising at least two bit-lines; an access controller controlling access to at least one of the electronic components via the at least one first access line and the second access lines; and a first group of switches, wherein each switch comprises at least one control terminal and at least two controlled terminals. Each switch of the first group is connected to one of the at least two bit-lines via its control terminal and in a path between one first access line and a sense amplifier via its controlled terminals, and adjacent switches are connected via their control terminals to different bit-lines of the at least two bit-lines.. ... Infineon Technologies Ag

02/19/15 / #20150049443

Chip arrangement

According to various embodiments, a chip arrangement may be provided, the chip arrangement may include: a first carrier; at least one chip arranged over the first carrier; a flexible structure including a wiring layer structure; and a contact structure arranged between the first carrier and the wiring layer structure, wherein the at least one chip is electrically coupled to the first carrier via the wiring layer structure and the contact structure.. . ... Infineon Technologies Ag

02/19/15 / #20150049168

Dynamic adjustment of imaging parameters

Representative implementations of devices and techniques provide adjustable parameters for imaging devices and systems. Dynamic adjustments to one or more parameters of an imaging component may be performed based on changes to the relative velocity of the imaging component or to the proximity of an object to the imaging component.. ... Infineon Technologies Ag

02/19/15 / #20150048958

Signal converter and method for operating a signal converter

In accordance with an embodiment, a method for operating a signal converter includes converting an analog input signal to a digital output signal, comprising by comparing the analog input signal to an analog comparison signal, and detecting whether the analog input signal exceeds a predetermined maximum or minimum threshold by comparing the analog input signal to an analog threshold signal. The analog comparison signal and the analog threshold signal are generated by a same digital-to-analog converter.. ... Infineon Technologies Ag

02/19/15 / #20150048492

Pcb based rf-power package window frame

A semiconductor package includes a baseplate having a die attach region and a peripheral region, a transistor die having a first terminal attached to the die attach region, and a second terminal and a third terminal facing away from the baseplate, and a frame including an electrically insulative member having a first side attached to the peripheral region of the baseplate, a second side facing away from the baseplate, a first metallization at the first side of the insulative member and a second metallization at the second side of the insulative member. The insulative member extends outward beyond a lateral sidewall of the baseplate. ... Infineon Technologies Ag

02/12/15 / #20150046718

Determining an identifier

A method for determining an identifier on the basis of a multiplicity of cells is proposed, wherein the cells are subdivided into subsets, wherein the fact of whether a reconstructable information item is determinable is ascertained for each of the subsets, wherein, if a reconstructable information item is determinable for a subset, the reconstructable information item is determined and stored, wherein, if a reconstructable information item is not determinable for a subset, an error information item is determined and stored for this subset.. . ... Infineon Technologies Ag

02/12/15 / #20150044856

Method of separating semiconductor die using material modification

A method for separating semiconductor die includes forming a porous region on a semiconductor wafer and separating the die at the porous region using mechanical or other means.. . ... Infineon Technologies Ag

02/12/15 / #20150043688

Method, apparatus and system to communicate with a device

Described herein are implementations relating to a method for an apparatus to communicate with a device. One embodiment includes transmitting a clock signal to the device, receiving from the device, an asynchronous signal, and extracting information from the asynchronous signal based on the clock signal. ... Infineon Technologies Ag

02/12/15 / #20150043169

Electronic module and method of manufacturing the same

According to an exemplary aspect an electronic module is provided, wherein the electronic module comprises an electronic chip comprising at least one electronic component, a spacing element comprising a main surface arranged on the electronic chip and being in thermally conductive connection with the at least one electronic component, and a mold compound at least partially enclosing the electronic chip and the spacing element, wherein the spacing element comprises a lateral surface which is in contact to the mould compound and comprises surface structures.. . ... Infineon Technologies Ag

02/12/15 / #20150042496

Methods and devices for analog-to-digital conversion

Analog-to-digital converter arrangements and corresponding methods are provided, wherein a reduction signal is subtracted from an analog input signal if a signal level of the input signal exceeds a threshold value.. . ... Infineon Technologies Ag

02/12/15 / #20150042384

Packaged power transistors and power packages

A power package is provided comprising a packaged transistor and a driving unit connected to the transistor and adapted to drive the transistor. A control terminal of the transistor is connected to a middle terminal pin of the housing of the transistor and outer terminal pins of the housing are connected to the driving unit and to a voltage level, respectively, wherein the connections are crossing free.. ... Infineon Technologies Ag

02/12/15 / #20150041993

Method for manufacturing a chip arrangement, and a chip arrangement

A method for manufacturing a chip arrangement may include: disposing a stabilizing structure and a chip including at least one contact next to each other and over a carrier; encapsulating the chip and the stabilizing structure by means of an encapsulating structure; and forming an electrically conductive connection to the at least one contact of the chip.. . ... Infineon Technologies Ag

02/12/15 / #20150041967

Molded semiconductor package with backside die metallization

A semiconductor package is manufactured by providing a semiconductor die with a terminal at a first side of the die, providing a material coupled to the die at an opposing second side of the die and embedding the die in a molding compound so that the die is covered by the molding compound on all sides except the first side. The molding compound is thinned at a side of the molding compound adjacent the second side of the die, to expose the material at the second side of the die without exposing the second side of the die. ... Infineon Technologies Ag

02/12/15 / #20150041963

Semiconductor device having a surface with ripples

According to one embodiment of a semiconductor device, the semiconductor device includes a semiconductor substrate having a first surface, an insulation layer having a laterally varying thickness on the first surface, and a metal layer on the first surface. The insulation layer has ripples in its surface facing the metal layer. ... Infineon Technologies Ag

02/12/15 / #20150041962

Semiconductor device with cell trench structures and contacts and method of manufacturing a semiconductor device

First and second cell trench structures extend from a first surface into a semiconductor substrate. The first cell trench structure includes a first buried electrode and a first insulator layer between the first buried electrode and a semiconductor mesa separating the first and second cell trench structures. ... Infineon Technologies Ag

02/12/15 / #20150041949

Shallow trench isolation area having buried capacitor

A semiconductor chip includes a substrate including a surface, an active transistor region and a substrate contact region formed on the substrate, a shallow trench isolation (sti) area formed in the surface and disposed at least partially between the active transistor region and the substrate contact region, and at least one capacitor at least partially buried in the sti area.. . ... Infineon Technologies Ag

02/12/15 / #20150041946

Edge termination structure with trench isolation regions

A semiconductor device includes a semiconductor body and an edge termination structure. The edge termination structure comprises a first oxide layer, a second oxide layer, a semiconductor mesa region between the first oxide layer and the second oxide layer, and a doped field region comprising a first section in the semiconductor mesa region, and a second section in a region below the semiconductor mesa region. ... Infineon Technologies Ag

02/12/15 / #20150041859

Redistribution board, electronic component and module

A redistribution board includes a first conductive layer including a redistribution structure for low voltage signals, a second conductive layer including a redistribution structure for high voltage signals, and a non-conductive layer. The second conductive layer is spaced apart from the first conductive layer by the non-conductive layer. ... Infineon Technologies Ag

02/12/15 / #20150041816

Semiconductor device and method for producing same

The disclosure relates to a semiconductor device including a semiconductor body, having a first surface, a gate electrode structure, which includes polycrystalline silicon, of an igfet in a first trench extending from the first surface into the semiconductor body. The device also includes a semiconductor element, which is different from the gate electrode structure of the igfet and includes polycrystalline silicon, in a second trench extending from the first surface into the semiconductor body, wherein the polycrystalline silicon of the igfet and of the semiconductor element different therefrom ends below a top side of an insulation layer adjoining the first surface of the semiconductor body.. ... Infineon Technologies Ag

02/12/15 / #20150040677

Circuits, methods, and computer programs to detect mechanical stress and to monitor a system

Embodiments provide a circuit, a method, and a computer program configured to detect mechanical stress and a circuit, a method, and a computer program configured to monitor safety of a system. The detection circuit is configured to detect mechanical stress of a semiconductor circuit. ... Infineon Technologies Ag

02/05/15 / #20150039976

Efficient error correction of multi-bit errors

A circuitry for error correction includes a plurality of subcircuits for determining intermediate values zw0, zw1, zw2, zw3 to be used as coefficients in an error correction expression (z1i, z2i, . . ... Infineon Technologies Ag

02/05/15 / #20150039952

Circuit arrangement and method with modified error syndrome for error detection of permanent errors in memories

A circuit arrangement for detecting memory errors is provided. The circuit arrangement comprises a memory (11) and an error detection circuit (12). ... Infineon Technologies Ag

02/05/15 / #20150039949

Drive train control

Various techniques relating to drive train control are disclosed. In an embodiment, in a first mode of operation communication between a controller and a submodule of the drive train takes place via a first communication channel and optionally additionally via a second communication channel. ... Infineon Technologies Ag

02/05/15 / #20150039944

System and method of high integrity dma operation

A system and method for direct memory access (dma) operation provides for receiving dma requestors, assigning the received dma requestors to one or more of a plurality of dma engines for processing the received dma requestors, and if one of the received dma requestors is a safety requestor, assigning the safety requestor to at least two dma engines of the plurality of dma engines for processing the safety requestor, disabling a bus interface for coupling at least one dma engine of the at least two dma engines to memories, comparing the outputs of the at least two dma engines, and generating an error message if the comparison of the outputs of the at least two dma engines are different from each other.. . ... Infineon Technologies Ag

02/05/15 / #20150039805

System and method to emulate an electrically erasable programmable read-only memory

The disclosure relates to an electronic memory system, and more specifically, to a system to emulate an electrically erasable programmable read-only memory, and a method to emulate an electrically erasable programmable read-only memory. According to an embodiment of the disclosure, a system to emulate an electrically erasable programmable read-only memory is provided, the system including a first memory section and a second memory section, wherein the first memory section comprises a plurality of storage locations configured to store data partitioned into a plurality of data segments and wherein the second memory section is configured to store information mapping a physical address of a data segment stored in the first memory section to a logical address of the data segment.. ... Infineon Technologies Ag

02/05/15 / #20150039801

Lin bus module

One aspect of the invention relates to a network node for connecting to a local interconnect network (lin). In accordance with one example of the present invention, the network node includes a bus terminal which is operably coupled to a data line for receiving a data signal, which represents serial data, via that data line. ... Infineon Technologies Ag

02/05/15 / #20150037964

Method for manufacturing a marked single-crystalline substrate and semiconductor device with marking

A method for manufacturing a marked single-crystalline substrate comprises providing a single-crystalline substrate comprising a first material, the single-crystalline substrate having a surface area; forming a marking structure on the surface area of the single-crystalline substrate, wherein the marking structure comprises a first semiconductor material; and depositing a semiconductor layer on the marking structure and at least partially on the surface area of the single-crystalline substrate, wherein the semiconductor layer comprises the second semiconductor material, and wherein the marking structure is buried under the second semiconductor material.. . ... Infineon Technologies Ag

02/05/15 / #20150037685

Battery cell and method for making battery cell

Embodiments provide a battery cell including a porous membrane, the porous membrane including transformed semiconductor material. The porous membrane separates a first half-cell from a second half-cell of the battery cell. ... Infineon Technologies Ag

02/05/15 / #20150035572

Circuit arrangement

In accordance with one embodiment, a circuit arrangement is provided including a circuit having a first terminal for a first supply potential and a second terminal for a second supply potential, wherein the first terminal is coupled to the first supply potential; a switch, by means of which the second terminal can be coupled to the second supply potential; a voltage source coupled to the second terminal; and a control device designed to open the switch in reaction to receiving a turn-off signal in an operating mode in which the switch is closed, and subsequently to control the voltage source in such a way that it varies the potential of the second terminal in the direction of the first supply potential.. . ... Infineon Technologies Ag

02/05/15 / #20150035556

Crack sensors for semiconductor devices

Crack sensors for semiconductor devices, semiconductor devices, methods of manufacturing semiconductor devices, and methods of testing semiconductor devices are disclosed. In one embodiment, a crack sensor includes a conductive structure disposed proximate a perimeter of an integrated circuit. ... Infineon Technologies Ag

02/05/15 / #20150035385

Circuitry and method for operating an electronic switch

A circuit includes an electronic switch with an isolated gate, a measuring device for determining a charge at the isolated gate, and an energy supply for providing charge to the isolated gate based on the charge determined by the measuring device.. . ... Infineon Technologies Ag

02/05/15 / #20150035171

Segmented bond pads and methods of fabrication thereof

In accordance with an embodiment of the present invention, a semiconductor device includes a first bond pad disposed at a first side of a substrate. The first bond pad includes a first plurality of pad segments. ... Infineon Technologies Ag

02/05/15 / #20150035170

Multichip device including a substrate

A device includes a substrate including an electrically insulating core, a first electrically conductive material arranged over a first main surface of the substrate, and a second electrically conductive material arranged over a second main surface of the substrate opposite to the first main surface. The device further includes an electrically conductive connection extending from the first main surface to the second main surface and electrically coupling the first electrically conductive material and the second electrically conductive material, a first semiconductor chip arranged over the first main surface and electrically coupled to the first electrically conductive material, and a second semiconductor chip arranged over the second main surface and electrically coupled to the second electrically conductive material.. ... Infineon Technologies Ag

01/29/15 / #20150033085

Systems and methods for storing information

Embodiments relate to multi-contact sensor devices and operating methods thereof that can reduce or eliminate offset error. In embodiments, sensor devices can comprise three or more contacts, and multiple such sensor devices can be combined. ... Infineon Technologies Ag

01/29/15 / #20150033052

Wakeup receiver circuit, electronic system and method to wake up a device

A device is operated in a low power mode of operation. The device receives a differential signal that includes a first polarity signal and a second polarity signal. ... Infineon Technologies Ag

01/29/15 / #20150032992

Data processing arrangement and method for data processing

A processing arrangement having a first processing component and a second processing component is provided. The first component has a first output memory and a second output memory and a control device using the first memory storing a value to be output and the second memory stores a value that is based according to a prescribed function on the value. ... Infineon Technologies Ag

01/29/15 / #20150032914

System and method for direct memory access transfers

A system and method for transferring data between a memory and peripheral units via a plurality of direct memory access (dma) transactions, wherein a respective timestamp is assigned and/or appended to at least two of the plurality of the dma transactions.. . ... Infineon Technologies Ag

01/29/15 / #20150032787

Apparatus and method for detecting integrity violation

An apparatus for detecting integrity violation includes a feedback shift register including a plurality of registers connected in series, and a feedback function unit connected between an output of a number of the registers and an input of at least one of the registers. The apparatus further includes an integrity violation detector adapted to determine as to whether a sequence of values at an input or output of at least one of the registers, or a logic combination thereof, is a non-constant sequence or a constant sequence. ... Infineon Technologies Ag

01/29/15 / #20150031203

Method for processing a workpiece

A method for processing a workpiece may include: providing a workpiece including a first region and a second region; forming a porous metal layer over the first region and the second region; wherein the first region and the second region are configured such that an adhesive force between the second region and the porous metal layer is lower than an adhesive force between the first region and the porous metal layer.. . ... Infineon Technologies Ag

01/29/15 / #20150030051

Thermal observer and overload protection for power switches

The present disclosure proposes the placing of temperature sensors embedded in the power semiconductor device. In this, at least one of the embedded temperature sensors is placed within or close to the heat source, active areas or channels of the power semiconductor circuit, and at least one of the embedded temperature sensors is placed more apart from the heat source, active areas or channels of the power semiconductor circuit. ... Infineon Technologies Ag

01/29/15 / #20150029807

Memory device and method for putting a memory cell into a state with a reduced leakage current consumption

In various embodiments, a memory device includes at least one memory cell and at least one virtual supply line coupled to the at least one memory cell. The memory device is designed in such a way that a voltage potential present on the virtual supply line is altered after an active access to the memory cell by virtue of a charge stored within the memory device during the active access being re-stored in such a way that a state of the memory cell with a reduced leakage current consumption is achieved.. ... Infineon Technologies Ag

01/29/15 / #20150028917

Semiconductor component and an operating method for a protective circuit against light attacks

A semiconductor component includes a semiconductor substrate, and a doped well having a well terminal and a transistor structure having at least one potential terminal formed in the semiconductor substrate. The transistor structure has a parasitic thyristor, and is at least partly arranged in the doped well. ... Infineon Technologies Ag

01/29/15 / #20150028836

System and method for a converter circuit

In accordance with an embodiment, a circuit includes a switch coupled between a first reference terminal and a first output terminal, an inductive element coupled between an input terminal and a second output terminal, and a diode coupled between the first output terminal and the input terminal. The circuit further includes a controller coupled to a control terminal of the switch. ... Infineon Technologies Ag

01/29/15 / #20150028817

Battery control with block selection

A battery block is equipped with a plurality of battery blocks. Each of the battery blocks includes at least one battery cell to provide a block voltage of the battery block. ... Infineon Technologies Ag

01/29/15 / #20150028487

Chip package with passives

A chip package device includes an electrically conducting chip carrier, at least one semiconductor chip attached to the electrically conducting chip carrier, and an insulating laminate structure embedding the chip carrier, the at least one semiconductor chip and a passive electronic device. The passive electronic device includes a first structured electrically conducting layer, the first structured electrically conducting layer extending over a surface of the laminate structure.. ... Infineon Technologies Ag

01/29/15 / #20150028463

Integrated passives package, semiconductor module and method of manufacturing

An integrated passives package includes an encapsulation compound and a plurality of electrically conductive pads embedded in the encapsulation compound. Each of the pads has opposing first and second sides. ... Infineon Technologies Ag

01/29/15 / #20150028461

Conductive pads and methods of formation thereof

In one embodiment, a device includes a first conductive pad disposed over a substrate, and a etch stop layer disposed over a top surface of the first conductive pad. The device further includes a solder barrier disposed over the etch stop layer.. ... Infineon Technologies Ag

01/29/15 / #20150028456

Semiconductor device, a semiconductor wafer structure, and a method for forming a semiconductor wafer structure

Embodiments relate to a semiconductor device, a semiconductor wafer structure, and a method for manufacturing or forming a semiconductor wafer structure. The semiconductor device includes a semiconductor substrate with a first region having a first conductivity type and a second region having a second conductivity type. ... Infineon Technologies Ag

01/29/15 / #20150028448

Chip package with embedded passive component

A chip package includes an electrically conducting chip carrier and at least one first semiconductor chip attached to the electrically conducting chip carrier. The chip package further includes a passive component. ... Infineon Technologies Ag

01/29/15 / #20150028436

Apparatus comprising and a method for manufacturing an embedded mems device

A system and a method for forming a packaged mems device are disclosed. In one embodiment a packaged mems device includes a mems device having a first main surface with a first area along a first direction and a second direction, a membrane disposed on the first main surface of the mems device and a backplate adjacent to the membrane. ... Infineon Technologies Ag

01/29/15 / #20150028435

Method of packaging integrated circuits and a molded package

A method of packaging integrated circuits includes providing a molded substrate that has a plurality of first semiconductor dies and a plurality of second semiconductor dies laterally spaced apart from one another and covered by a molding compound. The molding compound is thinned to expose at least some of the second semiconductor dies. ... Infineon Technologies Ag

01/29/15 / #20150028416

Semiconductor component with dynamic behavior

One embodiment provides a semiconductor component including a semiconductor body having a first side and a second side and a drift zone; a first semiconductor zone doped complementarily to the drift zone and adjacent to the drift zone in a direction of the first side; a second semiconductor zone of the same conduction type as the drift zone adjacent to the drift zone in a direction of the second side; at least two trenches arranged in the semiconductor body and extending into the semiconductor body and arranged at a distance from one another; and a field electrode arranged in the at least two trenches adjacent to the drift zone. The at least two trenches are arranged at a distance from the second semiconductor zone in the vertical direction, a distance between the trenches and the second semiconductor zone is greater than 1.5 times the mutual distance between the trenches, and a doping concentration of the drift zone in a section between the trenches and the second semiconductor zone differs by at most 35% from a minimum doping concentration in a section between the trenches.. ... Infineon Technologies Ag

01/29/15 / #20150028408

Integrated circuit and method of manufacturing an integrated circuit

An integrated circuit is formed in a semiconductor substrate. The integrated circuit includes a trench formed in a first main surface of the semiconductor substrate. ... Infineon Technologies Ag

01/29/15 / #20150028383

Power mos transistor with integrated gate-resistor

A transistor device comprises: at least one individual transistor cell arranged in a transistor cell field on a semiconductor body, each individual transistor cell comprising a gate electrode; a gate contact, electrically coupled to the gate electrodes of the transistor cells and configured to switch on the at least one transistor cell by providing a gate current in a first direction and configured to switch off the at least one transistor cell by providing a gate current in a second direction, the second direction being opposite to the first direction; at least one gate-resistor structure monolithically integrated in the transistor device, the gate-resistor structure providing a first resistance for the gate current when the gate current flows in the first direction, and providing a second resistance for the gate current, which is different from the first resistance, when the gate current flows in the second direction.. . ... Infineon Technologies Ag

01/29/15 / #20150028337

Monitoring and controlling temperatures in a semiconductor structure

An electronic device includes a semiconductor structure. A first temperature sensor is located at a hot spot of the semiconductor structure and a second temperature sensor is located at a cold spot of the semiconductor structure. ... Infineon Technologies Ag

01/22/15 / #20150026420

Memory access using address bit permutation

An apparatus including a memory having an array of blocks addressable using address bits; and a permutation circuit coupled to the memory and configured to permutate the address bits such that during a memory access blocks of data are rearranged virtually.. . ... Infineon Technologies Ag

01/22/15 / #20150025850

Sensor with interface for functional safety

A sensor interface operates to communicate a sensed quantity along one or more processing pathways and in different data representations. The signal representations can be swapped along one or more locations of the signal processing branches. ... Infineon Technologies Ag

01/22/15 / #20150024807

Surface mountable microphone package, a microphone arrangement, a mobile phone and a method for recording microphone signals

A surface mountable microphone package includes a first microphone and a second microphone. Furthermore, the surface mountable microphone package includes a first opening for the first microphone and a second opening for the second microphone. ... Infineon Technologies Ag

01/22/15 / #20150024591

On-chip rf shields with backside redistribution lines

Structures of a system on chip and methods of forming a system on chip are disclosed. In one embodiment, a method of fabricating the system on chip includes forming a through substrate opening from a back surface of a substrate, the through substrate opening disposed between a first and a second region, the first region comprising devices for rf circuitry and the second region comprising devices for other circuitry. ... Infineon Technologies Ag

01/22/15 / #20150024554

Chip to package interface

In accordance with an embodiment of the present invention, a semiconductor package includes a semiconductor chip disposed within an encapsulant, and a first coil disposed in the semiconductor chip. A dielectric layer is disposed above the encapsulant and the semiconductor chip. ... Infineon Technologies Ag

01/22/15 / #20150024536

Mems device and method of manufacturing a mems device

Mems devices with a rigid backplate and a method of making a mems device with a rigid backplate are disclosed. In one embodiment, a device includes a substrate and a backplate supported by the substrate. ... Infineon Technologies Ag

01/22/15 / #20150023529

Mems devices, interface circuits, and methods of making thereof

In accordance with an embodiment of the present invention, a micro-electro-mechanical system (mems) device includes a first plate, a second plate disposed over the first plate, and a first moveable plate disposed between the first plate and the second plate. The mems device further includes a second moveable plate disposed between the first moveable plate and the second plate.. ... Infineon Technologies Ag

01/22/15 / #20150023523

Surface mountable microphone package, a microphone arrangement, a mobile phone and a method for recording microphone signals

A surface mountable microphone package comprises a first microphone and a second microphone. Furthermore, the surface mountable microphone package comprises a first opening for the first microphone and a second opening for the second microphone. ... Infineon Technologies Ag

01/22/15 / #20150022924

Circuitry and method for monitoring a power supply of an electronic device

The disclosure relates to a circuitry including a first contact connected to a power supply, a first compare unit connected to the first contact and to a first reference signal, wherein the first compare unit is configured to compare a voltage at the first contact with the first reference signal and provide a first output signal for further processing.. . ... Infineon Technologies Ag

01/22/15 / #20150022310

Fuse arrangement and a method for manufacturing a fuse arrangement

A fuse arrangement, including: at least a first terminal, a second terminal, and a fuse, wherein the first terminal and the second terminal may be electrically connected via the fuse, and wherein the fuse may be configured to be under fuse internal mechanical stress to deform the fuse along its width direction in case it is broken.. . ... Infineon Technologies Ag

01/22/15 / #20150022192

Discrete magnetic angle sensor device, a magnetic angle sensor arrangement, a method for generating an angle signal and a method for providing a sensor signal

A discrete magnetic angle sensor device according to an embodiment includes a first magnetic field gradiometer and a second magnetic field gradiometer. The first magnetic field gradiometer and the second magnetic field gradiometer are of different types of a group of gradiometer types. ... Infineon Technologies Ag

01/22/15 / #20150022191

Differential perpendicular on-axis angle sensor

Embodiments relate to magnetic field angle sensors, such as on-axis magnetic field angle sensors. In an embodiment, a magnetic field angle sensor comprises a magnet having an axis of rotation, and a substrate arranged in-line with the axis of rotation. ... Infineon Technologies Ag

01/22/15 / #20150022186

Angle sensors, systems and methods

Embodiments relate to magnetic field angle sensors, including off-axis and on-axis sensors. In an embodiment, a magnetic field angle sensor comprises two sensor units, and each sensor unit comprises two sensor elements. ... Infineon Technologies Ag

01/22/15 / #20150021792

Electronic device and method for fabricating an electronic device

An embodiment method for fabricating electronic devices having two components connected by a metal layer includes applying a metal layer to each component and connecting the metal layers such that a single metal layer is formed.. . ... Infineon Technologies Ag

01/22/15 / #20150021722

Mems device

A mems device includes a membrane comprising a first plurality of fingers. A counter electrode arrangement includes a second plurality of fingers disposed in a interdigitated relationship with the first plurality of fingers of the membrane. ... Infineon Technologies Ag

01/22/15 / #20150021296

Methods for etching a workpiece, an apparatus configured to etch a workpiece, and a non-transitory computer readable medium

A method for etching a workpiece may be provided, which may include: determining a plurality of reference etch profiles for a plurality of positions of an etchant dispenser, each reference etch profile corresponding to a respective position of the plurality of positions of the etchant dispenser; determining a thickness profile of the workpiece; determining a respective etch duration for each position of the plurality of positions of the etchant dispenser based on the determined thickness profile and the plurality of reference etch profiles, to reduce a total thickness variation of the workpiece; and dispensing an etchant over the workpiece via the etchant dispenser for the determined respective etch duration for each position of the plurality of positions.. . ... Infineon Technologies Ag

01/15/15 / #20150019878

Apparatus and method for memory address encryption

An apparatus for encrypting an input memory address to obtain an encrypted memory address is provided. The apparatus comprises an input interface for receiving the input memory address being an address of a memory. ... Infineon Technologies Ag

01/15/15 / #20150019165

Weight detection by tire pressure sensing

A system includes a set of tire pressure sensors for tires of a vehicle, a control module and a user interface. The control module is configured to receive tire pressure information from the tire pressure sensors and calculate a weight or a change in weight of the vehicle based on the tire pressure information. ... Infineon Technologies Ag

01/15/15 / #20150019152

Error compensation in an angle sensor

Embodiments provide a method for determining sine or cosine correction values for an error compensation in an angle sensor. At least three pairs of values for at least three rotation angle values of an angle sensor are detected. ... Infineon Technologies Ag

01/15/15 / #20150017801

Semiconductor structure and method for making same

One or more embodiments relate to a method for making a semiconductor structure, comprising: providing a substrate; forming a dielectric layer over the substrate; forming a first opening and a second opening at least partially simultaneously through the dielectric layer over the substrate; and forming a third opening through the bottom surface of the first opening and into at least a portion of the substrate.. . ... Infineon Technologies Ag

01/15/15 / #20150016636

System and method for a microphone amplifier

In accordance with an embodiment, a two-wire microphone includes an integrated circuit. The integrated circuit includes an amplifier having a power supply connection coupled to a first pin of the integrated circuit and a reference connection coupled to a second pin of the integrated circuit, and an impedance element having a first end coupled to an output of the amplifier and a second end coupled to a first node within the integrated circuit.. ... Infineon Technologies Ag

01/15/15 / #20150015431

System and method for a radio frequency system

In accordance with an embodiment, a method includes producing a baseband variable frequency signal and producing a substantially fixed frequency signal by phase-locking an oscillator to a substantially fixed reference frequency. The method further includes upconverting the baseband variable frequency signal by mixing the variable frequency signal with the substantially fixed frequency signal to produce an rf variable frequency signal.. ... Infineon Technologies Ag

01/15/15 / #20150015324

Circuitry, multi-branch charge pump, method for controlling a charge pump and system

One example refers to a circuitry comprising a first charge pump stage controlled by a first control signal, a second charge pump stage controlled by a second control signal, wherein the first charge pump stage and the second charge pump stage are arranged subsequently to each other and comprising a control unit for providing the first control signal and the second control signal, wherein the control unit is arranged to set the second control signal to high when the first control signal is high. Also, a multi-branch charge pump, a method for controlling various charge pumps and a system for controlling various charge pumps are suggested.. ... Infineon Technologies Ag

01/15/15 / #20150015309

Electronic circuit with a reverse-conducting igbt and gate driver circuit

An electronic circuit includes a reverse-conducting igbt and a driver circuit. A first diode emitter efficiency of the reverse-conducting igbt at a first off-state gate voltage differs from a second diode emitter efficiency at a second off-state gate voltage. ... Infineon Technologies Ag

01/15/15 / #20150015308

Phase-locked loop (pll)-based frequency synthesizer

This disclosure describes techniques for generating signals that have relatively steep frequency profiles with a phase-locked loop (pll) circuit architecture. In some examples, the techniques for generating signals that have relatively steep frequency profiles may include modulating an amplitude of a forward path signal in a pll circuit at a location in a forward circuit path of the pll circuit based on a control signal. ... Infineon Technologies Ag

01/15/15 / #20150015281

Resistance measurement

This disclosure describes techniques for measuring the resistance of a component with measurement circuitry that is electrically coupled to the component via one or more electrical conductors (e.g., one or more bond wires). The resistance measurement techniques of this disclosure may measure a resistance of an electrical conductor, and generate a value indicative of a resistance of a component other than the electrical conductor based on the measured resistance of the electrical conductor. ... Infineon Technologies Ag

01/15/15 / #20150015249

Current sensor device

A current sensor device includes a casing having a cavity and a conductor fixedly mounted to the casing. A semiconductor chip configured to sense a magnetic field is arranged in the cavity. ... Infineon Technologies Ag

01/15/15 / #20150015217

Method for operating a power factor correction circuit

A method for operating a power factor correction circuit is provided which may include the steps of providing a plurality of n switched-mode converter circuits each comprising an nth inductor, where n is at least 2, starting a switching pulse for the nth switched-mode converter circuit when the following conditions are fulfilled: the nth inductor of the nth switched-mode converter circuit has a predefined magnetization state; and a predefined time period has elapsed since the start of a switching pulse for an mth switched-mode converter circuit, where m=n−1 in case n>1 and m=n in case n=1. The predefined time period is a predefined fraction of the time period from the start of a previous switching pulse for the nth switched-mode converter circuit to a time when the nth inductor of the nth switched-mode converter circuit has the predefined magnetization state.. ... Infineon Technologies Ag

01/15/15 / #20150014845

Semiconductor module with interlocked connection

A semiconductor package includes a support substrate having opposing first and second main surfaces and sides between the first and second main surfaces, a semiconductor die attached to one of the main surfaces of the support substrate, and an encapsulation material at least partly covering the support substrate and the semiconductor die. A protrusion extends outward from a side of the support substrate and terminates in the encapsulation material. ... Infineon Technologies Ag

01/15/15 / #20150014815

Semiconductor device and a method for manufacturing a semiconductor device having a semi-insulating region

A semiconductor device and a method for forming a semiconductor device are provided. The semiconductor device includes a semiconductor body including a diode-structure with a pn-junction, and an edge-termination structure arranged in a peripheral area of the semiconductor body. ... Infineon Technologies Ag

01/15/15 / #20150014796

Device with mems structure and ventilation path in support structure

A device includes a support structure, a sound port disposed in the support structure, and a mems structure including a membrane acoustically coupled to the sound port. The membrane separates a first space contacting a first side of the membrane from a second space contacting an opposite second side of the membrane. ... Infineon Technologies Ag

01/15/15 / #20150014704

Bipolar transistor and a method for manufacturing a bipolar transistor

A bipolar transistor includes a semiconductor structure including an emitter area, a base area and a collector area. The emitter area is electrically connected to an emitter contact of the bipolar transistor. ... Infineon Technologies Ag

01/08/15 / #20150012767

Sensor interface systems and methods

A sensor interface system includes a system bus, a bus master and a sensor. The bus master is coupled to the system bus. ... Infineon Technologies Ag

01/08/15 / #20150012678

Sensor systems and methods utilizing adaptively selected carrier frequencies

A sensor system utilizing adaptively selected carrier frequencies is disclosed. The system includes a system bus, a bus master, and a sensor. ... Infineon Technologies Ag

01/08/15 / #20150012238

Method and device for determining test sets of operating parameter values for an electronic component

A method for determining test sets of operating parameter values for an electronic component, the method including: determining a first set of intermediate sets, each intermediate set containing a combination of a first number of operating parameters of the electronic component; determining a second set of reference sets, wherein the second set contains a union of sets, each set comprising all possible combinations of parameter values for the parameters of a respective intermediate set; selecting a third set with a second number of test sets out of a set of predefined sets, wherein each predefined set comprises a different combination of the parameter values for all parameters from the predefined parameter set, such that the second set is a subset of a union of a number of sets, each set comprising all possible combinations of the first number of parameter values for all parameters of a respective test set.. . ... Infineon Technologies Ag

01/08/15 / #20150010041

Circuit arrangement

According to various embodiments, a circuit arrangement is provided which includes a bridge circuit having at least two field effect transistors and a measurement circuit configured to measure a forward voltage of a body diode of any one of the at least two field effect transistors resulting from a current flowing through the field effect transistor.. . ... Infineon Technologies Ag

01/08/15 / #20150009598

Method, device and circuitry for detecting a failure on a differential bus

An exemplary embodiment relates to a method for detecting a failure on a differential bus. The method may include: determining an allowed voltage range of the differential bus based on a minimum load and a maximum load; comparing a differential bus voltage with the allowed voltage range; and determining a failure state in case the differential bus voltage is outside the allowed voltage range.. ... Infineon Technologies Ag

01/08/15 / #20150009498

Apparatus for detecting a pre-aligning element at a wafer

An apparatus detects a pre-aligning element at a wafer. The wafer has the pre-aligning element at a wafer edge. ... Infineon Technologies Ag

01/08/15 / #20150009052

Built-in-self-test for an analog-to-digital converter

A semiconductor chip with a built-in-self-test circuit including a first analog-to-digital converter (adc) configured to convert an analog input voltage signal received at its input into a digital output voltage signal that characterizes the first adc; and a second adc coupled to the input of the first adc and configured to convert the analog input voltage signal received at its input to a digital feedback voltage signal, wherein the analog input voltage signal is generated based on the digital feedback signal.. . ... Infineon Technologies Ag

01/08/15 / #20150008972

Circuit comprising an accelerating element

A circuit includes a switching element with a first terminal, a second terminal and a control terminal. The circuit also includes an impedance network coupled between the control terminal and a switching node. ... Infineon Technologies Ag

01/08/15 / #20150008964

Test system for semiconductor array

In accordance with an embodiment, an integrated circuit includes a plurality of devices on the integrated circuit. Each device includes a driving circuit, an individual contact pad coupled to a first terminal of the driving circuit, and a switch having a first terminal coupled to the first terminal of the driving circuit. ... Infineon Technologies Ag

01/08/15 / #20150008893

Low drop-out voltage regulator

A system including a first transistor, a first capacitor and a circuit. The first transistor has a first control input and is configured to regulate an output voltage. ... Infineon Technologies Ag

01/08/15 / #20150008763

Electronic transmission element

According to an embodiment, an electronic transmission element is provided that has a first input and a first output. The first input is coupled to the first output by means of two first, parallel-connected complementary switches. ... Infineon Technologies Ag

01/08/15 / #20150008498

Semiconductor component arrangement comprising a trench transistor

A semiconductor component arrangement method includes producing a trench transistor structure including at least one trench disposed in the semiconductor body and at least one gate electrode disposed in the at least one trench. The method also includes producing a capacitor structure comprising an electrode structure disposed in at least one further trench, the electrode structure comprising at least one electrode. ... Infineon Technologies Ag

01/08/15 / #20150008447

Silicon carbide device and a method for manufacturing a silicon carbide device

A silicon carbide device includes an epitaxial silicon carbide layer having a first conductivity type and a buried lateral silicon carbide edge termination region within the epitaxial silicon carbide layer and having a second conductivity type. The buried lateral silicon carbide edge termination region is covered by a silicon carbide surface layer including a doping of ions of a transition metal or including an increased density of intrinsic point defects in comparison to a density of intrinsic point defects of the buried lateral silicon carbide edge termination region.. ... Infineon Technologies Ag

01/01/15 / #20150007002

Frequency signal generator, a frequency modulated continuous wave radar system and a method for generating a frequency signal

A frequency signal generator includes a controllable oscillator unit, a frequency control unit and an error detection unit. The controllable oscillator unit generates and provides a frequency signal. ... Infineon Technologies Ag

01/01/15 / #20150007001

Apparatus and method for error correction and error detection

A circuitry comprising a syndrome generator configured to generate a syndrome based on a parity check matrix and a binary word comprising a first set of bits and a second set of bits is provided. For the first set of bits an error correction of correctable bit errors within the first set is provided by the parity check matrix and for the second set of bits an error detection of a detectable bit errors within the second set is provided by the parity check matrix.. ... Infineon Technologies Ag

01/01/15 / #20150006096

System and method for estimating a periodic signal

In accordance with an embodiment, a method of reconstructing a periodic signal includes receiving random electronic samples of the periodic signal from a sensing circuit, sorting, by a processor, the electronic samples in a sequential order to form ordered samples, and estimating, by the processor, a shape of the periodic signal based on the ordered samples. . ... Infineon Technologies Ag

01/01/15 / #20150004451

Apparatus for determining a state of a rechargeable battery or of a battery, a rechargeable battery or a battery, and a method for determining a state of a rechargeable battery or of a battery

An apparatus for determining a state of a rechargeable battery or of a battery has a sensor device and an evaluation device. The sensor device brings about an interaction between an optical signal and a part of the rechargeable battery or of the battery, which part indicates optically acquirable information about a state of the rechargeable battery or of the battery, and detects an optical signal caused by the interaction. ... Infineon Technologies Ag

01/01/15 / #20150003659

Electronic device with large back volume for electromechanical transducer

An electronic device comprising a substrate, a cover delimiting at least a part of a main surface of the substrate to thereby form a cover-substrate arrangement enclosing a hollow space and having a through hole, an electroacoustic transducer configured for converting between an electric signal and an acoustic signal and being mounted on the substrate acoustically coupled with the hollow space in such a way that the hollow space constitutes a back volume of the electroacoustic transducer, wherein the electroacoustic transducer provides an acoustical coupling between the hollow space and an exterior of the cover-substrate arrangement via the through hole, an electronic chip mounted within the cover-substrate arrangement and electrically coupled with the electroacoustic transducer for communicating electric signals between the electronic chip and the electroacoustic transducer, and at least one electronic member mounted on the substrate within the cover-substrate arrangement and configured for providing an electronic function.. . ... Infineon Technologies Ag

01/01/15 / #20150002146

System and method for a transformer and a phase-shift network

In accordance with an embodiment, a circuit includes a magnetic transformer having a first winding coupled between a first signal node and a second signal node, and a second winding coupled between a first reference node and a current measurement node. A phase shift network is coupled between the second node and a voltage measurement node, and the circuit is configured to indicate an impedance matching condition based on an amplitude difference and a phase difference between the voltage measurement node and the current measurement node.. ... Infineon Technologies Ag

01/01/15 / #20150002145

Resistive element

A resistive element includes a resistive region in a semiconductor substrate, a first contact structure and a second contact structure. The semiconductor substrate includes a first main surface area. ... Infineon Technologies Ag

01/01/15 / #20150001719

Semiconductor device and method for producing the same

A power semiconductor device includes a semiconductor body, having an active zone and a high voltage peripheral zone laterally adjacent to each other, the high voltage peripheral zone laterally surrounding the active zone. The device further includes a metallization layer on a front surface of the semiconductor body and connected to the active zone, a first barrier layer, comprising a high-melting metal or a high-melting alloy, between the active zone and the metallization layer, and a second barrier layer covering at least a part of the peripheral zone, the second barrier layer comprising an amorphous semi-isolating material. ... Infineon Technologies Ag

01/01/15 / #20150001700

Power modules with parylene coating

A module includes a base plate, a substrate having a first metallized side attached to the base plate and an opposing second metallized side, a power semiconductor die attached to the second metallized side of the substrate at a first side of the die, a first plurality of electrical connections between the second metallized side of the substrate and a second side of the die opposing the first side of the die, and a housing attached to a periphery of the base plate. The housing and base plate enclose the die and the first electrical connections. ... Infineon Technologies Ag

01/01/15 / #20150001696

Semiconductor die carrier structure and method of manufacturing the same

Various embodiments provide a method of manufacturing a semiconductor die carrier structure. The method may include providing a die pad configured to carry a semiconductor die thereon; and bending at least one portion of the die pad, wherein the at least one bent portion extends across the die pad.. ... Infineon Technologies Ag

01/01/15 / #20150001652

Stress sensing devices and methods

Embodiments relate to stress sensors and methods of sensing stress. In an embodiment, a stress sensor comprises a vertical resistor. ... Infineon Technologies Ag

01/01/15 / #20150001647

Mems microphone with low pressure region between diaphragm and counter electrode

A mems microphone includes a first diaphragm element, a counter electrode element, and a low pressure region between the first diaphragm element and the counter electrode element. The low pressure region has a pressure less than an ambient pressure.. ... Infineon Technologies Ag

01/01/15 / #20150001646

Pre-mold for a microphone assembly and method of producing the same

A microphone assembly is provided, wherein the pre-mold comprises a bent leadframe and a mold body, wherein the mold body is mold to at least partially encapsulate the bent leadframe to build the pre-mold comprising a cavity for accommodating a microphone, and wherein the pre-mold comprises a through-hole transmissive for sound waves.. . ... Infineon Technologies Ag

01/01/15 / #20150001638

Silicided semiconductor structure and method of forming the same

A preferred embodiment includes a method of manufacturing a fuse element that includes forming a polysilicon layer over a semiconductor structure, doping the polysilicon layer with carbon or nitrogen, depositing a metal over the polysilicon layer; and annealing the metal and polysilicon layer to form a silicide in an upper portion of the polysilicon layer.. . ... Infineon Technologies Ag

01/01/15 / #20150000149

Alignment mark definer

An alignment mark definer is configured to provide a geometrical definition for an actual alignment structure to be formed at a temporary surface of a substrate based on a desired appearance of the alignment mark and on an expected alteration of an appearance of the actual alignment structure caused by a deposition material deposited on the temporary surface and the actual alignment structure.. . ... Infineon Technologies Ag








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