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Infineon Technologies Americas Corp patents


Recent patent applications related to Infineon Technologies Americas Corp. Infineon Technologies Americas Corp is listed as an Agent/Assignee. Note: Infineon Technologies Americas Corp may have other listings under different names/spellings. We're not affiliated with Infineon Technologies Americas Corp, we're just tracking patents.

ARCHIVE: New 2018 2017 2016 2015 2014 2013 2012 2011 2010 2009 | Company Directory "I" | Infineon Technologies Americas Corp-related inventors


Estimating rotor speed and rotor angle

In some examples, a controller device includes processing circuitry configured to determine an alpha voltage and a beta voltage based on time durations for control signals for power-conversion circuitry that drives an electric motor including a rotor. In some examples, the controller device also includes a flux estimator configured to estimate a speed of the rotor and an angle of the rotor based on the alpha voltage and the beta voltage.. ... Infineon Technologies Americas Corp

Controlled resistance integrated snubber for power switching device

A semiconductor substrate has a main surface, a rear surface, an active device region, and an inactive region adjacent the active device region. Doped source, body, drift and drain regions, and electrically conductive gate and field electrodes are disposed in the active device region. ... Infineon Technologies Americas Corp

Common contact semiconductor device package

A semiconductor device package includes a conductive clip that has a recess and that is configured to mount to a substrate along a first surface and a second surface that bound the recess, and that includes at least two vertical channel transistors that are of a same type and that are mounted within the recess in a same orientation such that a drain or source contact is coupled to the conductive clip, and such that a gate contact and a source or drain contact extend exposed within the recess and along a same long axis of the conductive clip.. . ... Infineon Technologies Americas Corp

Semiconductor component with protrusion propagation body and corresponding methods of manufacture

A semiconductor structure includes a substrate, a iii-nitride intermediate stack including the protrusion propagation body situated over the substrate, a transition body over the iii-nitride intermediate stack, a iii-nitride buffer layer situated over the transition body, and a iii-nitride device fabricated over the group iii-v buffer layer. The protrusion propagation body includes at least a protrusion generating layer and two or more protrusion spreading multilayers.. ... Infineon Technologies Americas Corp

Detection of rotor lock

In some examples, a controller device is configured to generate control signals for a power-conversion circuit that drives an electric motor including a rotor. In some examples, the controller device includes subtraction circuitry configured to generate an error signal based on a difference between an estimated angular velocity of the rotor and a target angular velocity for the rotor. ... Infineon Technologies Americas Corp

Active gate bias driver

A device is described that includes a gate driver configured to output, to a gate of a switch, a turn-on voltage for activating the switch in response to receiving an indication to activate the switch and an active gate bias driver configured to actively drive a voltage at the gate of the switch to a bias voltage in response to receiving an indication to deactivate the switch. The bias voltage is less than the turn-on voltage and wherein the bias voltage is greater than a ground voltage of the gate driver.. ... Infineon Technologies Americas Corp

Method and apparatus for control adaptation in resonant-tapped inductor converters

A semi-resonant voltage converter has a synchronous rectification (sr) switch through which a half-cycle sinusoidal-like current is conducted when turned on. An embodiment of a method of controlling operation of the semi-resonant voltage converter includes switching the sr switch and other switches of the semi-resonant voltage converter via a linear controller so as to supply output power to a load, the semi-resonant voltage converter having a dc gain that increases when load current increases, and scaling downward an output of the linear controller used to control the switching of the sr switch responsive to the load current exceeding a first threshold, so as to at least partly counteract an increase in the dc gain of the semi-resonant voltage converter. ... Infineon Technologies Americas Corp

Input/output pins for chip-embedded substrate

Input/output pins for a chip-embedded substrate may be fabricated by applying a contact-distinct volume of solder to at least two contacts that are recessed within the chip-embedded substrate, temperature-cycling the chip-embedded substrate to induce solder reflow and define an input/output pin for each one of the at least two contacts, and machining the input/output pin for each one of the at least two contacts to extend exposed from the chip-embedded substrate to a common height within specification tolerance. Such a technique represents a paradigm shift in that the manufacturer of the chip-embedded substrate, as opposed to the immediate customer of the manufacturer, may assume the burden of quality control with respect to minimizing unintended solder void trapping under the input/output pins, thereby reinforcing existing customer loyalty and potentially attracting new customers.. ... Infineon Technologies Americas Corp

Multi-phase power converter with common connections

In some examples, a device comprises at least two semiconductor die, wherein each respective semiconductor die of the at least two semiconductor die comprises at least two power transistors, an input node on a first side of the respective semiconductor die, a reference node on the first side of the respective semiconductor die, and a switch node on a second side of the respective semiconductor die. The device further comprises a first conductive element electrically connected to the respective input nodes of the at least two semiconductor die. ... Infineon Technologies Americas Corp

Common contact leadframe for multiphase applications

In some examples, a device includes an input leadframe segment and a reference leadframe segment that is electrically isolated from the input leadframe segment. The device further includes at least four transistors comprising at least two high-side transistors that are electrically connected to the input leadframe segment and at least two low-side transistors that are electrically connected to the reference leadframe segment. ... Infineon Technologies Americas Corp

Multi-phase common contact package

In some examples, a device includes a first leadframe segment and a second leadframe segment, wherein the second leadframe segment is electrically isolated from the first leadframe segment. The device further includes at least four transistors comprising at least two high-side transistors electrically connected to the first leadframe segment and at least two low-side transistors electrically connected to the second leadframe segment. ... Infineon Technologies Americas Corp

Group iii-v device structure with variable impurity concentration

A semiconductor structure includes a substrate, a transition body over the substrate, a group iii-v intermediate body having a bottom surface over the transition body and a group iii-v device layer over a top surface of the group iii-v intermediate body. The group iii-v intermediate body has a first impurity concentration at the bottom surface, a second impurity concentration at the top surface, and a variable impurity concentration that rises and falls between the bottom surface and the top surface. ... Infineon Technologies Americas Corp

Semiconductor device package having solder-mounted conductive clip on leadframe

A conductive clip for a semiconductor device package. In one example, the conductive clip may include a number of protrusions that extend from a surface of the conductive clip that in practice is solder-mounted to a leadframe of the semiconductor device package. ... Infineon Technologies Americas Corp

Semiconductor structure having graded transition bodies

A semiconductor structure includes a substrate, a first graded transition body over the substrate a second transition body and a iii-nitride semiconductor layer over the second transition body. The first graded transition body has a first lattice parameter at a first surface and a second lattice parameter at a second surface opposite the first surface. ... Infineon Technologies Americas Corp

03/15/18 / #20180076124

Electrical connectivity of die to a host substrate

According to example configurations herein, an apparatus comprises a die and a host substrate. The die can include a first transistor and a second transistor. ... Infineon Technologies Americas Corp

03/08/18 / #20180068934

Package for die-bridge capacitor

In some examples, a device comprises a first leadframe segment, a second leadframe segment, and a first transistor, wherein the first transistor is electrically connected to the first leadframe segment. The device further comprises a second transistor, wherein the second transistor is electrically connected to the second leadframe segment. ... Infineon Technologies Americas Corp

03/01/18 / #20180056734

Magnetic sensor used for lf communication in tpms application

A tire pressure monitoring system (tpms) sensor and a communication method are provided. The tpms sensor includes a microcontroller unit, a pressure sensor electrically connected to the microcontroller unit and configured to measure an internal air pressure of a tire and a receiver electrically connected to the microcontroller unit and configured to receive at least one communication signal. ... Infineon Technologies Americas Corp

02/22/18 / #20180054120

Power converter with at least five electrical connections on a side

In some examples, a device comprises an integrated circuit comprising a first transistor and a second transistor. The device further comprises an inductor comprising a first inductor terminal and a second inductor terminal, wherein the first inductor terminal is electrically connected to the first transistor and the second transistor. ... Infineon Technologies Americas Corp

02/22/18 / #20180054119

Powerstage attached to inductor

In some examples, a device comprises an inductor and a package comprising at least one power device. The package is attached to the inductor by an adhesion layer, and the inductor comprises one or more leads. ... Infineon Technologies Americas Corp

02/22/18 / #20180053755

Power switch packaging with pre-formed electrical connections for connecting inductor to one or more transistors

In some examples, device includes an integrated circuit (ic) inside a first insulating layer, an inductor, and a second insulating layer arranged between the first insulating layer and the inductor. The first insulating layer shares an interface with the second insulating layer, and the inductor is attached to the second insulating layer. ... Infineon Technologies Americas Corp

02/22/18 / #20180053722

Single-sided power device package

In some examples, a circuit package further includes an insulating layer and a first transistor extending through the insulating layer, where the first transistor includes a first control terminal on a top side of the insulating layer, a first source terminal on the top side of the insulating layer, and a first drain terminal on a bottom side of the insulating layer. The circuit package includes a second transistor extending through the insulating layer, where the second transistor includes a second control terminal on the top side of the insulating layer, a second source terminal on the bottom side of the insulating layer, and a second drain terminal on the top side of the insulating layer.. ... Infineon Technologies Americas Corp

01/18/18 / #20180019749

Cross-coupled, narrow pulse, high voltage level shifting circuit with voltage domain common mode rejection

A system for high voltage level shifting includes a level shifting circuit having a high side circuit that receives a mixed signal having a common mode signal and a differential mode signal, and to attenuate the common mode signal in the mixed signal to generate an adjusted signal. The high side circuit generates a high output signal at a high output node in response to the adjusted signal. ... Infineon Technologies Americas Corp

01/18/18 / #20180019204

Semiconductor devices and methods for forming a semiconductor device

A semiconductor device includes a crack propagation prevention structure. The crack propagation prevention structure is located at an edge region of a wiring layer stack located on a semiconductor substrate of the semiconductor device. ... Infineon Technologies Americas Corp

01/11/18 / #20180012983

Semiconductor device having a superjunction structure

A semiconductor device includes a drift region of a first conductivity type, an anode region of a second conductivity type situated below the drift region, an inversion region of the second conductivity type situated above the drift region, an enhancement region of the first conductivity type situated between the drift region and the inversion region, first and second control trenches extending through the inversion region and the enhancement region into the drift region, each control trench being bordered by a cathode diffusion region of the first conductivity type, and a superjunction structure situated in the drift region between the first and the second control trenches so that the superjunction structure does not extend under either the first or the second control trench. The superjunction structure is separated from the inversion region by the enhancement region and includes alternating regions of the first and the second conductivity types.. ... Infineon Technologies Americas Corp

01/11/18 / #20180012859

Semiconductor package with conductive clip

A semiconductor package that includes a conductive can, a power semiconductor device electrically and mechanically attached to the inside surface of the can, and an ic semiconductor device copackaged with the power semiconductor device inside the can.. . ... Infineon Technologies Americas Corp

12/21/17 / #20170366148

Compact chireix combiner and impedance matching circuit

A power amplifier includes an outphasing amplifier. The outphasing amplifier includes a first amplifier and a second amplifier, and is configured to provide a first amplified rf signal and a second amplified rf signal that is phase shifted from the first amplified rf signal. ... Infineon Technologies Americas Corp

12/21/17 / #20170365701

Charge trapping prevention iii-nitride transistor

There are disclosed herein various implementations of a charge trapping prevention iii-nitride transistor. Such a transistor may be a iii-nitride high electron mobility transistor (hemt) including a iii-nitride intermediate body situated over a substrate, a channel layer situated over the iii-nitride intermediate body, and a barrier layer situated over the channel layer. ... Infineon Technologies Americas Corp

12/21/17 / #20170365699

Low dislocation density iii-nitride semiconductor component

There are disclosed herein various implementations of a semiconductor component including a protrusion propagation body. The semiconductor component includes a substrate, a iii-nitride intermediate stack including the protrusion propagation body situated over the substrate, a iii-nitride buffer layer situated over the group iii-v intermediate stack, and a iii-nitride device fabricated over the group iii-v buffer layer. ... Infineon Technologies Americas Corp

12/21/17 / #20170365595

Schottky integrated high voltage terminations and related hvic applications

A schottky diode includes a cathode terminal in a high voltage region of a semiconductor die, an anode terminal in a low voltage region of the semiconductor die, where the anode terminal and the cathode terminal are separated by a junction isolation termination situated between the high voltage region and the low voltage region. The schottky diode includes a junction barrier schottky diode or a trench metal-oxide-semiconductor (mos) schottky diode. ... Infineon Technologies Americas Corp

12/21/17 / #20170365533

Compact high-voltage semiconductor package

There are disclosed herein various implementations of a compact high-voltage semiconductor package. In one exemplary implementation, such a semiconductor package includes a power transistor, as well as a drain contact, a source contact, and a gate contact to provide external connections to the power transistor. ... Infineon Technologies Americas Corp

12/07/17 / #20170352723

Combined gate trench and contact etch process and related structure

A method of forming a semiconductor device, the method comprises forming a gate trench and a contact trench concurrently in a semiconductor substrate using a patterned masking layer, forming a gate conductive filler in the gate trench, forming a deep body region below the contact trench, and forming a contact conductive filler in the contact trench. The method further comprises forming a gate trench dielectric liner in the gate trench, forming a gate trench dielectric liner in the gate trench, and forming an interlayer dielectric layer (idl) over the gate conductive filler. ... Infineon Technologies Americas Corp

11/23/17 / #20170338171

Semiconductor package including flip chip mounted ic and vertically integrated inductor

In one implementation, a semiconductor package includes an integrated circuit (ic) flip chip mounted on a first patterned conductive carrier, a second patterned conductive carrier situated over the ic, and a magnetic material situated over the second patterned conductive carrier. The semiconductor package also includes a third patterned conductive carrier situated over the magnetic material. ... Infineon Technologies Americas Corp

11/16/17 / #20170330943

Semiconductor device having a cavity

A power semiconductor device includes a semiconductor substrate having a drift region, a gate electrode trench in the semiconductor substrate and a field electrode needle trench in the semiconductor substrate. The gate electrode trench extends into the drift region and includes a gate electrode. ... Infineon Technologies Americas Corp

11/16/17 / #20170330942

Method of fabricating a power semiconductor device

Disclosed is a power device, such as power mosfet, and method for fabricating same. The device includes an upper trench situated over a lower trench, where the upper trench is wider than the lower trench. ... Infineon Technologies Americas Corp

09/28/17 / #20170279449

Single-chip high speed and high voltage level shifter

A semiconductor device includes a low voltage region, a high voltage region monolithically integrated with the low voltage region in a semiconductor substrate, where the low voltage region is electrically coupled to the high voltage region through a capacitive isolation barrier, where the high voltage region is structurally isolated from the low voltage region by an isolation structure. The isolation structure includes a junction termination structure, a deep trench structure, or a reduced surface field (resurf) structure. ... Infineon Technologies Americas Corp

09/28/17 / #20170278764

Surface mount device package having improved reliability

A semiconductor package for mounting to a printed circuit board (pcb) includes a case comprising a ceramic base, a semiconductor die in the case, a mounting pad under the ceramic base and coupled to the semiconductor die through at least one opening in the ceramic base. The mounting pad includes at least one layer having a coefficient of thermal expansion (cte) approximately matching a cte of the ceramic base. ... Infineon Technologies Americas Corp

09/21/17 / #20170271488

Bipolar semiconductor device with multi-trench enhancement regions

There are disclosed herein various implementations of a bipolar semiconductor device with multi-trench enhancement regions. Such a bipolar semiconductor device includes a drift region having a first conductivity type situated over an anode layer having an opposite, second conductivity type. ... Infineon Technologies Americas Corp

09/21/17 / #20170271487

Bipolar semiconductor device with sub-cathode enhancement regions

There are disclosed herein various implementations of a bipolar semiconductor device with sub-cathode enhancement regions. Such a bipolar semiconductor device includes a drift region having a first conductivity type situated over an anode layer having a second conductivity type opposite the first conductivity type. ... Infineon Technologies Americas Corp

09/21/17 / #20170271445

Bipolar semiconductor device having localized enhancement regions

There are disclosed herein various implementations of a bipolar semiconductor device having localized enhancement regions. Such a bipolar semiconductor device includes a drift region having a first conductivity type situated over an anode layer having a second conductivity type opposite the first conductivity type. ... Infineon Technologies Americas Corp

09/07/17 / #20170256618

Semiconductor component including aluminum silicon nitride layers

There are disclosed herein various implementations of a semiconductor component including one or more aluminum silicon nitride layers. The semiconductor component includes a substrate, a group iii-v intermediate body situated over the substrate, a group iii-v buffer layer situated over the group iii-v intermediate body, and a group iii-v device fabricated over the group iii-v buffer layer. ... Infineon Technologies Americas Corp

08/31/17 / #20170250127

Semiconductor package having multi-phase power inverter with internal temperature sensor

According to an exemplary implementation, a semiconductor package includes a multi-phase power inverter having power switches and situated on a leadframe of the semiconductor package. The semiconductor package further includes a temperature sensor situated on the leadframe, where the temperature sensor is configured to generate a sensed temperature of the power switches. ... Infineon Technologies Americas Corp

08/17/17 / #20170236771

Method of forming a reliable and robust electrical contact

In one implementation, a reliable and robust electrical contact includes a contact pad patterned from a first metal layer situated over a surface of an active die, and multiple dielectric islands situated over the contact pad. The dielectric islands are spaced apart from one another by respective segments of a second metal layer formed between and over the dielectric islands. ... Infineon Technologies Americas Corp

08/10/17 / #20170229548

Semiconductor component with a multi-layered nucleation body

There are disclosed herein various implementations of a semiconductor component with a multi-layered nucleation body and method for its fabrication. The semiconductor component includes a substrate, a nucleation body situated over the substrate, and a group iii-v semiconductor device situated over the nucleation body. ... Infineon Technologies Americas Corp

08/10/17 / #20170229383

Power quad flat no-lead (pqfn) package in a single shunt inverter circuit

According to an exemplary implementation, a power quad flat no-lead (pqfn) package includes a driver integrated circuit (ic) situated on a leadframe. The pqfn package further includes low-side u-phase, low-side v-phase, and low-side w-phase power switches situated on the leadframe. ... Infineon Technologies Americas Corp

08/03/17 / #20170222002

Semiconductor device structure for improved performance and related method

A semiconductor device includes a vertical gate electrode in a gate trench in a semiconductor substrate, and a lateral gate electrode over the semiconductor substrate and adjacent the gate trench, where the lateral gate electrode results in improved electrical performance of the semiconductor device. The improved electrical performance includes an improved avalanche current tolerance in the semiconductor device. ... Infineon Technologies Americas Corp

08/03/17 / #20170221798

Compact multi-die power semiconductor package

One disclosed implementation is a power semiconductor package including a sync transistor having a drain on its top surface and a source and a gate on its bottom surface. The source of the sync transistor is configured for attachment to a first partially etched leadframe segment and the gate of the sync transistor is configured for attachment to a second partially etched leadframe segment. ... Infineon Technologies Americas Corp

07/27/17 / #20170213909

Method for fabricating a shallow and narrow trench fet

According to an embodiment of a method for fabricating a trench field-effect transistor (trench fet), the method includes: forming a trench in a semiconductor substrate of a first conductivity type, the trench including sidewalls which taper from a wider, top portion of the trench to a narrower, bottom portion of the trench; forming a gate dielectric in the trench, the gate dielectric having substantially the same thickness in the wider, top portion of the trench as in the narrower, bottom portion of the trench; forming a gate electrode in the trench and separated from the semiconductor substrate by the gate dielectric; and forming a channel region of a second conductivity type in the semiconductor substrate after forming the trench and the gate dielectric, the channel region being disposed adjacent the trench. Trench fets formed by the method are also disclosed.. ... Infineon Technologies Americas Corp

07/13/17 / #20170200799

Combined gate and source trench formation and related structure

A semiconductor device includes a gate trench in a semiconductor substrate, a source trench in the semiconductor substrate, the source trench having a first portion and a second portion under the first portion, where the first portion of the source trench is wider than the gate trench, and extends to a depth of the gate trench. The semiconductor device also includes a gate electrode and a gate trench dielectric liner in the gate trench, and a conductive filler and a source trench dielectric liner in the source trench. ... Infineon Technologies Americas Corp

07/06/17 / #20170192060

Enhanced protection, diagnosis, and control of power distribution and control units

Systems, devices, methods, and techniques are disclosed for performing calibrated measurements of current through switches in an electronic control unit. In one example, a device includes a current sensor system; a controller, operably connected to the current sensor system; and one or more switches, operably connected to the controller. ... Infineon Technologies Americas Corp

06/29/17 / #20170186861

Method of forming a semiconductor structure having integrated snubber resistance

A semiconductor structure is disclosed. The semiconductor structure includes a source trench in a drift region, the source trench having a source trench dielectric liner and a source trench conductive filler surrounded by the source trench dielectric liner, a source region in a body region over the drift region. ... Infineon Technologies Americas Corp

06/22/17 / #20170179824

Current sensing in a power supply

During operation, a protection circuit receives an input voltage representative of current delivered by a power supply phase to a load. In one configuration, the input voltage is received as the voltage across respective drain-source nodes of a synchronous switch (low side switch) disposed in a power supply. ... Infineon Technologies Americas Corp

06/15/17 / #20170170718

Power converter with tank circuit and over-voltage protection

In one implementation, a power converter with over-voltage protection includes a power switch coupled to a power supply through a tank circuit, and a control circuit coupled to a gate of the power switch. The control circuit is configured to turn the power switch off based on a current from the tank circuit, thereby providing the over-voltage protection to the power converter. ... Infineon Technologies Americas Corp

06/01/17 / #20170154989

Methods of manufacturing gallium nitride devices

Gallium nitride material devices and methods associated with the same. In some embodiments, the devices may be transistors which include a conductive structure connected to a source electrode. ... Infineon Technologies Americas Corp

06/01/17 / #20170154970

Buried bus and related method

A semiconductor structure includes a semiconductor substrate having a gate electrode in a gate trench, a buried bus in the semiconductor substrate, the buried bus having a bus conductive filler in a bus trench, where the bus conductive filler is electrically coupled to the gate electrode. The bus conductive filler is surrounded by the gate electrode. ... Infineon Technologies Americas Corp

05/18/17 / #20170141192

Group iii-v device structure having a selectively reduced impurity concentration

There are disclosed herein various implementations of a semiconductor structure and method. The semiconductor structure comprises a substrate, a transition body over the substrate, and a group iii-v intermediate body having a bottom surface over the transition body. ... Infineon Technologies Americas Corp

05/11/17 / #20170133986

Methods and circuitry to trim common mode transient control circuitry

Embodiments herein include a replica communication path and monitor circuit to provide increased common mode transient immunity. As its name suggests, the monitor circuit monitors the replica communication path and produces an adjustment signal (common mode transient adjustment signal) to cancel presence of a common mode transient signal in one or more other communication paths conveying data signals.. ... Infineon Technologies Americas Corp

04/27/17 / #20170117213

Semiconductor package with integrated die paddles for power stage

In one implementation, a semiconductor package includes a first conductive carrier including a first die paddle of the semiconductor package, and a control transistor having a drain attached to the first die paddle. The semiconductor package also includes a second conductive carrier attached to the first conductive carrier and including a second die paddle of the semiconductor package, and a sync transistor having a drain attached to the second die paddle. ... Infineon Technologies Americas Corp

03/30/17 / #20170092611

Porous metallic film as die attach and interconnect

One exemplary disclosed embodiment comprises a sintered porous metallic film as a die attach mechanically connecting a backside of a semiconductor die to a substrate of a package. Another exemplary disclosed embodiment comprises a sintered porous metallic film as an electrical connection between an electrode on an active surface of a semiconductor die and a substrate of a package. ... Infineon Technologies Americas Corp

03/16/17 / #20170076937

Method of fabricating iii-nitride semiconductor dies

According to an embodiment of a method of fabricating iii-nitride semiconductor dies, the method includes: growing a iii-nitride body over a group iv substrate in a semiconductor wafer; forming at least one device layer over the iii-nitride body; etching grid array trenches in the iii-nitride body and in the group iv substrate; forming an edge trench around a perimeter of the semiconductor wafer, the grid array trenches terminating inside the group iv substrate; and forming separate dies by cutting the semiconductor wafer approximately along the grid array trenches.. . ... Infineon Technologies Americas Corp

03/09/17 / #20170069578

Ultra-thin semiconductor component fabrication using a dielectric skeleton structure

In one implementation, a method for forming ultra-thin semiconductor components includes fabricating multiple devices including a first device and a second device in a semiconductor wafer, and forming a street trench within the semiconductor wafer and between the first and second devices. The method continues with forming a dielectric skeleton structure over the semiconductor wafer, the dielectric skeleton structure laterally extending to at least partially cover the first and second devices, while also substantially filling the street trench. ... Infineon Technologies Americas Corp

03/02/17 / #20170063250

Power converter package with integrated output inductor

In one implementation, a semiconductor package includes a first patterned conductive carrier including partially etched segments. The semiconductor package also includes a control fet having a control drain attached to a first partially etched segment of the first patterned conductive carrier. ... Infineon Technologies Americas Corp

03/02/17 / #20170063235

Power supply circuitry and adaptive transient control

A control circuitry can be configured to receive an error signal indicating a difference between an output voltage of the power supply and a desired setpoint for the output voltage. According to one configuration, depending on the error signal, the control circuitry initiates switching between operating the control circuitry in a pulse width modulation mode and operating the control circuitry in a pulse frequency modulation mode to produce an output voltage. ... Infineon Technologies Americas Corp

03/02/17 / #20170062395

Semiconductor package with integrated semiconductor devices and passive component

According to one exemplary embodiment, a semiconductor package includes a substrate having lower and upper surfaces. The semiconductor package further includes at least one passive component coupled to first and second conductive pads on the upper surface of the substrate. ... Infineon Technologies Americas Corp

02/16/17 / #20170047407

Semiconductor material having a compositionally-graded transition layer

The invention provides semiconductor materials including a gallium nitride material layer formed on a silicon substrate and methods to form the semiconductor materials. The semiconductor materials include a transition layer formed between the silicon substrate and the gallium nitride material layer. ... Infineon Technologies Americas Corp

02/16/17 / #20170047228

Method of fabricating an electrical contact for use on a semiconductor device

According to one disclosed embodiment, an electrical contact for use on a semiconductor device comprises an electrode stack including a plurality of metal layers and a capping layer formed over the plurality of metal layers. The capping layer comprises a refractory metal nitride. ... Infineon Technologies Americas Corp

02/02/17 / #20170032958

Method for cleaning hermetic semiconductor packages

A method for removing undesirable particles from a semiconductor package is disclosed. The method comprises dispensing dry ice into random cavities of the semiconductor package, and removing the undesirable particles from the random cavities using the dry ice, where the dry ice causes the undesirable particles to dislodge from the random cavities, and where the undesirable particles are removed through an exhaust system. ... Infineon Technologies Americas Corp

01/26/17 / #20170025319

Robust high performance semiconductor package

A semiconductor package includes a suspended substrate having one or more semiconductor devices thereon, a metallic case covering the suspended substrate, the suspended substrate being supported by a plurality of mechanical leads on opposing sides of the semiconductor package, at least one of the plurality of mechanical leads having a coefficient of thermal expansion (cte) that substantially matches a cte of the suspended substrate, where at least one of the plurality of mechanical leads is electrically connected to the suspended substrate, and where the plurality of mechanical leads absorb mechanical shocks so as to prevent damage to the semiconductor package. The semiconductor package also includes a thermal gel between the suspended substrate and the metallic case. ... Infineon Technologies Americas Corp

01/12/17 / #20170012533

Voltage converter with vcc-less rdson current sensing circuit

In one implementation, a voltage converter includes a driver providing a gate drive for a power switch and a sense circuit coupled across the power switch. The gate drive provides power to the sense circuit, and the sense circuit provides a sense output to the driver corresponding to a current through the power switch. ... Infineon Technologies Americas Corp








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