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Infineon Technologies Austria Ag patents (2017 archive)


Recent patent applications related to Infineon Technologies Austria Ag. Infineon Technologies Austria Ag is listed as an Agent/Assignee. Note: Infineon Technologies Austria Ag may have other listings under different names/spellings. We're not affiliated with Infineon Technologies Austria Ag, we're just tracking patents.

ARCHIVE: New 2018 2017 2016 2015 2014 2013 2012 2011 2010 2009 | Company Directory "I" | Infineon Technologies Austria Ag-related inventors


Power converter including an autotransformer and power conversion method

A power converter circuit includes a chopper circuit configured to receive an input voltage and generate a chopper voltage with an alternating voltage level based on the input voltage, an autotransformer including at least one tap, the autotransformer being coupled to the chopper circuit and configured to generate a tap voltage at the at least one tap, and a selector circuit configured to receive a plurality of voltage levels. At least one of these the voltage levels is based on the at least one tap voltage. ... Infineon Technologies Austria Ag

Power mosfet semiconductor

A semiconductor device includes a source metallization, a source region of a first conductivity type in contact with the source metallization, a body region of a second conductivity type which is adjacent to the source region. The semiconductor device further includes a first field-effect structure including a first insulated gate electrode and a second field-effect structure including a second insulated gate electrode which is electrically connected to the source metallization. ... Infineon Technologies Austria Ag

Semiconductor device with field dielectric in an edge area

A semiconductor device includes a semiconductor body with transistor cells arranged in an active area and absent in an edge area between the active area and a side surface. A field dielectric adjoins a first surface of the semiconductor body and separates, in the edge area, a conductive structure connected to gate electrodes of the transistor cells from the semiconductor body. ... Infineon Technologies Austria Ag

Phase shift clock for digital llc converter

The techniques of this disclosure may digitally generate a driver signal with a period (or frequency) at a finer resolution than can be achieved by simply counting clock cycles of a system clock. The driver signal may be configured to trigger based on single output clock signal that may be phase-shifted relative to the master system clock. ... Infineon Technologies Austria Ag

High-electron-mobility transistor having a buried field plate

A high-electron-mobility semiconductor device includes: a buffer region having first, second and third cross-sections forming a stepped lateral profile, the first cross-section being thicker than the third cross-section and comprising a first buried field plate disposed therein, the second cross-section interposed between the first and third cross-sections and forming oblique angles with the first and third cross-sections; and a barrier region of substantially uniform thickness extending along the stepped lateral profile of the buffer region, the barrier region being separated from the first buried field plate by a portion of the buffer region. The buffer region is formed by a first semiconductor material and the barrier region is formed by a second semiconductor material. ... Infineon Technologies Austria Ag

Method for producing an integrated heterojunction semiconductor device

A method of producing a semiconductor component is provided. The method includes providing a silicon substrate having a <111>-surface defining a vertical direction, forming in the silicon substrate at least one electronic component, forming at least two epitaxial semiconductor layers on the silicon substrate to form a heterojunction above the <111>-surface, and forming a hemt-structure above the <111>-surface.. ... Infineon Technologies Austria Ag

Compound semiconductor substrate and method of forming a compound semiconductor substrate

A method of forming a compound semiconductor substrate includes providing a crystalline base substrate having a first semiconductor material and a main surface, and forming a first semiconductor layer on the main surface and having a pair of tracks disposed on either side of active device regions. The first semiconductor layer is formed from a second semiconductor material having a different coefficient of thermal expansion than the first semiconductor material. ... Infineon Technologies Austria Ag

Power tool anti-theft

Techniques are disclosed for providing anti-theft protection for power tools. In one example of the techniques of the disclosure, at least one processor of a power tool receives, from an operator, a command to operate the power tool. ... Infineon Technologies Austria Ag

Chip card module and method for producing a chip card module

In various embodiments, a chip card module is provided. The chip card module includes a chip card module contact array having six contact pads that are arranged in two rows having three contact pads each in accordance with iso 7816, and three additional contact pads that are arranged between the two rows. ... Infineon Technologies Austria Ag

Level shifter circuit

Techniques are disclosed for a level shifter configured to adjust current flow in response to measured current fluctuations due to common mode noise in the level shifter. For example, the level shifter includes a low-side control circuit configured to adjust a first current flowing into a first low-side terminal of an active high voltage level shifter device in response to a difference between the first low-side current and a second low-side current flowing into a second low-side terminal of an inactive high voltage level shifter device. ... Infineon Technologies Austria Ag

Power supply regulation and bidirectional flow mode

A power converter circuit includes a transformer. The transformer includes a primary winding and a secondary winding. ... Infineon Technologies Austria Ag

Method and apparatus for phase current estimation in semi-resonant voltage converters

A resonant or semi-resonant voltage converter includes a synchronous rectification (sr) switch through which a current having a half-cycle sinusoidal-like shape is conducted when the sr switch is active. The current through the sr switch is modelled, and estimates of the sr switch current are generated by a digital estimator based on the model. ... Infineon Technologies Austria Ag

Reduced gate charge field-effect transistor

In one implementation, a reduced gate charge field-effect transistor (fet) includes a drift region situated over a drain, a body situated over the drift region, and source diffusions formed in the body. The source diffusions are adjacent a gate trench extending through the body into the drift region and having a dielectric liner and a gate electrode situated therein. ... Infineon Technologies Austria Ag

Semiconductor devices and methods for forming a semiconductor device

A semiconductor device includes a plurality of compensation regions of a first conductivity type arranged in a semiconductor substrate. The semiconductor device further includes a plurality of drift region portions of a drift region of a vertical electrical element arrangement. ... Infineon Technologies Austria Ag

11/30/17 / #20170345892

Method for forming a power semiconductor device and a power semiconductor device

A method of forming a power semiconductor device includes providing a semiconductor layer of a first conductivity type extending to a first side and having a first doping concentration of first dopants providing majority charge carriers of a first electric charge type in the layer, and forming a deep trench isolation including forming a trench which extends from the first side into the semiconductor layer and includes, in a vertical cross-section perpendicular to the first side, a wall, forming a compensation semiconductor region of the first conductivity type at the wall and having a second doping concentration of the first dopants higher than the first doping concentration, and filling the trench with a dielectric material. The amount of first dopants in the compensation semiconductor region is such that a field-effect of fixed charges of the first electric charge type which are trapped in the trench is at least partly compensated.. ... Infineon Technologies Austria Ag

11/30/17 / #20170343491

Method and apparatus for determining lattice parameters of a strained iii-v semiconductor layer

A multi-layer arrangement of iii-v semiconductor layers includes a strained iii-v semiconductor layer having a concentration of a constituent element which effects intensity of a conductive channel formed in the multi-layer arrangement. Lattice parameters of the strained iii-v semiconductor layer are determined by generating a first scan in a qx direction for a chosen reflection in reciprocal space based on diffracted x-ray beam intensity measurements in the qx direction. ... Infineon Technologies Austria Ag

11/23/17 / #20170338338

Semiconductor devices and method for manufacturing semiconductor devices

A method for manufacturing a semiconductor device includes: forming a recess in a semiconductor substrate, the recess having a bottom and a sidewall extending from the bottom to a first side of the semiconductor substrate; forming an auxiliary structure on the sidewall and the bottom of the recess and forming a hollow space within the recess; filling the hollow space with a filling material; forming a plug on the first side of the semiconductor substrate to cover the auxiliary structure at least on the sidewall of the recess; forming an opening in the plug to partially expose the auxiliary structure in the recess; removing the auxiliary structure at least partially from the sidewall of the recess to form cavities between the auxiliary structure and the sidewall; and sealing the opening in the plug.. . ... Infineon Technologies Austria Ag

11/23/17 / #20170338306

Method for manufacturing a power semiconductor device

A method for manufacturing a power semiconductor device includes: forming a drift region of a first conductivity type, a second emitter region of a second conductivity type, a pn-junction between the second emitter region and drift region, and a first emitter region having a first doping region of the first conductivity type and a second doping region of the first conductivity type; forming a first emitter metallization in contact with the first emitter region to form an ohmic contact between the first emitter metallization and the first doping region, and to form a non-ohmic contact between the first emitter metallization and the second doping region; and forming a second emitter metallization in contact with the second emitter region. The first emitter region is formed using a mask that is aligned with respect to the second emitter region, so that the first and second doping regions are formed in aligned relation.. ... Infineon Technologies Austria Ag

11/16/17 / #20170331386

Method and apparatus for phase alignment in semi-resonant power converters to avoid switching of power switches having negative current flow

Each phase of a multi-phase voltage converter includes a power stage, passive circuit, synchronous rectification (sr) switch, and control circuit. Each passive circuit couples its power stage to an output node of the voltage converter, and is switchably coupled to ground by the sr switch. ... Infineon Technologies Austria Ag

11/16/17 / #20170331383

Llc power converter and switching method thereof

In some embodiments, an inductor-inductor-capacitor (llc) converter includes a transformer having a primary winding, a secondary winding, and an auxiliary winding. The primary winding is coupled to a primary side circuit and the auxiliary winding has a first winding portion coupled between a first terminal and a middle terminal, and a second winding portion coupled between the middle terminal and a second terminal. ... Infineon Technologies Austria Ag

11/16/17 / #20170331380

Method and apparatus for phase alignment in semi-resonant power converters

Each phase of a multi-phase voltage converter includes a power stage, passive circuit, synchronous rectification (sr) switch, and control circuit. Each passive circuit couples its power stage to an output node of the voltage converter, and is switchably coupled to ground by the sr switch. ... Infineon Technologies Austria Ag

11/16/17 / #20170330964

Semiconductor devices and methods for forming semiconductor devices

A semiconductor device includes an array of needle-shaped trenches extending into a semiconductor substrate. The semiconductor device further includes a gate trench grid extending into the semiconductor substrate. ... Infineon Technologies Austria Ag

11/16/17 / #20170330946

Semiconductor device having a trench gate electrode

A semiconductor device includes a semiconductor substrate comprising a main surface and a gate electrode in a trench between neighboring semiconductor mesas, the gate electrode is electrically insulated from the neighboring semiconductor mesas by a dielectric layer. The semiconductor device further includes a conductor arranged, at least partially, between neighboring dielectric contact spacers. ... Infineon Technologies Austria Ag

11/16/17 / #20170330941

Methods for forming semiconductor devices, semiconductor devices and power semiconductor devices

A method for forming a semiconductor device includes forming a first insulation layer on a semiconductor substrate and forming a structured etch stop layer. Further, the method includes depositing a second insulation layer after forming the structured etch stop layer and forming a structured mask layer on the second insulation layer. ... Infineon Technologies Austria Ag

11/16/17 / #20170330808

Semiconductor structure having a test structure formed in a group iii nitride layer

In an embodiment, a semiconductor structure includes a support substrate comprising a surface adapted to support epitaxial growth of a group iii nitride, one or more epitaxial group iii nitride layers arranged on the surface and supporting a plurality of transistor devices assembled upon the support substrate, and a test structure formed in a group iii nitride layer. The test structure includes a plurality of trenches configured to provide an optical diffraction grating when illuminated by uv light. ... Infineon Technologies Austria Ag

10/26/17 / #20170310230

Self supply for synchronous rectifiers

A power converter with an isolated topology may include a primary side and a secondary side. The secondary side includes a self-powered synchronous rectifier. ... Infineon Technologies Austria Ag

10/26/17 / #20170310121

Protection and management of a power supply output shorted to ground

In some examples, a circuit is configured to receive an input signal and deliver, based on the input signal, a charging current to a capacitor. The circuit may be further configured to receive an output voltage that indicates a charge on the capacitor. ... Infineon Technologies Austria Ag

10/26/17 / #20170309713

Semiconductor device having stripe-shaped gate structures and spicular or needle-shaped field electrode structures

A semiconductor device includes a pair of stripe-shaped gate structures formed lengthwise in parallel in a first surface of a semiconductor body and extending into the semiconductor body, each stripe-shaped gate structure including a gate electrode and a gate dielectric separating the gate electrode from the semiconductor body. The semiconductor device further includes a plurality of field electrode structures formed in the semiconductor body between the pair of stripe-shaped gate structures, a body zone of a second conductivity type formed in the semiconductor body and extending between the pair of stripe-shaped gate structures, and a source zone of a first conductivity type opposite the second conductivity type formed in the body zone. ... Infineon Technologies Austria Ag

10/26/17 / #20170307668

Capacitance determination circuit and method for determining a capacitance

According to an embodiment, a capacitance determination circuit is provided comprising a voltage controlled oscillator configured to generate a frequency signal whose frequency depends on a control voltage supplied to the voltage controlled oscillator, a capacitor coupled to the voltage controlled oscillator wherein the control voltage depends on a voltage across the capacitor and a processing circuit configured to generate, based on the frequency signal generated by the voltage controlled oscillator over a time interval comprising at least one phase in which the capacitor is charged and comprising at least one phase in which the capacitor is discharged, an indication of the capacitance of the capacitor.. . ... Infineon Technologies Austria Ag

10/05/17 / #20170288654

Half bridge circuit, method of operating a half bridge circuit and a half bridge circuit package

A half bridge circuit includes an input connection configured to supply an electric input, an output connection configured to supply an electric output to a load to be connected to the output connection, a switch and a diode arranged between the input connection and the output connection and a voltage limiting inductance arranged in series between the switch and the diode. The voltage limiting inductance is configured to limit, upon switching the switch, a maximum voltage across the switch to below a breakdown voltage of the switch. ... Infineon Technologies Austria Ag

10/05/17 / #20170288556

Circuits and methods for auxiliary secondary supply generation with self-starting primary side driver in isolated power converters

Circuits that provide an auxiliary power supply on the secondary side of an isolated switched-mode power converter are described. Such an auxiliary supply may be used to provide power to a secondary side controller or to other circuitry in the secondary side of the power converter. ... Infineon Technologies Austria Ag

10/05/17 / #20170288554

Power converter and power conversion method

In accordance with an embodiment, a power conversion method includes operating a power converter circuit in one of a first operation and a second operation mode based on a feedback signal and a signal level of an output signal at an output. The power converter includes a transformer with a primary winding and a secondary winding, a first electronic switch connected in series with the primary winding, and a rectifier circuit connected between the secondary winding and the output and comprising a second electronic switch. ... Infineon Technologies Austria Ag

10/05/17 / #20170288553

Power converter and power conversion method

In accordance with an embodiment, a method includes disabling a first electronic switch connected in series with a primary winding of a transformer in a power converter circuit if an auxiliary voltage across an auxiliary winding of the transformer is outside a predefined voltage range. The power converter circuit further includes a secondary winding of the transformer, and a rectifier circuit connected between the secondary winding and an output, where the rectifier circuit comprises a second electronic switch.. ... Infineon Technologies Austria Ag

10/05/17 / #20170287709

Semiconductor substrate with stress relief regions

A crystalline base substrate including a first semiconductor material and having a main surface is provided. The base substrate is processed so as to damage a lattice structure of the base substrate in a first region that extends to the main surface without damaging a lattice structure of the base substrate in second regions that are adjacent to the first region. ... Infineon Technologies Austria Ag

10/05/17 / #20170285674

Protection from hard commutation events at power switches

A system is described that includes a half-bridge, a first driver, a second driver, and a controller unit. The half-bridge includes a first switch coupled to a second switch at a switching node. ... Infineon Technologies Austria Ag

09/21/17 / #20170271491

Semiconductor transistor and method for forming the semiconductor transistor

A vertical semiconductor field-effect transistor includes a semiconductor body having a front side, and a field electrode trench extending from the front side into the semiconductor body the field electrode trench includes a field electrode and a field dielectric arranged between the field electrode and the semiconductor body. The vertical semiconductor field-effect transistor further includes a gate electrode trench arranged next to the field electrode trench, extending from the front side into the semiconductor body, and having two electrodes which are separated from each other and the semiconductor body. ... Infineon Technologies Austria Ag

09/21/17 / #20170271454

Substrate structure, semiconductor component and method

In an embodiment, a substrate structure includes a support substrate, a buffer structure arranged on the support substrate, the buffer structure including an intentionally doped superlattice laminate, an unintentionally doped first group iii nitride layer arranged on the buffer structure, a second group iii nitride layer arranged on the first group iii nitride layer forming a heterojunction therebetween, and a blocking layer arranged between the heterojunction and the buffer structure. The blocking layer is configured to block charges from entering the buffer structure.. ... Infineon Technologies Austria Ag

09/14/17 / #20170263756

Semiconductor devices and a method for forming a semiconductor device

A semiconductor device includes a plurality of striped-shaped trenches extending into a semiconductor substrate. At least one trench of a first group of trenches of the plurality of striped-shaped trenches is located between two trenches of a second group of trenches of the plurality of striped-shaped trenches. ... Infineon Technologies Austria Ag

09/14/17 / #20170263720

Method of forming a semiconductor device

According to an embodiment of a method of forming a semiconductor device, a semiconductor layer including a first dopant species of a first conductivity type and a second dopant species of a second conductivity type different from the first conductivity type is formed. The semiconductor layer is part of a semiconductor body having opposite first and second surfaces. ... Infineon Technologies Austria Ag

09/14/17 / #20170263378

Dc-dc converter assembly, method of manufacturing a dc-dc converter assembly and method of manufacturing an output inductor for a dc-dc converter assembly

A dc-dc converter assembly a power stage die of a dc-dc converter attached to a board, an output inductor attached to the board and electrically connected to an output of the power stage die, the output inductor accommodating the power stage die under the output inductor, a plurality of input capacitors attached to the board and electrically connected to input terminals of the power stage die, an output capacitor attached to the board and electrically connected to the output inductor, and a plurality of decoupling capacitors attached to the board and electrically connected to power terminals of the power stage die. A total footprint of the power stage die, the output inductor, the input capacitors, the output capacitor and the decoupling capacitors is at least a third of the combined surface area of the power stage die, the output inductor, the input capacitors, the output capacitor and the decoupling capacitors.. ... Infineon Technologies Austria Ag

09/07/17 / #20170256619

Semiconductor device having field plate structures, source regions and gate electrode structures between the field plate structures

A semiconductor device includes a semiconductor substrate having a first surface, first and second field plate structures extending in a first direction parallel to the first surface, a plurality of gate electrode structures disposed over the first surface and extending in a second direction parallel to the first surface, the second direction being different than the first direction, and a plurality of source regions and drain regions of a first conductivity type arranged in an alternating manner at the first surface so that a drain region is disposed on one side of a gate electrode structure and a source region is disposed on the other side of the gate electrode structure. The gate electrode structures are disposed between the first and the second field plate structures. ... Infineon Technologies Austria Ag

08/31/17 / #20170250685

Double gate transistor device and method of operating

In accordance with an embodiment, a method includes switching on a transistor device by generating a first conducting channel by driving a first gate electrode and, before generating the first conducting channel, generating a second conducting channel by driving a second gate electrode, wherein the second gate electrode is adjacent the first gate electrode in a current flow direction of the transistor device.. . ... Infineon Technologies Austria Ag

08/31/17 / #20170250260

Double gate transistor device and method of operating

In accordance with an embodiment, a method include switching on a transistor device by generating a first conducting channel in a body region by driving a first gate electrode and, before generating the first conducting channel, generating a second conducting channel in the body region by driving a second gate electrode. The first gate electrode is dielectrically insulated from a body region by a first gate dielectric, and the second gate electrode is dielectrically insulated from the body region by a second gate dielectric, arranged adjacent the first gate electrode, and separated from the first gate electrode by a separation layer. ... Infineon Technologies Austria Ag

08/31/17 / #20170250256

Semiconductor device with needle-shaped field plates and a gate structure with edge and node portions

A semiconductor device includes needle-shaped field plate structures extending from a first surface into transistor sections of a semiconductor portion in a transistor cell area. A grid structure separates the transistor sections from each other. ... Infineon Technologies Austria Ag

08/31/17 / #20170250255

Semiconductor device with needle-shaped field plate structures in a transistor cell region and in an inner termination region

A semiconductor device includes a semiconductor substrate, a transistor cell region formed in the semiconductor substrate and an inner termination region formed in the semiconductor substrate and devoid of transistor cells. The transistor cell region includes a plurality of transistor cells and a gate structure that forms a grid separating transistor sections of the transistor cells from each other, each of the transistor sections including a needle-shaped first field plate structure extending from a first surface into the semiconductor substrate. ... Infineon Technologies Austria Ag

08/31/17 / #20170249202

Requirement runtime monitor using temporal logic or a regular expression

A hardware monitor may receive information that identifies a requirement for a system. The requirement may be associated with operation of the system during a runtime operation of the system in an intended operating environment. ... Infineon Technologies Austria Ag

08/24/17 / #20170244407

Active gate-source capacitance clamp for normally-off hemt

A semiconductor assembly includes a first fet integrated within the semiconductor assembly and comprising gate, source and drain terminals. The semiconductor assembly further includes a low voltage switching device integrated within the semiconductor assembly and being configured to electrically short a gate-source capacitance of the first fet responsive to a control signal.. ... Infineon Technologies Austria Ag

08/24/17 / #20170244332

Power supply systems and feedback through a transformer

A power converter circuit includes a transformer. The transformer includes a primary winding and a secondary winding. ... Infineon Technologies Austria Ag

08/24/17 / #20170244330

Power converter with a snubber circuit

A power converter circuit includes a switching circuit with at least one electronic switch, a capacitor configured to provide or receive a voltage with a predefined voltage level, at least one first inductor, and a snubber circuit. The snubber circuit includes at least one second inductor inductively coupled to the at least one first inductor and electrically coupled to the capacitor.. ... Infineon Technologies Austria Ag

08/24/17 / #20170244328

Power supply systems and feedback through a transformer

A power converter circuit includes a transformer. The transformer includes a primary winding and a secondary winding. ... Infineon Technologies Austria Ag

08/24/17 / #20170244327

Power supply systems and feedback through a transformer

A power converter circuit includes a transformer. The transformer includes a primary winding and a secondary winding. ... Infineon Technologies Austria Ag

08/24/17 / #20170243938

Semiconductor wafer and method of manufacturing semiconductor devices in a semiconductor wafer

A method of manufacturing semiconductor devices in a semiconductor wafer comprises forming charge compensation device structures in the semiconductor wafer. An electric characteristic related to the charge compensation device structures is measured. ... Infineon Technologies Austria Ag

08/24/17 / #20170243936

Vertical potential short in the periphery region of a iii-nitride stack for preventing lateral leakage

A semiconductor die includes a substrate and a semiconductor body supported by the substrate and having a periphery which is devoid of active devices and terminates at an edge face of the semiconductor die. The semiconductor body includes a first iii-nitride semiconductor layer and a plurality of second iii-nitride semiconductor layers below the first iii-nitride semiconductor layer. ... Infineon Technologies Austria Ag

08/24/17 / #20170242949

Transistor model, a method for a computer based determination of characteristic of a transistor, a device and a computer readable storage medium for performing the method

According to various embodiments, a transistor model for a computer based simulation of a field effect transistor may include: a first electrical network coupled between a drain node, a source node and a gate node, wherein the first electrical network is configured to represent an electrical characteristic of the field effect transistor in a forward operation; a second electrical network coupled parallel to the first electrical network and between the source node and the drain node, wherein the second electrical network is configured to represent an electrical characteristic of the field effect transistor in at least one of a commutation operation and a reverse operation; wherein the second electrical network includes: a controlled first source representing a parasitic junction of the field effect transistor; at least one controlled second source representing a charge injection dependent parasitic impedance of the field effect transistor; wherein the controlled first source and the at least one controlled second source are coupled in parallel; and wherein the controlled first source and the at least one controlled second source are coupled via at least one parameter such that a charge injection from the parasitic junction into the parasitic impedance is considered.. . ... Infineon Technologies Austria Ag

08/17/17 / #20170236913

Method of processing a semiconductor device

A method of processing a semiconductor device includes: creating first and second recesses in a surface of a semiconductor body; creating an insulation layer that forms first and second wells each having a common lateral extension range with the portion of the insulation layer located between the recesses; filling the wells with a plug material having the respective common lateral extension range with the insulation layer; removing a middle portion of the insulation layer located between the recesses; filling, with a filling material, a third recess created in a region where the middle portion has been removed and at least a portion of the space located between the wells; creating a first common surface of the insulation layer, the plug material, and the filling material; removing the plug material from the second well; and creating a second insulation layer that covers a side wall of the second recess.. . ... Infineon Technologies Austria Ag

08/17/17 / #20170236910

Methods of manufacturing a power mosfet

A method of manufacturing a power metal oxide semiconductor field effect transistor includes: forming a field electrode in a field plate trench in a main surface of a semiconductor substrate; forming a gate trench in the main surface, the gate trench extending in a first direction parallel to the main surface; and for a gate electrode in the gate trench, the gate electrode being made of a gate electrode material that comprises a metal. The field plate trench is formed to have an extension length in the first direction which is less than double of an extension length of the field plate trench in a second direction, the second direction being perpendicular to the first direction.. ... Infineon Technologies Austria Ag

08/10/17 / #20170229959

Set point independent regulation of a switched mode power converter

A controller for controlling a power converter includes an analog-to-digital converter (adc) configured to output, based on a received analog voltage, a first digital value defined by a first resolution. The controller also includes a digital filter configured to adjust, based at least in part on the first digital value, a second digital value, wherein the second digital value is defined by a second resolution different from the first resolution. ... Infineon Technologies Austria Ag

08/03/17 / #20170222643

Driver for the high side switch of the cascode switch

In accordance with an embodiment, a circuit includes a first and a second switching transistors configured to be coupled in series between a first reference voltage terminal and a transformer. The circuit also includes a first diode coupled between a first drain of the first switching transistor and a first input terminal. ... Infineon Technologies Austria Ag

08/03/17 / #20170222573

Resonant decoupled auxiliary supply for a switched-mode power supply controller

Switched-mode power supply (smps) circuits and a method implemented within an smps are provided. The circuits and method use resonant energy capturing and filtering circuitry to provide an auxiliary power supply that may be used to power a controller of an smps. ... Infineon Technologies Austria Ag

08/03/17 / #20170222561

System and method for a cascode switch

In some embodiments, a power system includes an integrated circuit (ic). The ic includes a first switching transistor having a load path coupled between a sensing terminal of the ic and a first terminal of the ic. ... Infineon Technologies Austria Ag

08/03/17 / #20170222560

Method and apparatus for estimating load current for semi-resonant and resonant converters

A voltage converter includes a variable switching frequency power stage, a passive circuit and a control circuit. The power stage includes a high-side switch and a first low-side switch coupled to the high-side switch at a switching node of the power stage. ... Infineon Technologies Austria Ag

08/03/17 / #20170222043

Semiconductor device including a lateral transistor

A semiconductor device includes a source region and a drain region of a first conductivity type. The source region and the drain region are arranged in a first direction parallel to a first main surface of a semiconductor substrate. ... Infineon Technologies Austria Ag

08/03/17 / #20170221989

Semiconductor device with superjunction structure and transistor cells in a transition region along a transistor cell region

A semiconductor device includes a transistor cell region and a transition region. The transistor cell region includes a first portion of a super junction structure and a first contact structure electrically connecting a first load electrode with first source zones of transistor cells. ... Infineon Technologies Austria Ag

08/03/17 / #20170221988

Method of manufacturing semiconductor devices including deposition of crystalline silicon in trenches

Trenches are formed in a semiconductor layer of a semiconductor substrate. A mixture that contains trichlorosilane and hydrogen gas is fed into a process chamber containing the semiconductor substrate. ... Infineon Technologies Austria Ag

07/20/17 / #20170207309

Processing a semiconductor device

A method of processing a semiconductor device is presented. The method includes providing a semiconductor body; forming a trench within the semiconductor body, the trench having a stripe configuration and extending laterally within an active region of the semiconductor body that is surrounded by a non-active region of the semiconductor body; forming, within the trench, a first electrode and a first insulator insulating the first electrode from the semiconductor body; carrying out a first etching step for partially removing the first electrode along the total lateral extension of the first electrode such that the remaining part of the first electrode has a planar surface, thereby creating a well in the trench that is laterally confined by the first insulator; depositing a second insulator on top the planar surface; and forming a second electrode within the well of the trench. ... Infineon Technologies Austria Ag

07/20/17 / #20170207306

Electronic component and switch circuit

In an embodiment, an electronic component includes a compound semiconductor transistor device having a first current electrode, a second current electrode and a control electrode, a die pad, a first lead, a second lead and a third lead. The first lead, the second lead and the third lead are spaced at a distance from the die pad. ... Infineon Technologies Austria Ag

07/20/17 / #20170207123

Method for processing a substrate and an electronic device

According to various embodiments, a method for processing a substrate may include: processing a plurality of device regions in a substrate separated from each other by dicing regions, each device region including at least one electronic component; wherein processing each device region of the plurality of device regions includes: forming a recess into the substrate in the device region, wherein the recess is defined by recess sidewalls of the substrate, wherein the recess sidewalls are arranged in the device region; forming a contact pad in the recess to electrically connect the at least one electronic component, wherein the contact pad has a greater porosity than the recess sidewalls; and singulating the plurality of device regions from each other by dicing the substrate in the dicing region.. . ... Infineon Technologies Austria Ag

07/13/17 / #20170200817

High electron mobility transistor with carrier injection mitigation gate structure

A method includes providing a heterostructure body with a buffer region, and a barrier region disposed on the buffer region, and forming a gate structure for controlling the channel on the heterostructure body, the gate structure having a doped semiconductor region disposed on the heterostructure body, an interlayer disposed on the doped semiconductor region, and a gate electrode disposed on the interlayer. Forming the gate structure includes controlling a doping concentration of the doped semiconductor region such that a portion of the channel adjacent the gate structure is non-conductive at zero gate bias, and controlling electrical and geometrical characteristics of the interlayer based upon a relationship between the electrical and geometrical characteristics of the interlayer and corresponding effects on a static threshold voltage and a dynamic threshold voltage shift of the semiconductor device.. ... Infineon Technologies Austria Ag

07/13/17 / #20170200791

Semiconductor device including an edge construction with straight sections and corner sections

A semiconductor device includes a transistor cell area with active transistor cells including source zones electrically connected to a first load electrode. The source zones have a first conductivity type. ... Infineon Technologies Austria Ag

07/13/17 / #20170200610

Production of an integrated circuit including electrical contact on sic

Production of an integrated circuit including an electrical contact on sic is disclosed. One embodiment provides for production of an electrical contact on an sic substrate, in which a conductive contact is produced on a boundary surface of the sic substrate by irradiation and absorption of a laser pulse on an sic substrate.. ... Infineon Technologies Austria Ag

07/13/17 / #20170197865

Mold, method for producing a mold, and method for forming a mold article

Various embodiments provide a mold including a pyrolytic carbon film disposed at a surface of the mold. Various embodiments relate to using a low pressure chemical vapor deposition process (lpcvd) or using a physical vapor deposition (pvd) process in order to form a pyrolytic carbon film at a surface of a mold.. ... Infineon Technologies Austria Ag

07/06/17 / #20170196118

Power supply and method

A power supply includes a plurality of electronic components including one or more of a rectifier and a switching transistor, an input port configured to receive electrical energy from a power source and a circuit board comprising a cavity. At least one of the rectifier and the switching transistor is embedded in the cavity. ... Infineon Technologies Austria Ag

07/06/17 / #20170194866

Method for operating a power converter circuit and power converter circuit

In accordance with an embodiment, a method includes converting power by a power converter circuit having a plurality of converter cells coupled to a supply circuit. Converting the power includes a plurality of successive activation sequences and, in each activation sequence, activating at least some of the plurality of converter cells at an activation frequency. ... Infineon Technologies Austria Ag

07/06/17 / #20170194484

Transistor with field electrode

Disclosed is a transistor device and a method for producing thereof. The transistor device includes at least one transistor cell, wherein the at least one transistor cell includes: a source region, a body region and a drift region in a semiconductor body; a gate electrode dielectrically insulated from the body region by a gate dielectric; a field electrode dielectrically insulated from the drift region by a field electrode dielectric; and a contact plug extending from a first surface of the semiconductor body to the field electrode and adjoining the source region and the body region.. ... Infineon Technologies Austria Ag

07/06/17 / #20170194230

Water and ion barrier for the periphery of iii-v semiconductor dies

A semiconductor die includes an iii-v semiconductor body having a periphery devoid of active devices, the periphery terminating at an edge face of the semiconductor die. The semiconductor die further includes a seal ring structure above the periphery of the iii-v semiconductor body and a barrier. ... Infineon Technologies Austria Ag

06/29/17 / #20170187292

System and method for a switching circuit

According to an embodiment, a switched-mode power supply (smps) includes a controller including a measurement circuit and a pulse width modulator having an output configured to be coupled to a control node of a switch of the smps. The measurement circuit is configured to determine a phase angle of an ac line input of the smps and modulate a frequency of a control signal at the output of the pulse width modulator based on the phase angle.. ... Infineon Technologies Austria Ag

06/29/17 / #20170187230

Rectification and regulation circuit for a wireless power receiver

A rectification and regulation circuit for a wireless power receiver includes a coil for magnetically coupling to a primary coil of a power transmitter, a full-wave rectifier circuit separate from the power transmitter and a control unit separate from the power transmitter. The full-wave rectifier has a first pair of controllable rectifiers including a first transistor connected to a first terminal of the coil and a second transistor connected to a second terminal of the coil. ... Infineon Technologies Austria Ag

06/29/17 / #20170187217

Capacitor discharging

An example method includes storing a peak voltage level, a valley voltage level, and a frequency of a signal that corresponds to an alternating current (ac) signal across a capacitor; periodically determining whether a current peak voltage level of the signal is different than the stored peak voltage level of the signal or a current valley voltage level of the signal is different than the stored valley voltage level of the signal; determining, based on whether the current peak voltage level of the signal is different than the stored peak voltage level or the current valley voltage level of the signal is different than the stored valley voltage level, whether the ac signal has been removed from the capacitor; and in response to determining that the ac signal has been removed from the capacitor, discharging the capacitor.. . ... Infineon Technologies Austria Ag

06/29/17 / #20170187185

Power factor correction using power factor correction circuitry from deactivated circuit

A method of operating a power supply including first and second power converters connected to a load and a power factor correction circuit connected to the power converters incudes operating the power supply in a normal power mode such that: the first and second power converters and the power factor correction circuit are active, the first and second power converters each drive their respective load, and the power factor correction circuit performs power factor correction for each circuit formed by the first and second power converters and their respective load, and operating the power supply in an auxiliary power mode such that: both the first power converter and the power factor correction circuit are deactivated and the second power converter is active, the second power converter drives its load, and the second power converter performs power factor correction for a circuit formed between the second power converter and its load.. . ... Infineon Technologies Austria Ag

06/29/17 / #20170186863

Method of producing an integrated power transistor circuit having a current-measuring cell

A method for producing an integrated power transistor circuit includes forming at least one transistor cell in a cell array, each transistor cell having a doped region formed in a semiconductor substrate and adjoining a first surface of the semiconductor substrate on a first side of the semiconductor substrate, depositing a contact layer on the first side, structuring the contact layer to form a contact structure from the contact layer, the contact structure having, in a projection of the cell array orthogonal to the first surface, a first section and, outside the cell array, a second section which connects the first section to an interface structure, and forming an electrode structure on and in direct contact with the first section in the orthogonal projection of the cell array, the electrode structure being absent outside the cell array.. . ... Infineon Technologies Austria Ag

06/29/17 / #20170186695

Method of manufacturing a semiconductor device with epitaxial layers and an alignment mark

An alignment mark in a process surface of a semiconductor layer includes a groove with a minimum width of at least 100 μm and a vertical extension in a range 100 nm to 1 μm. The alignment mark further includes at least one fin within the groove at a distance of at least 60 μm to a closest one of inner corners of the groove.. ... Infineon Technologies Austria Ag

06/29/17 / #20170186600

Semiconductor wafer and method

In an embodiment, a method includes treating an edge region of a wafer including a substrate having an upper surface and one or more epitaxial group iii nitride layers arranged on the upper surface of the substrate, so as to remove material including at least one group iii element from the edge region.. . ... Infineon Technologies Austria Ag

06/22/17 / #20170179830

Multiphase regulator with current pattern matching

According to an embodiment, a multiphase regulator includes a plurality of output phases each of which is operable to deliver a phase current through a separate inductor to a load connected to the output phases via the inductors and an output capacitor. A controller is operable to regulate a voltage delivered to the load by adjusting the phase currents delivered to the load by the output phases, monitor the phase currents delivered to the load by the output phases, determine if the monitored phase currents indicate any of the individual output phases, any of the individual inductors or the output capacitor are faulty even if the total current delivered to the load is within specified limits, synchronously switch the output phases which cause ripples in the phase currents, and detect if any of the phase currents fail to have a ripple current pattern that matches an expected ripple current pattern.. ... Infineon Technologies Austria Ag

06/22/17 / #20170179828

Multiphase regulator with phase current testing

According to an embodiment, a multiphase regulator includes a plurality of output phases each of which is operable to deliver a phase current through a separate inductor to a load connected to the output phases via the inductors and an output capacitor. A controller is operable to regulate a voltage delivered to the load by adjusting the phase currents delivered to the load by the output phases, monitor the phase currents delivered to the load by the output phases, test the output phases in a predetermined sequence, and determine if the phase currents respond in a predetermined way.. ... Infineon Technologies Austria Ag

06/22/17 / #20170179009

Semiconductor devices with improved thermal and electrical performance

A device may include a carrier, a semiconductor chip arranged over a first surface of the carrier, and an encapsulation body comprising six side surfaces and encapsulating the semiconductor chip. A second surface of the carrier opposite to the first surface of the carrier is exposed from the encapsulation body. ... Infineon Technologies Austria Ag

06/22/17 / #20170178797

Surface mount inductor for placement over a power stage of a power converter

An electrical conductor of a surface mount inductor includes a first section extending along a first side face of the magnetic core, a second section extending along a second side face of the magnetic core, and a third section connecting the first and second sections and extending through the magnetic core. A first straight lead extends downwards from the first section beyond the bottom main face of the magnetic core, and has an unbent distal end configured for surface mounting to a circuit board. ... Infineon Technologies Austria Ag

06/22/17 / #20170178795

Through-hole inductor for placement over a power stage of a power converter

An electrical conductor of a through-hole inductor includes a first section extending along a first side face of the magnetic core, a second section extending along a second side face of the magnetic core, and a third section connecting the first and second sections and extending through the magnetic core. A first straight lead extends downwards from the first section beyond the bottom main face of the magnetic core, and has an unbent distal end configured for through-hole mounting to a circuit board. ... Infineon Technologies Austria Ag

06/15/17 / #20170170282

Semiconductor wafer and method

In an embodiment, a method includes forming an adhesion promotion layer on at least portions of a conductive surface arranged on a group iii nitride-based semiconductor layer, applying a resist layer to the adhesion promotion layer such that regions of the conductive surface are uncovered by the adhesion promotion layer and the resist layer, applying by electroplating a conductive layer to the regions of the conductive surface uncovered by the adhesion promotion layer and the resist layer, and removing the resist layer and removing the adhesion promotion layer.. . ... Infineon Technologies Austria Ag

06/15/17 / #20170170274

Semiconductor device comprising a first gate trench and a second gate trench

A semiconductor device includes a first gate trench and a second gate trench in a first main surface of a semiconductor substrate. A mesa is arranged between the first gate trench and the second gate trench. ... Infineon Technologies Austria Ag

06/08/17 / #20170163159

Control of asymmetric parallel synchronous rectifiers in power converter topologies

A power converter includes an input power source, a synchronous rectifier and a controller. The synchronous rectifier includes a plurality of actively controlled switches coupled in parallel and configured to rectify current delivered from the input power source to a load. ... Infineon Technologies Austria Ag

06/08/17 / #20170163156

Dynamic voltage transition control methods for switched mode power converters

A method of controlling a voltage regulator includes regulating a voltage output by the voltage regulator to correspond to a target voltage, generating a voltage ramp that starts at a first voltage and ends at a second voltage and responsive to the voltage ramp, modifying the output voltage response of the voltage regulator based on one or more compensation parameters.. . ... Infineon Technologies Austria Ag

06/08/17 / #20170163151

Buck converter electronic driver with enhanced ithd

Methods, devices, techniques, systems, and integrated circuits are disclosed for variably controlling a switch on time for a driver, which may enhance ithd. In one example, a device includes an input voltage sensor configured to detect an input voltage, and a variable switch on time generator, operatively connected to the input voltage sensor to receive a signal indicative of the input voltage. ... Infineon Technologies Austria Ag

06/08/17 / #20170162461

Semiconductor device and method of manufacturing thereof

A semiconductor device is provided. The semiconductor device includes a first semiconductor component having a semiconductor substrate, and a barrier layer disposed at least on or at a portion of the first semiconductor component. ... Infineon Technologies Austria Ag

06/01/17 / #20170155497

Accessing data via different clocks

An example relates to a method for accessing data of a first domain that is driven by a first clock via a second clock, comprising at least one of the following: accessing the data of the first domain via the second clock during a time when the first clock is in a first logical state. An edge indicating a transition from a second logical state to the first logical is used to access data via the first clock, or accessing the data of the first domain via the second clock at edges of the first clock that are synchronized with edges of the second clock.. ... Infineon Technologies Austria Ag

06/01/17 / #20170155342

Multiphase power converter circuit and method

A multiphase power converter circuit includes at least two single phase power converter circuits. Each single phase power converter circuit includes at least one converter series circuit with a number of converter units. ... Infineon Technologies Austria Ag

06/01/17 / #20170155316

System and method for a power conversion system

In accordance with an embodiment, a method of operating a power system includes operating a power converter at a first output power, monitoring a first input voltage at an input port of the power converter. The method further includes upon detecting that the first input voltage drops below a first pre-determined voltage threshold, reducing the first output power of the power converter to a second output power lower than the first output power, and suspending operation of the power converter after the reducing the first output power of the power converter.. ... Infineon Technologies Austria Ag

06/01/17 / #20170154993

Reduced gate charge field-effect transistor

In one implementation, a reduced gate charge field-effect transistor (fet) includes a drift region situated over a drain, a body situated over the drift region, and source diffusions formed in the body. The source diffusions are adjacent a gate trench extending through the body into the drift region and having a dielectric liner and a gate electrode situated therein. ... Infineon Technologies Austria Ag

06/01/17 / #20170154992

Transistor device with increased gate-drain capacitance

Disclosed is a transistor device. The transistor device includes: a semiconductor body with an active region and a pad region; at least one transistor cell including a gate electrode dielectrically insulated from a body region by a gate dielectric, wherein the body region is arranged in the active region; an electrode layer arranged above the pad region and dielectrically insulated from the pad region by a further dielectric; and a gate pad arranged above the electrode layer and electrically connected to the electrode layer and the gate electrode of the at least one transistor cell. ... Infineon Technologies Austria Ag

06/01/17 / #20170154965

Semiconductor device

A semiconductor device includes a semiconductor substrate including, between a bottom side and a top side, a first trench and a second trench extending in a vertical direction, and a contact groove arranged between the first trench and the second trench. The contact groove has a longitudinal extension in a plane perpendicular to the vertical direction. ... Infineon Technologies Austria Ag

06/01/17 / #20170154956

Method of manufacturing superjunction semiconductor devices with a superstructure in alignment with a foundation

By using a single trench mask, first and second trenches are formed that extend from a main surface into a semiconductor layer. A foundation is formed that includes first regions in and/or directly adjoining the first trenches. ... Infineon Technologies Austria Ag

06/01/17 / #20170154856

Chip protection envelope and method

In an embodiment, a chip protection envelope includes a first dielectric layer including at least one organic component having a decomposition temperature of at least 180° c., a semiconductor die embedded in the first dielectric layer, the semiconductor die having a first surface and a thickness t1. A second dielectric layer is arranged on a first surface of the first dielectric layer, the second dielectric layer including a photodefinable polymer composition, and a conductive layer is arranged on the first surface of the semiconductor die and is electrically coupled to the semiconductor die. ... Infineon Technologies Austria Ag

06/01/17 / #20170154831

Electronic component and method

In an embodiment, an electronic component includes a first dielectric layer including an organic component having a decomposition temperature of at least 180° c., a semiconductor die embedded in the first dielectric layer, a second dielectric layer arranged on a first surface of the first dielectric layer, the second dielectric layer including a photo definable polymer composition and defining two or more discrete openings having conductive material, and a first substrate arranged on the second dielectric layer and on the conductive material. One or more contact pads are arranged on an outermost surface of the first substrate.. ... Infineon Technologies Austria Ag

06/01/17 / #20170154813

Self-organizing barrier layer disposed between a metallization layer and a semiconductor region

According to various embodiments, a device may include: a semiconductor region; a metallization layer disposed over the semiconductor region; and a self-organizing barrier layer disposed between the metallization layer and the semiconductor region, wherein the self-organizing barrier layer comprises a first metal configured to be self-segregating from the metallization layer.. . ... Infineon Technologies Austria Ag

05/18/17 / #20170141567

Power device with overvoltage arrester

An example power device includes a semiconductor chip and an arrester element configurable to, in response to a voltage across the arrester element being greater than a threshold voltage, create a current path around an isolation layer configured to electrically isolate the semiconductor chip from a heat sink configured to dissipate heat generated by the semiconductor chip. In this example power device, the threshold voltage is less than a breakdown voltage of the isolation layer.. ... Infineon Technologies Austria Ag

05/11/17 / #20170133934

Methods and apparatus for power supply

Methods and apparatus for a power supply according various aspects of the present invention operate in conjunction with a voltage converter for converting an input voltage to an output voltage. For example, the converter may comprise an output controller configured to generate a control signal, a power mode controller, and an integrated power stage. ... Infineon Technologies Austria Ag

05/11/17 / #20170133474

Semiconductor device having a trench with different electrode materials

A semiconductor device includes a semiconductor body having a front side and a back side, and a trench included in the semiconductor body. The trench extends into the semiconductor body along an extension direction that points from the front side to the back side. ... Infineon Technologies Austria Ag

05/04/17 / #20170126140

Switch-mode power supply current monitoring with over current and overload protection

A device for current protection comprises a switch-mode power supply controller. The switch-mode power supply controller includes an inrush current comparator that is arranged to compare a primary winding current with an inrush current threshold at least during at least one of a startup phase or a burst phase. ... Infineon Technologies Austria Ag

05/04/17 / #20170125580

Latch-up resistant transistor

Disclosed is a method for producing a transistor device and a transistor device. The method includes: forming a source region of a first doping type in a body region of a second doping type in a semiconductor body; and forming a low-resistance region of the second doping type adjoining the source region in the body region. ... Infineon Technologies Austria Ag

05/04/17 / #20170125572

Semiconductor device

In an embodiment, a semiconductor device includes an enhancement mode group iii-nitride-based high electron mobility transistor (hemt) including a drain, a gate, a barrier layer, a channel layer, a barrier layer arranged on the channel layer, and a heterojunction formed between the barrier layer and the channel layer and capable of supporting a two-dimensional electron gas (2deg). At least one of a thickness and a composition of the barrier layer is configured to decrease a 2deg density in a channel region compared with a 2deg density outside of the channel region, wherein the channel region is arranged under the gate and extends a distance d beyond a drain-sided gate edge.. ... Infineon Technologies Austria Ag

05/04/17 / #20170125562

Iii-nitride bidirectional device

There are disclosed herein various implementations of a iii-nitride bidirectional device. Such a bidirectional device includes a substrate, a back channel layer situated over the substrate, and a device channel layer and a device barrier layer situated over the back channel layer. ... Infineon Technologies Austria Ag

05/04/17 / #20170125560

Semiconductor device

A semiconductor device includes transistor cells formed inside a semiconductor body. First and second semiconductor well regions have second conductivity type dopants and are arranged external of the transistor cells. ... Infineon Technologies Austria Ag

05/04/17 / #20170125520

Method of manufacturing a semiconductor device with field electrode structures, gate structures and auxiliary diode structures

A method of manufacturing a semiconductor device includes: forming field electrode structures extending in a direction vertical to a first surface in a semiconductor body; forming cell mesas from portions of the semiconductor body between the field electrode structures, including body zones forming first pn junctions with a drift zone; forming gate structures between the field electrode structures and configured to control a current flow through the body zones; and forming auxiliary diode structures with a forward voltage lower than the first pn junctions and electrically connected in parallel with the first pn junctions, wherein semiconducting portions of the auxiliary diode structures are formed in the cell mesas.. . ... Infineon Technologies Austria Ag

05/04/17 / #20170125345

Semiconductor chip with integrated series resistances

A semiconductor chip has a semiconductor body with a bottom side and a top side arranged distant from the bottom side in a vertical direction, an active and a non-active transistor region, a drift region formed in the semiconductor body, a contact terminal for externally contacting the semiconductor chip, and a plurality of transistor cells formed in the semiconductor body. Each of the transistor cells has a first electrode. ... Infineon Technologies Austria Ag

05/04/17 / #20170125315

System and method for dual-region singulation

A semiconductor die includes a semiconductor circuit disposed within or over a substrate. A conductive contact pad is disposed over the substrate outside the semiconductor circuit. ... Infineon Technologies Austria Ag

04/27/17 / #20170117882

Oscillator circuit

In an oscillator circuit, provision is made of a multivibrator for generating an oscillator signal. Furthermore, provision is made of a supply circuit (100) having a first current path (101), a second current path (102) and a third current path (103). ... Infineon Technologies Austria Ag

04/27/17 / #20170117812

Delta-sigma modulation for power converter control

A flyback converter is described that in some examples includes an integrated circuit that includes a delta-sigma converter and a cascaded integrator-comb filter configured to determine: a proportional factor, an integral factor, and a derivative factor associated with a secondary-side voltage across a secondary-side winding of the converter. The integrated circuit uses each factor to control a secondary switching element to perform synchronous rectification. ... Infineon Technologies Austria Ag

04/27/17 / #20170117208

Thermal interface material having defined thermal, mechanical and electric properties

An electronic component comprising an electrically conductive carrier, an electronic chip on the carrier, an encapsulant encapsulating part of the carrier and the electronic chip, and an electrically insulating and thermally conductive interface structure, in particular covering an exposed surface portion of the carrier and a connected surface portion of the encapsulant, wherein the interface structure has a compressibility in a range between 1% and 20%, in particular in a range between 5% and 15%.. . ... Infineon Technologies Austria Ag

04/20/17 / #20170110981

Power conversion method and power converter

A power converter and a method for operating a power converter are disclosed. In an embodiment the method for operating a power converter includes maintaining a first electronic switch switched off and an inductor demagnetized for a pause period before at least one of the plurality of drive cycles, pre-magnetizing the inductor connected in series with the first electronic switch, and discharging a parasitic capacitance of the first electronic switch using energy stored in the inductor by pre-magnetizing. ... Infineon Technologies Austria Ag

04/20/17 / #20170110573

Method of manufacturing a semiconductor device with trench gate by using a screen oxide layer

A screen oxide layer is formed on a main surface of a semiconductor layer and a passivation layer is formed on the screen oxide layer. A gate trench is formed in a portion of the semiconductor layer exposed by a mask opening in a trench mask that comprises the passivation layer. ... Infineon Technologies Austria Ag

04/20/17 / #20170110448

Bidirectional normally-off devices and circuits

Circuits and devices for bidirectional normally-off switches are described. A circuit for a bidirectional normally-off switch includes a depletion mode transistor and an enhancement mode transistor. ... Infineon Technologies Austria Ag

04/20/17 / #20170110331

Methods for forming semiconductor devices

A method for forming a semiconductor device includes etching, in a masked etching process, through a layer stack located on a surface of a semiconductor substrate to expose the semiconductor substrate at unmasked regions of the layer stack. The method further includes etching, in a selective etching process, at least a first layer of the layer stack located adjacently to the semiconductor substrate. ... Infineon Technologies Austria Ag

04/13/17 / #20170104078

Semiconductor device comprising a field electrode

A semiconductor device is manufactured by forming a gate electrode adjacent to a body region in a semiconductor substrate, forming a field plate trench in a main surface of the substrate, the field plate trench having an extension length in a first direction parallel to the main surface, and forming a field electrode and a field dielectric layer in the field plate trench so that the field electrode is insulated from an adjacent drift zone by the field dielectric layer. The extension length of the field plate trench in the first direction is less than double an extension length of the field electrode in a second direction that is perpendicular to the first direction and is parallel to the main surface. ... Infineon Technologies Austria Ag

04/13/17 / #20170104076

Semiconductor device

In an embodiment, a semiconductor device includes a group iii-nitride-based high electron mobility transistor (hemt) configured as a bidirectional switch. The group iii nitride-based hemt includes a first input/output electrode, a second input/output electrode, a gate structure arranged between the first input/output electrode and the second input/output electrode, and a field plate structure.. ... Infineon Technologies Austria Ag

04/13/17 / #20170103978

Switch circuit, semiconductor device and method

In an embodiment, a switch circuit includes a bidirectional switch including a first input/output node, a second input/output node, a first diode and a second diode. The first diode and the second diode are coupled anti-serially between the first input/output node and the second input/output node.. ... Infineon Technologies Austria Ag

04/06/17 / #20170098993

Circuitry for power factor correction and methods of operation

A circuit is proposed comprising (i) a first switching path comprising at least one electronic switch, wherein the first switching path can turn off in both directions and can turn on in both directions, and (ii) a second switching path comprising two electronic switches and at least one capacitance, wherein one diode path per electronic switch is embodied in parallel with the electronic switch or in series with the electronic switch. Additionally, a method for operating such a circuit is specified.. ... Infineon Technologies Austria Ag

04/06/17 / #20170098598

Functionalized interface structure

An electronic component, the electronic component comprising an electrically conductive carrier, an electronic chip on the carrier, an encapsulant encapsulating part of the carrier and the electronic chip, and an electrically insulating and thermally conductive interface structure covering an exposed surface portion of the carrier and a connected surface portion of the encapsulant and being functionalized for promoting heat dissipation via the interface structure on a heat dissipation body.. . ... Infineon Technologies Austria Ag

04/06/17 / #20170097674

Power management for datacenter power architectures

A method of managing system resources managing resource utilization for a system board that includes a plurality of processors, memory associated with each of the processors, a plurality of voltage regulators configured to regulate voltages applied to the processors and memories, and a board manager configured to manage resources of the system board includes communicating operating condition information from the board manager to controllers of the voltage regulators independent of the processors also communicating with the controllers, the operating condition information received by each controller indicating a computing load for the processor regulated by the voltage regulator controlled by that controller. The method further includes controlling the voltage regulators based on the operating condition information, so as to set the power limit of the voltage regulators in accordance with the processing load indicated by the operating condition information communicated by the board manager to the controllers for each processor.. ... Infineon Technologies Austria Ag

03/30/17 / #20170094842

Power supply and method

In an embodiment, a power supply includes a casing enclosing a circuit for power conversion including one or more heat generating electronic components mounted on a circuit board, an input port configured to receive electrical energy from a power source, an output port configured to supply electrical energy to an external load, and a dielectric liquid disposed in the casing. The dielectric liquid is thermally coupled with the one or more heat generating electronic components, the circuit board and the casing. ... Infineon Technologies Austria Ag

03/30/17 / #20170092777

Semiconductor device and method

In an embodiment, a semiconductor device includes a substrate, a plurality of columnar drift zones including a group iii-nitride having a first conductivity type and a plurality of charge compensation structures. The columnar drift zones and the compensation structures are positioned alternately on a surface of the substrate.. ... Infineon Technologies Austria Ag

03/30/17 / #20170092753

Water and ion barrier for iii-v semiconductor devices

A semiconductor device includes an iii-v semiconductor body, a device formed in the iii-v semiconductor body, one or more metal layers above the iii-v semiconductor body, an interlayer dielectric adjacent each metal layer, a plurality of vias electrically connecting each metal layer to the device formed in the iii-v semiconductor body, and a barrier disposed below the uppermost metal layer and in or above the lowermost interlayer dielectric. The barrier is configured to prevent water, water ions, sodium ions and potassium ions from diffusing into the interlayer dielectric or portion of the interlayer dielectric immediately below the barrier. ... Infineon Technologies Austria Ag

03/30/17 / #20170092717

Superjunction semiconductor device with oppositely doped semiconductor regions formed in trenches and method of manufacturing

A trench etch mask is formed on a process surface of a semiconductor layer. By using the trench etch mask, both first trenches and second trenches are formed that extend from the process surface into the semiconductor layer. ... Infineon Technologies Austria Ag

03/30/17 / #20170092716

Transistor device

A transistor device includes: a first source region and a first drain region spaced apart from each other in a first direction of a semiconductor body; at least two gate regions arranged between the first source region and the first drain region and spaced apart from each other in a second direction of the semiconductor body; at least one drift region adjoining the first source region and electrically coupled to the first drain region; at least one compensation region adjoining the at least one drift region and the at least two gate regions; a mosfet including a drain node connected to the first source region, a source node connected to the at least two gate region, and a gate node. Active regions of the mosfet are integrated in the semiconductor body in a device region that is spaced apart from the at least two gate regions.. ... Infineon Technologies Austria Ag

03/30/17 / #20170092631

Interconnection structure, led module and method

In an embodiment, an interconnection structure includes a first semiconductor device including a conductive stud, a second device including a contact pad, an adhesive layer including an organic component arranged between a distal end of the conductive stud and the contact pad, the adhesive layer coupling the conductive stud to the contact pad, and a conductive layer extending from the conductive stud to the contact pad. The conductive layer has a melting point of at least 600° c.. ... Infineon Technologies Austria Ag

03/23/17 / #20170085183

System and method for a switched-mode power supply having a transformer with a plurality of primary windings

In accordance with an embodiment, a switched-mode power supply (smps) includes a transformer having a plurality of windings sharing a common core and a plurality of primary stages coupled in series. Each of the plurality of primary stages include a winding of the plurality of windings, a switch having a first node coupled to a first terminal of the winding, and a first capacitor coupled between a second terminal of the winding and a second node of the switch.. ... Infineon Technologies Austria Ag

03/23/17 / #20170085174

Output capacitance calculation and control in a power supply

Controller circuitry controls power supply circuitry to produce an output voltage. During operation of the power supply circuitry to produce the output voltage, the controller circuitry calculates a magnitude of capacitance of output capacitor circuitry in the power supply. ... Infineon Technologies Austria Ag

03/23/17 / #20170084734

Semiconductor devices and a method for forming semiconductor devices

A semiconductor device includes a plurality of drift regions of a vertical field effect transistor arrangement arranged in a semiconductor substrate. The plurality of drift regions has a first conductivity type. ... Infineon Technologies Austria Ag

03/23/17 / #20170084606

Integrated circuit with a plurality of transistors and at least one voltage limiting structure

An integrated circuit includes a semiconductor body with a first semiconductor layer, an insulation layer on the first semiconductor layer, and a second semiconductor layer on the insulation layer. The integrated circuit further includes a plurality of transistors each including a load path and a control node the load paths are connected in series, and the plurality of transistors are at least partially integrated in the second semiconductor layer. ... Infineon Technologies Austria Ag

03/16/17 / #20170077923

High speed tracking current sense system

A tracking current sensing system is described. The system may include a first electrical sensing element configured to receive a first electrical signal and a second electrical signal from a high side switch of a half-bridge circuit and output an electrical signal based on the received electrical signals. ... Infineon Technologies Austria Ag

03/16/17 / #20170077227

Needle field plate mosfet with mesa contacts and conductive posts

There are disclosed herein various implementations of a vertical metal-oxide-semiconductor field-effect transistor (mosfet). Such a vertical mosfet includes a semiconductor substrate having a drift region situated over a drain, a gate trench and needle field plates extending into the drift region, and source regions situated in respective mesas. ... Infineon Technologies Austria Ag

03/16/17 / #20170074912

Metal shunt resistor

In one embodiment, a shunt resistor is provided, comprising two terminals, a semiconductor substrate embodying at least one temperature sensor comprising at least a temperature sensitive element comprising at least one pn-junction, and at least two metal layers above the semiconductor substrate, at least the upper of the metal layer comprising a path that electrically connects the two terminals, whereby the temperature sensor is below and within the periphery of the upper metal layer.. . ... Infineon Technologies Austria Ag

03/09/17 / #20170070150

Voltage adjustment system and method for parallel-stage power converter

A power system includes a first dc-dc converter circuit and a second dc-dc converter circuit, each including a power input terminal and a sensor. The sensor includes a sensor output terminal and at least one of a current sensor and a voltage sensor. ... Infineon Technologies Austria Ag

03/09/17 / #20170069712

Semiconductor wafer, implantation apparatus for implanting protons and method for forming a semiconductor device

A method for forming a semiconductor device includes determining at least one electrical parameter for each semiconductor device of a plurality of semiconductor devices to be formed in a semiconductor wafer. The method further includes implanting doping ions into device areas of the semiconductor wafer used for forming the plurality of semiconductor devices with laterally varying implantation doses based on the at least one electrical parameter of the plurality of semiconductor devices.. ... Infineon Technologies Austria Ag

03/02/17 / #20170063243

Voltage converter and voltage conversion method

Disclosed is a voltage converter and a method. The voltage converter includes: an input, an output, and a transformer including a primary winding and a secondary winding; a primary side circuit comprising at least one switch and coupled between the input and the primary winding; a secondary side control circuit coupled to the output. ... Infineon Technologies Austria Ag

03/02/17 / #20170063095

Power converter circuit with ac output

A power converter circuit includes output terminals configured to receive an external voltage. A series circuit with a number of converter units is connected between the output terminals of the power converter circuit. ... Infineon Technologies Austria Ag

03/02/17 / #20170062605

Semiconductor device

The present disclosure provides a semiconductor device, which includes a compensation area which includes p-regions and n-regions, and a plurality of transistor cells on the compensation area. Each of the plurality of transistor cells includes a source region, a body region, a gate and an interlayer dielectric, and a source metallization layer arranged on the interlayer dielectric. ... Infineon Technologies Austria Ag

03/02/17 / #20170062587

Method of manufacturing a semiconductor device by plasma doping

A method of manufacturing a semiconductor device includes forming a superjunction field effect transistor by: forming trenches in a semiconductor body from a first side: forming charge compensation layers by doping parts of the semiconductor body via sidewalls of the trenches by introducing dopants by plasma doping; after forming the charge compensation layers, widening a profile of the dopants introduced by plasma doping by diffusion caused by a thermal heating process; and forming a drain contact at a second side opposite to the first side. A surface concentration of the dopants introduced by plasma doping via a unit area of the sidewalls is at least five times larger than a concentration of dopants in a mesa region of the semiconductor body between neighboring trenches which corresponds to n, wherein n is a net doping of the semiconductor body between the neighboring trenches.. ... Infineon Technologies Austria Ag

03/02/17 / #20170062562

Method for producing a semiconductor device having a beveled edge termination

A method for producing a semiconductor device includes forming a trench that defines a closed loop in a semiconductor body and extends from a first surface into the semiconductor body. The trench has at least one sidewall that is beveled relative to a vertical direction of the semiconductor body. ... Infineon Technologies Austria Ag

02/23/17 / #20170054368

Multi-topology power converter controller

A dc/dc voltage conversion system includes a first voltage converter operable to convert a first dc voltage rail to a second dc voltage rail different than the first dc voltage rail, and a second voltage converter operable to convert the second dc voltage rail to a third dc voltage rail lower than the second dc voltage rail. The second voltage converter is a multiphase converter having a plurality of power stages, each power stage providing a phase of the multiphase converter and configured to conduct current. ... Infineon Technologies Austria Ag

02/23/17 / #20170054012

Semiconductor device including a vertical pn junction between a body region and a drift region

A semiconductor device includes a drift region extending from a first surface into a semiconductor portion. A body region between two portions of the drift region forms a first pn junction with the drift region. ... Infineon Technologies Austria Ag

02/23/17 / #20170053833

Methods for producing semiconductor devices

A method for producing a semiconductor device in accordance with various embodiments may include providing a semiconductor workpiece attached to a first carrier; dicing the semiconductor workpiece and the carrier so as to form at least one individual semiconductor chip; mounting the at least one semiconductor chip with a side facing away from the carrier, to an additional carrier.. . ... Infineon Technologies Austria Ag

02/16/17 / #20170047854

Adjustable blanking time for overload protection for switch-mode power supplies

A blanking time for a switch-mode power supply controller includes a first blanking time interval and a second blanking time interval. During the first blanking time interval, the time to charge the feedback voltage at the feedback input of the switch-mode power supply is measured, and a timer setting time is stored based on the measured time. ... Infineon Technologies Austria Ag

02/16/17 / #20170047846

Multi-mode quasi resonant converter

Techniques are described to adjust an amount of time a switch is turned off to control power delivered to a load. In some examples, the amount of time the switch is off includes a delay count value and a set count value based on an output power level. ... Infineon Technologies Austria Ag

02/16/17 / #20170047841

System and method for a switch having a normally-on transistor and a normally-off transistor

In accordance with an embodiment, a method includes conducting a reverse current through a first switch that includes a normally-on transistor coupled in series with a normally-off transistor between a first switch node and a second switch node. While conducting the reverse current, the first switch is turned-off by turning-off the normally-off transistor via a control node of the normally-off transistor and reducing a drive voltage of the normally-on transistor by decreasing a voltage between the control node of the normally-on transistor and a reference node of the normally-on transistor. ... Infineon Technologies Austria Ag

02/16/17 / #20170047324

Method of manufacturing an integrated circuit

A method of manufacturing an integrated circuit includes: growing an epitaxial layer on a process surface of a base substrate; forming, by processes applied to an exposed first surface of the epitaxial layer, first transistor cells in the epitaxial layer, each first transistor cell including a first gate electrode; and forming, by processes applied to a surface opposite to the first surface, second transistor cells, each second transistor cell including a second gate electrode.. . ... Infineon Technologies Austria Ag

02/16/17 / #20170047315

Method of manufacturing a multi-chip semiconductor power device

A method of manufacturing a semiconductor device includes mounting a first semiconductor power chip on a first carrier, mounting a second semiconductor power chip on a second carrier, bonding a contact clip to the first semiconductor power chip and to the second semiconductor power chip, and mounting a third semiconductor chip over the contact clip.. . ... Infineon Technologies Austria Ag

02/09/17 / #20170040312

Avalanche-rugged quasi-vertical hemt

A semiconductor device includes a semiconductor body including first and second lateral surfaces. A first device region includes a drift region of a first conductivity type, and a drift current control region of a second conductivity type being spaced apart from the second lateral surface by the drift region. ... Infineon Technologies Austria Ag

02/02/17 / #20170033789

Conveying information between high side and low side driver

A circuit for conveying information from a sender component to a receiver component is provided. The sender component is a high side component and the receiver component is a low side component or the sender component is a low side component and the receiver component is a high side component. ... Infineon Technologies Austria Ag

02/02/17 / #20170033210

Breakdown resistant hemt substrate and device

A compound semiconductor device structure having a main surface and a rear surface includes a silicon substrate including first and second substrate layers. The first substrate layer extends to the rear surface. ... Infineon Technologies Austria Ag

01/26/17 / #20170025523

Semiconductor component and manufacturing method therefor

A semiconductor component includes a semiconductor chip including a first semiconductor body comprising silicon and a second semiconductor body attached to an upper side of the first semiconductor body and comprising a iii-nitride, and a lead-frame connected with the first semiconductor body. A thickness ratio between a thickness of the semiconductor chip and a thickness of the lead-frame is smaller than 1.3 or larger than 1.9.. ... Infineon Technologies Austria Ag

01/19/17 / #20170019096

System and method for a switching transistor

In accordance with an embodiment, a method of operating a semiconductor switch coupled to an inductor includes turning on the semiconductor switch by applying a turn-on voltage to between a gate of the semiconductor switch and a low current terminal connected to a reference node of the semiconductor switch, the low current terminal separate from a high current reference terminal connected to the reference node of the semiconductor switch, and the semiconductor switch comprises a first input capacitance to transconductance ratio. The method further includes turning off the semiconductor switch by applying a turn-off voltage to the gate of the semiconductor switch, wherein a ratio of a total capacitance at an output node of the semiconductor switch to a gate-drain capacitance is greater than a first ratio per watt of power being handled by a load coupled to the semiconductor switch.. ... Infineon Technologies Austria Ag

01/19/17 / #20170019095

System and method for operating a switching transistor

In accordance with an embodiment, a method of operating a switching transistor includes turning-off the switching transistor by transferring charge from a gate-drain capacitance of the switching transistor to a charge storage device, and turning-on the switching transistor by transferring charge from the charge storage device to a gate of the switching transistor. Turning off the switching transistor includes hard-switching and turning-on the switching transistor includes soft-switching.. ... Infineon Technologies Austria Ag

01/19/17 / #20170019043

Controller for a free-running motor

A controller for controlling a multi-phase motor is described. The controller may be configured to measure a plurality of phase voltages of the multi-phase motor when the multi-phase motor is in an uncontrolled state. ... Infineon Technologies Austria Ag

01/19/17 / #20170018544

Semiconductor device comprising a clamping structure

Semiconductor device with a semiconductor body that includes a clamping structure including a pn junction diode and a schottky junction diode serially connected back to back between a first contact and a second contact. A breakdown voltage of the pn junction diode is greater than 100 v and a breakdown voltage of the schottky junction diode is greater than 10 v.. ... Infineon Technologies Austria Ag

01/12/17 / #20170012538

Converter for supplying power to a load

An example relates to a method for operating a converter comprising (i) determining whether a valley for switching the converter in a quasi-resonant mode is available within a predetermined time range; (ii) selecting the valley if it is available within the predetermined time range; and (iii) changing the mode for operating the converter if the valley is not available within the predetermined time range.. . ... Infineon Technologies Austria Ag

01/12/17 / #20170012537

Input voltage detection for a converter

An example relates to a method for operating a converter comprising a primary side of a transformer and a secondary side of the transformer, wherein a switching element is used for conveying energy from the primary side to the secondary side, the method comprising (i) determining a voltage drop across the primary side of the transformer; (ii) determining at least one additional voltage drop across at least one component of the converter's primary side; and (iii) determining an input voltage at the converter via the voltage drops.. . ... Infineon Technologies Austria Ag

01/12/17 / #20170012002

Methods of manufacturing a semiconductor device by forming a separation trench

A method of manufacturing a semiconductor device includes forming a separation trench into a first main surface of a semiconductor substrate and removing substrate material from a second main surface of the semiconductor substrate, so as to thin the substrate to a thickness of less than 100 μm, the second main surface being opposite to the first main surface, so as to uncover a bottom side of the trench. Additional methods of manufacturing semiconductor devices are provided.. ... Infineon Technologies Austria Ag

01/12/17 / #20170011927

Controlling the reflow behaviour of bpsg films and devices made thereof

A method for depositing an insulating layer includes performing a primary deposition over a sidewall of a feature by depositing a layer of silicate glass using a silicon source at a first flow rate and a dopant source at a second flow rate. A ratio of the flow of the dopant source to the flow of the silicon source is a first ratio. ... Infineon Technologies Austria Ag

01/05/17 / #20170005192

Semiconductor device and methods for forming a semiconductor device

A semiconductor device includes a plurality of compensation regions of a vertical electrical element arrangement, a plurality of drift regions of the vertical electrical element arrangement and a non-depletable doping region. The compensation regions of the plurality of compensation regions are arranged in a semiconductor substrate of the semiconductor device. ... Infineon Technologies Austria Ag

01/05/17 / #20170005171

Semiconductor device including a contact structure directly adjoining a mesa section and a field electrode

A semiconductor device includes a gate structure that extends from a first surface into a semiconductor portion and that surrounds a transistor section of the semiconductor portion. A field plate structure includes a field electrode and extends from the first surface into the transistor section. ... Infineon Technologies Austria Ag

01/05/17 / #20170005164

Charge compensation device and manufacturing therefor

A charge-compensation semiconductor device includes a semiconductor body having a first surface, a lateral edge delimiting the semiconductor body in a horizontal direction substantially parallel to the first surface, an active area, and a peripheral area arranged between the active area and the lateral edge. A source metallization is arranged on the first surface. ... Infineon Technologies Austria Ag

01/05/17 / #20170005091

Semiconductor devices and method for forming semiconductor devices

A semiconductor device includes a semiconductor laminar structure arranged on a semiconductor substrate. The semiconductor laminar structure includes a first doping region of a field effect transistor structure and at least a part of a body region of the field effect transistor structure. ... Infineon Technologies Austria Ag

01/05/17 / #20170005025

Electronic device and method of manufacturing the same

Various embodiments provide an electronic device, wherein the electronic device comprises a mounting surface configured to mount the electronic device to an external structure and having a first size; a backside electrode having a second size and having arranged thereon a die electrically connected to the backside electrode; wherein the first size is at least three times the second size.. . ... Infineon Technologies Austria Ag








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