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Kilopass Technology Inc patents


Recent patent applications related to Kilopass Technology Inc. Kilopass Technology Inc is listed as an Agent/Assignee. Note: Kilopass Technology Inc may have other listings under different names/spellings. We're not affiliated with Kilopass Technology Inc, we're just tracking patents.

ARCHIVE: New 2018 2017 2016 2015 2014 2013 2012 2011 2010 2009 | Company Directory "K" | Kilopass Technology Inc-related inventors


Vertical thyristor cell and memory array with silicon germanium base regions

Memory arrays of vertical thyristor memory cells with sige base layers are described. The composition of the sige can be constant or varied depending upon the desired characteristics of the memory cells. ... Kilopass Technology Inc

Mtp-thyristor memory cell circuits and methods of operation

An mtp (many times programmable) memory cell for integrated circuit memory arrays is described. The cell includes an mtp device and a thyristor interconnected so that the mtp device triggers the thyristor to turn on during a read or verify operation. ... Kilopass Technology Inc

Vertical thyristor memory array and memory array tile therefor

In a vertical thyristor memory cell array with each of the thyristor memory cells connected to bit and word lines, the bit lines are connected to the inputs of multiplexers which are connected to sense amplifiers. The vertical memory cells, multiplexers and sense amplifiers are arranged in described mats (memory array tiles) which have very packing efficiency compared to conventional drams, especially in current 2x-nm process technology. ... Kilopass Technology Inc

Ddr controller for thyristor memory cell arrays

A vertical thyristor memory cell array with each of the thyristor memory cells connected to bit and word lines, the bit lines are connected to the inputs of multiplexers which are connected to sense amplifiers, is adaptable to lpddr4 requirements. The lack of refresh operations for the vertical thyristor memory cell array is not apparent to a lpddr4 memory controller so that a standard or an lpddr4 memory controller which omits refresh operations and specifically adapted for a vertical thyristor memory can control the transfer of data to and from the plurality of vertical thyristor memory integrated circuits.. ... Kilopass Technology Inc

Memory disturb recovery scheme for cross-point memory arrays

Methods and systems are described herein for determining if bit cell read or write rates require a refresh of the accessed or neighboring bit cells. The refresh of vlt memory bit cells that undergo a high frequency of page address read operations and write operations helps to maintain integrity of data stored in the vlt memory bit cells. ... Kilopass Technology Inc

Voltage reference circuits with programmable temperature slope and independent offset control

Voltage reference circuits configured to generate a voltage reference with a programmable temperature slope are disclosed. By combining and programming a ptat (proportional to absolute temperature) voltage generation circuit and a ctat (complementary to absolute temperature) voltage generation circuit, desired temperature slope for the voltage reference is obtained. ... Kilopass Technology Inc

Thyristor volatile random access memory and methods of manufacture

Memory cells are formed with vertical thyristors to create a volatile memory array. Power consumption in such arrays is reduced or controlled with various techniques including encoding the data stored in the arrays.. ... Kilopass Technology Inc

Protection circuit for integrated circuit die-let after scribe cut

A protection circuit for an integrated circuit product die or die-let (die-let) is responsive to whether the die-let has undergone a dicing operation or not. A test circuit on the die-let's semiconductor wafer can test and/or configure the die-let. ... Kilopass Technology Inc

High-speed differential current sensing of preprogrammed nvm cells

A differential current sensing circuit architecture is used with an integrated circuit nvm memory block in which a selected memory cell and a related complementary memory cell are accessed at the same time for reading. The circuit architecture is used not only for normal operations for reading the logic states of a selected memory cell and its complementary memory cell after programming, but also for reading the logic states of a selected memory cell and its complementary memory cell before programming for the detecting of faults in memory cells.. ... Kilopass Technology Inc

Circuit for low-dropout regulator output

An output circuit at the output of an ldo regulator has two fets (field-effect transistors), a current source and a capacitor. The first fet is connected to the ldo output and a second voltage supply. ... Kilopass Technology Inc

High density vertical thyristor memory cell array with improved isolation

Isolation between vertical thyristor memory cells in an array is improved with isolation regions between the vertical thyristor memory cells. The isolation regions are formed by electrically isolating cores surrounded by insulating material, such as silicon dioxide, in trenches between the memory cells. ... Kilopass Technology Inc

Methods of reading and writing data in a thyristor random access memory

A volatile memory array using vertical thyristors is disclosed together with methods of operating the array to read data from and write data to the array.. . ... Kilopass Technology Inc

Three-transistor otp memory cell

An otp (one-time programmable) memory cell in an array has a programming mosfet and symmetrically placed access transistors on either side of the programming mosfet. The balanced layout of the memory cell improves photolithographic effects with a resulting improved process results. ... Kilopass Technology Inc

Thyristor memory cell with assist device

A vertical thyristor memory array including: a vertical thyristor memory cell, the vertical thyristor memory cell including: a p+ anode; an n-base located below the p+ anode; a p-base located below the n-base; a n+ cathode located below the p-base; an isolation trench located around the vertical thyristor memory cell; an assist gate located in the isolation trench adjacent the n-base wherein an entire vertical height of the assist gate is positioned within an entire vertical height of the n-base.. . ... Kilopass Technology Inc

11/09/17 / #20170323891

Thyristor volatile random access memory and methods of manufacture

A volatile memory array using vertical thyristors is disclosed together with methods of fabricating the array.. . ... Kilopass Technology Inc

08/10/17 / #20170229465

Methods and systems for reducing electrical disturb effects between thyristor memory cells using buried metal cathode lines

Methods and systems for reducing electrical disturb effects between thyristor memory cells in a memory array are provided. Electrical disturb effects between cells are reduced by using a material having a reduced minority carrier lifetime as a cathode line that is embedded within the array. ... Kilopass Technology Inc

08/10/17 / #20170229464

Methods and systems for reducing electrical disturb effects between thyristor memory cells using heterostructured cathodes

Methods and systems for reducing electrical disturb effects between thyristor memory cells in a memory array are provided. Electrical disturb effects between cells are reduced by using a material having a reduced minority carrier lifetime as a cathode line that is embedded within the array. ... Kilopass Technology Inc

08/10/17 / #20170229306

Vertical thyristor memory with minority carrier lifetime reduction

Apparatus and methods for reducing minority carriers in a memory array are described herein. Minority carriers diffuse between on cells and off cells, causing disturbances during write operation as well as reducing the retention lifetime of the cells. ... Kilopass Technology Inc

02/23/17 / #20170053927

One-time programmable memory and method for making the same

A one time programmable nonvolatile memory formed from metal-insulator semiconductor cells. The cells are at the crosspoints of conductive gate lines and intersecting lines formed in a semiconductor substrate. ... Kilopass Technology Inc

01/26/17 / #20170025414

Thyristor volatile random access memory and methods of manufacture

A volatile memory array using vertical thyristors is disclosed together with methods of fabricating the array.. . ... Kilopass Technology Inc

01/26/17 / #20170025186

Reduced power read sensing for one-time programmable memories

A low power consuming read circuit for a memory array is disclosed. The circuit is particularly useful in applications where oxide breakdown one-time programmable memory is integrated into a system having low power available from the power sources supplying the system.. ... Kilopass Technology Inc

01/26/17 / #20170025163

Methods of retaining and refreshing data in a thyristor random access memory

A volatile memory array using vertical thyristors is disclosed together with methods of operating the array to read, write, retain and refresh data stored therein.. . ... Kilopass Technology Inc

01/19/17 / #20170018299

Mtp-thyristor memory cell circuits and methods of operation

An mtp (many times programmable) memory cell for integrated circuit memory arrays is described. The cell includes an mtp device and a thyristor interconnected so that the mtp device triggers the thyristor to turn on during a read or verify operation. ... Kilopass Technology Inc

01/12/17 / #20170011781

Semiconductor memory sensing architecture

A circuit arrangement and method of reading the logic state of a memory cell in an array of semiconductor memory cells. A data memory cell selected from the array drives a current on a first data bit line in a read operation. ... Kilopass Technology Inc








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