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Nvidia Corporation patents


Recent patent applications related to Nvidia Corporation. Nvidia Corporation is listed as an Agent/Assignee. Note: Nvidia Corporation may have other listings under different names/spellings. We're not affiliated with Nvidia Corporation, we're just tracking patents.

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Safe communication mode for a high speed link

A transmitter for a high speed serial communications link, a serial communications link, and a receiver for a high speed serial communications link are disclosed herein. In one embodiment, the transmitter includes: (1) a communications interface connected to a transmission medium having multiple lanes, and (2) a safe mode circuit coupled to the communications interface and configured to send data over the transmission medium in a safe mode, wherein in the safe mode at least one of the lanes is dedicated to transmitting a link detect signal for link detection.. ... Nvidia Corporation

Finite aperture omni-directional stereo light transport

In various embodiments, a finite aperture omni-directional camera is modeled by aligning a finite aperture lens and focal point with the omni-directional part of the projection. For example, each point on an image plane maps to a direction in camera space. ... Nvidia Corporation

Supply-voltage control for device power management

One embodiment provides a method for reducing leakage current in device logic having an operational supply-voltage threshold, a nonzero data-retention supply voltage threshold, and two or more on-die transistor switches to switchably connect a voltage source to the device logic. After the logic enters an idle period, one or more of the switches are opened to lower a supply voltage oldie logic below the operational supply-voltage threshold hut above the data-retention supply-voltage threshold. ... Nvidia Corporation

Hybrid frustum traced shadows systems and methods

Systems and methods that facilitate efficient and effective shadow image generation are presented. In one embodiment, a hard shadow generation system comprises a compute shader, pixel shader and graphics shader. ... Nvidia Corporation

Selective poisoning of data during runahead

Embodiments related to selecting a runahead poison policy from a plurality of runahead poison policies during microprocessor operation are provided. The example method includes causing the microprocessor to enter runahead upon detection of a runahead event and implementing a first runahead poison policy selected from a plurality of runahead poison policies operative to manage runahead poison injection during runahead. ... Nvidia Corporation

Method and system for distributed processing, rendering, and displaying of content

A system and method for distributed processing, rendering, and displaying of content. A first client request is received from a first client of a plurality of clients. ... Nvidia Corporation

Data compaction and memory bandwidth reduction for sparse neural networks

A method, computer program product, and system for sparse convolutional neural networks that improves efficiency is described. Multi-bit data for input to a processing element is received at a compaction engine. ... Nvidia Corporation

Automated methods for conversions to a lower precision data format

Aspects of the present invention are directed to computer-implemented techniques for performing data compression and conversion between data formats of varying degrees of precision, and more particularly for improving the inferencing (application) of artificial neural networks using a reduced precision (e.g., int8) data format. Embodiments of the present invention generate candidate conversions of data output, then employ a relative measure of quality to identify the candidate conversion with the greatest accuracy (i.e., least divergence from the original higher precision values). ... Nvidia Corporation

Filtering image data using a neural network

A method, computer readable medium, and system are disclosed for performing spatiotemporal filtering. The method includes identifying image data to be rendered, reconstructing the image data to create reconstructed image data, utilizing a filter including a neural network having one or more skip connections and one or more recurrent layers, and returning the reconstructed image data.. ... Nvidia Corporation

Performing spatiotemporal filtering

A method, computer readable medium, and system are disclosed for performing spatiotemporal filtering. The method includes the steps of applying, utilizing a processor, a temporal filter of a filtering pipeline to a current image frame, using a temporal reprojection, to obtain a color and auxiliary information for each pixel within the current image frame, providing the auxiliary information for each pixel within the current image frame to one or more subsequent filters of the filtering pipeline, and creating a reconstructed image for the current image frame, utilizing the one or more subsequent filters of the filtering pipeline.. ... Nvidia Corporation

Execution of computation graphs

A computation graph is accessed. In the computation graph, operations to be performed are represented as interior nodes, inputs to the operations are represented as leaf nodes, and a result of the operations is represented as a root. ... Nvidia Corporation

Cloud generation of content to be streamed to vr/ar platforms using a virtual view broadcaster

The disclosure provides a virtual view broadcaster, a virtual view broadcasting system, and a video gaming broadcaster. In one embodiment, the virtual view broadcaster includes: (1) a cloud-based renderer configured to generate virtual view images from a virtual camera positioned in a computer application, and (2) an image processor configured to generate a virtual view stream for the virtual camera employing the virtual view rendered images, wherein the virtual view images are from different viewing directions at the virtual camera.. ... Nvidia Corporation

Balanced charge-recycling repeater link

A balanced, charge-recycling repeater link is disclosed. The link includes a first set of segments operating in a first voltage domain and a second set of segments operating in a second voltage domain. ... Nvidia Corporation

Near-eye parallax barrier displays

In embodiments of the invention, a method may include displaying an array of slits using a first light-attenuating spatial light modulator, displaying a pre-filtered image using a second light-attenuating slm by attenuating rays of light originating from a surrounding environment to synthesis a near-eye light field, where the rays of light pass through the first and second light-attenuating slms, and selectively blocking the rays of light originating from the surrounding environment using the array of slits to generate a virtual image in said near-eye light field.. . ... Nvidia Corporation

07/05/18 / #20180190007

Stereoscopic rendering using raymarching and a virtual view broadcaster for such rendering

The disclosure provides a virtual view broadcaster, a cloud-based renderer, and a method of providing stereoscopic images. In one embodiment, the method includes (1) generating a monoscopic set of rendered images and (2) converting the set of rendered images into a stereoscopic pair of images employing depth information from the monoscopic set of rendered images and raymarching.. ... Nvidia Corporation

06/28/18 / #20180182158

Beam tracing

An apparatus, computer readable medium, and method are disclosed for performing an intersection query between a query beam and a target bounding volume. The target bounding volume may comprise an axis-aligned bounding box (aabb) associated with a bounding volume hierarchy (bvh) tree. ... Nvidia Corporation

06/28/18 / #20180181809

Unconstrained appearance-based gaze estimation

A method, computer readable medium, and system are disclosed for performing unconstrained appearance-based gaze estimation. The method includes the steps of identifying an image of an eye and a head orientation associated with the image of the eye, determining an orientation for the eye by analyzing, within a convolutional neural network (cnn), the image of the eye and the head orientation associated with the image of the eye, and returning the orientation of the eye.. ... Nvidia Corporation

06/21/18 / #20180176532

Systems and methods for computational zoom

A system and method for computational zoom generates a resulting image having two or more effective focal lengths. A first surface within a three-dimensional (3d) scene including a first and second set of 3d objects defined by 3d information is identified. ... Nvidia Corporation

06/14/18 / #20180165868

Automatic level-of-detail for physically-based materials

A method, computer readable medium, and system are disclosed for implementing automatic level-of-detail for physically-based materials. The method includes the steps of identifying a declarative representation of a material to be rendered, creating a reduced complexity declarative representation of the material by applying one or more term rewriting rules to the declarative representation of the material, and returning the reduced complexity declarative representation of the material.. ... Nvidia Corporation

06/14/18 / #20180165787

Techniques for tiling compute work with graphics work

A device driver is configured to identify a group of compute shaders to be executed in multiple traversals of a graphics processing pipeline. Each such compute shader accesses a compute tile of data having particular dimensions. ... Nvidia Corporation

06/14/18 / #20180164880

Systems and methods for gaze tracking

A method, computer readable medium, and system are disclosed for gaze tracking. The method includes the steps of receiving reflected light rays at an optical sensor, where all of the reflected light rays converge towards a rotational center of an eye and generating pattern data based on intersections of the reflected light rays at a surface of the optical sensor. ... Nvidia Corporation

06/14/18 / #20180164592

System and method for foveated image generation using an optical combiner

A method, computer readable medium, and system are disclosed for generating foveal images. The method includes the steps of redirecting first light rays towards an eye, where the first light rays are redirected by an optical combiner and produce a peripheral image and generating second light rays by a light engine. ... Nvidia Corporation

06/07/18 / #20180158233

System and method for generating temporally stable hashed values

A method for generating temporally stable hash values reduces visual artifacts associated with stochastic sampling of data for graphics applications. A given hash value can be generated from a scaled and discretized object-space for a geometric object within a scene. ... Nvidia Corporation

06/07/18 / #20180158227

Infinite resolution textures

A method, computer readable medium, and system are disclosed for generating and utilizing infinite resolution texture acceleration data structures. The method for generating an infinite resolution texture acceleration data structure includes the steps of receiving an image; generating an infinite resolution texture acceleration data structure associated with the image that includes a texture map, a curve index map, and a curve data map; and storing the infinite resolution texture acceleration data structure in a memory. ... Nvidia Corporation

05/10/18 / #20180130252

Lighting simulation analysis using light path expressions

A method, system, and computer program product for performing a lighting simulation are disclosed. The method includes the steps of receiving a three-dimensional (3d) model, receiving a set of probes, where each probe specifies a location within the 3d model and an orientation of the probe, and performing, via a processor, a lighting simulation based on the 3d model, the set of probes, and one or more light path expressions. ... Nvidia Corporation

05/03/18 / #20180123604

Adaptive voltage frequency scaling for optimal power efficiency

Aspects of the present invention are directed to techniques for improving the efficiency of power supply schemes by continuously and adaptively scaling voltage and frequency levels in an integrated circuit based on measured conditions in real-time, without resorting to a reliance on excessive pre-computed margins typical of conventional schemes. Embodiments of the present invention employ a self-tuning dynamic voltage control oscillator (or other similar clock signal generator) that sets the frequency for components in the integrated circuit. ... Nvidia Corporation

05/03/18 / #20180122132

Geometry shadow maps with per-fragment atomics

Embodiments of the present invention are directed to techniques for improving the efficiency of shadow mapping by using highly optimized hardware-accelerated rasterizers. Embodiments of the present invention use a shader (such as a fragment or compute shader) to construct advanced shadow maps which store a list of polygons that intersect each pixel, and synchronizing read/write operations (e.g., with atomics) to ensure consistency of the texture accesses when managing the per-texel triangle lists during creation. ... Nvidia Corporation

05/03/18 / #20180121388

Symmetric block sparse matrix-vector multiplication

Embodiments of the present invention are directed to methods and systems for performing block sparse matrix-vector multiplications with improved efficiency through the use of a specific re-ordering the matrix data such that matrix symmetry can be exploited while simultaneously avoiding atomic memory operations or the need for inefficient memory operations in general. One disclosed method includes reordering the matrix data such that, for any column of non-transpose data, and for any row of transpose data simultaneously processed within a single thread-block on a gpu, all matrix elements update independent elements of the output vector. ... Nvidia Corporation

05/03/18 / #20180121287

Inline error detection and correction techniques

In accordance with embodiments of the present technology, region based selective error detection and correction techniques provide for the tradeoff between the safety of error detection and error correction (edec) protection, and the higher bandwidth and capacity of non-edec protection for different uses.. . ... Nvidia Corporation

05/03/18 / #20180121273

Reliability enhancement systems and methods

Systems and methods for enhancing reliability are presented. In one embodiment, a system comprises a processor configured to execute program instructions and contemporaneously perform reliability enhancement operations (e.g., fault checking, error mitigation, etc.) incident to executing the program instructions. ... Nvidia Corporation

04/19/18 / #20180107253

Tablet computer case with dual-hinge suspension

A tablet computer and keyboard are coupled to a tablet computer case. The tablet computer case includes a dual-hinge suspension that allows the tablet computer case to open and close with similar mechanics as a laptop computer. ... Nvidia Corporation

04/12/18 / #20180101768

Temporal ensembling for semi-supervised learning

A method, computer readable medium, and system are disclosed for implementing a temporal ensembling model for training a deep neural network. The method for training the deep neural network includes the steps of receiving a set of training data for a deep neural network and training the deep neural network utilizing the set of training data by: analyzing the plurality of input vectors by the deep neural network to generate a plurality of prediction vectors, and, for each prediction vector in the plurality of prediction vectors corresponding to the particular input vector, computing a loss term associated with the particular input vector by combining a supervised component and an unsupervised component according to a weighting function and updating the target prediction vector associated with the particular input vector.. ... Nvidia Corporation

04/05/18 / #20180096516

Stable ray tracing

A method, computer readable medium, and system are disclosed for performing stable ray tracing. The method includes the steps of identifying a plurality of old hit points used in a previously rendered frame, re-projecting the plurality of old hit points within a current frame to create a plurality of samples within a screen space of the current frame, adjusting the plurality of samples within the screen space of the current frame, based on one or more criteria, for each of the plurality of samples, tracing a ray from the sample toward a corresponding old hit point for the sample to determine a current hit point corresponding to the sample for the current frame, where the current hit point may include the corresponding old hit point for the sample or an updated hit point for the sample, shading at least a portion of the plurality of current hit points to obtain a color for each of the plurality of samples within the screen space of the current frame, and reconstructing a final color for a plurality of pixels in the screen space of the current frame, utilizing the color for each of the plurality of samples within the screen space of the current frame.. ... Nvidia Corporation

03/29/18 / #20180089793

Monitoring execution in a graphics processing unit

Marker commands are added to a stream of commands that are executed by a graphics processing unit (gpu) in a computing system. While the gpu executes the commands, information is written to a memory location each time a marker is reached in the pipeline. ... Nvidia Corporation

03/15/18 / #20180075611

Model-based three-dimensional head pose estimation

One embodiment of the present invention sets forth a technique for estimating a head pose of a user. The technique includes acquiring depth data associated with a head of the user and initializing each particle included in a set of particles with a different candidate head pose. ... Nvidia Corporation

03/01/18 / #20180061364

Variable refresh rate video capture and playback

A method for rendering and displaying video. The method includes executing an application at a processor. ... Nvidia Corporation

02/22/18 / #20180052707

Cooperative thread array granularity context switch during trap handling

Techniques are provided for restoring threads within a processing core. The techniques include, for a first thread group included in a plurality of thread groups, executing a context restore routine to restore from a memory a first portion of a context associated with the first thread group, determining whether the first thread group completed an assigned function, and, if the first thread group completed the assigned function, then exiting the context restore routine, or if the first thread group did not complete the assigned function, then executing one or more operations associated with a trap handler routine.. ... Nvidia Corporation

02/15/18 / #20180046916

Sparse convolutional neural network accelerator

A method, computer program product, and system perform computations using a sparse convolutional neural network accelerator. Compressed-sparse data is received for input to a processing element, wherein the compressed-sparse data encodes non-zero elements and corresponding multi-dimensional positions. ... Nvidia Corporation

02/15/18 / #20180046906

Sparse convolutional neural network accelerator

A method, computer program product, and system perform computations using a sparse convolutional neural network accelerator. A first vector comprising only non-zero weight values and first associated positions of the non-zero weight values within a 3d space is received. ... Nvidia Corporation

02/15/18 / #20180046900

Sparse convolutional neural network accelerator

A method, computer program product, and system perform computations using a processor. A first instruction including a first index vector operand and a second index vector operand is received and the first index vector operand is decoded to produce first coordinate sets for a first array, each first coordinate set including at least a first coordinate and a second coordinate of a position of a non-zero element in the first array. ... Nvidia Corporation

02/01/18 / #20180032846

Fusing multilayer and multimodal deep neural networks for video classification

A method, computer readable medium, and system are disclosed for classifying video image data. The method includes the steps of processing training video image data by at least a first layer of a convolutional neural network (cnn) to extract a first set of feature maps and generate classification output data for the training video image data. ... Nvidia Corporation

01/18/18 / #20180018814

Reinforcement learning for light transport

A method for light transport includes steps of initializing a data structure that is configured to provide an importance value for each incident sample in a three-dimensional (3d) scene and tracing, in a direction from an origin, a ray of a plurality of rays through the 3d scene to intersect an object at a hitpoint. Additional steps include selecting a next direction of the ray according to a distribution of the importance values at the hitpoint, tracing the ray in the next direction to find a next hitpoint, updating a first importance value corresponding to the hitpoint using a second importance value corresponding to the next hitpoint, and setting the hitpoint of the ray to the next hitpoint. ... Nvidia Corporation

01/18/18 / #20180018750

Unified memory systems and methods

The present invention facilitates efficient and effective utilization of unified virtual addresses across multiple components. In one exemplary implementation, an address allocation process comprises: establishing space for managed pointers across a plurality of memories, including allocating one of the managed pointers with a first portion of memory associated with a first one of a plurality of processors; and performing a process of automatically managing accesses to the managed pointers across the plurality of processors and corresponding memories. ... Nvidia Corporation

12/28/17 / #20170372202

Tensor processing using low precision format

Aspects of the present invention are directed to computer-implemented techniques for improving the training of artificial neural networks using a reduced precision (e.g., float16) data format. Embodiments of the present invention rescale tensor values prior to performing matrix operations (such as matrix multiplication or matrix addition) to prevent overflow and underflow. ... Nvidia Corporation

12/14/17 / #20170358053

Parallel processor with integrated correlation and convolution engine

A system and method for performing computer algorithms. The system includes a graphics pipeline operable to perform graphics processing and an engine operable to perform at least one of a correlation determination and a convolution determination for the graphics pipeline. ... Nvidia Corporation

12/07/17 / #20170351429

Architecture and algorithms for data compression

A system architecture conserves memory bandwidth by including compression utility to process data transfers from the cache into external memory. The cache decompresses transfers from external memory and transfers full format data to naive clients that lack decompression capability and directly transfers compressed data to savvy clients that include decompression capability. ... Nvidia Corporation

11/23/17 / #20170337061

Method and system for distributed shader optimization

Embodiments of the present invention are operable to communicate a list of important shaders and their current best-known compilations to remote client devices over a communications network. Client devices are allowed to produce modified shader compilations by varying optimizations. ... Nvidia Corporation

11/16/17 / #20170332018

Real-time video stabilization for mobile devices based on on-board motion sensing

Real-time video stabilization for mobile devices based on on-board motion sensing. In accordance with a method embodiment of the present invention, a first image frame from a camera at a first time is accessed. ... Nvidia Corporation

11/16/17 / #20170331506

Portable computing device cover with fully encapsulated stiffeners

A cover for a portable computing device includes a cover panel having a first portion of a solid silicone rubber sheet and a first stiffener panel that is fully encapsulated in the first portion of the solid silicone rubber sheet.. . ... Nvidia Corporation

11/09/17 / #20170324940

Adjusting an image according to ambient light conditions

An image of an object under a first illuminant is captured. The color of the ambient light at a device on which the image is to be displayed is identified. ... Nvidia Corporation

11/09/17 / #20170323475

System, method, and computer program product for rendering at variable sampling rates using projective geometric distortion

A system, method, and computer program product are provided for rendering at variable sampling rates. Vertex coordinates for 3d primitive are received from a shader execution unit, and an arithmetic operation is performed on the vertex coordinates by fixed operation circuitry to produce modified vertex coordinates in homogeneous coordinate space. ... Nvidia Corporation

11/09/17 / #20170323469

Stereo multi-projection implemented using a graphics processing pipeline

A method, computer readable medium, and system are disclosed for generating multi-view image data. The method includes the steps of processing primitive data of a model to generate processed primitive data that includes multiple position vectors for each vertex in the primitive data, the number of position vectors associated with each vertex being equal to the number of views in at least two views being generated. ... Nvidia Corporation

11/09/17 / #20170322887

Method to control cache replacement for decoupled data fetch

A method, computer readable medium, and system are disclosed for decoupling data pre-fetch from demand loads. The method includes the steps of receiving, by a processor, a set of instructions that includes a load instruction; and executing, by the processor, the load instruction to perform a load operation. ... Nvidia Corporation

11/09/17 / #20170322661

Detecting a tool used on a touch screen

Detecting a tool used on a touch screen. In accordance with a method embodiment of the present invention, a cell value is accessed for each cell of a touch sensing device. ... Nvidia Corporation

10/05/17 / #20170288815

System and method for early packet header verification

A receiver, transmitter and method for early packet header verification are provided. In one embodiment, the method includes: (1) receiving a payload flit of a preceding packet and a header flit of a current packet; and (2) using a cyclic redundancy check (crc) in the header flit to verify the payload flit of the preceding packet and the header flit of the current packet.. ... Nvidia Corporation

10/05/17 / #20170285855

Method and system hybrid stylus

Embodiments of the present invention are directed to systems for improved touch screen user-input devices that combine the benefits of active and passive touch screen implementations. According to one or more embodiments of the present invention, a system is provided that includes a user input touch device (such as a stylus) that can be equipped with one or more tips of various sizes and shapes, and a touch screen input surface that is configured to detect each of the various tips. ... Nvidia Corporation

09/28/17 / #20170279440

Integrated voltage regulator with in-built process, temperature and aging compensation

A method for regulating voltage for a processor is disclosed. The method comprises requesting a target frequency value, wherein the target frequency value determines a target clock frequency for clocking the processor. ... Nvidia Corporation

09/28/17 / #20170279355

Variable frequency soft-switching control of a buck converter

A system and method are provided for controlling a modified buck converter circuit. A pull-up switching mechanism that is coupled to an upstream terminal of an inductor within a modified buck converter circuit is enabled. ... Nvidia Corporation

09/21/17 / #20170272722

Method for data reuse and applications to spatio-temporal supersampling and de-noising

A method, computer readable medium, and system are disclosed for image processing to reduce aliasing using a temporal anti-aliasing algorithm modified to implement variance clipping. The method includes the step of generating a current frame of image data in a memory. ... Nvidia Corporation

09/14/17 / #20170263046

Perceptually-based foveated rendering using a contrast-enhancing filter

A method, computer readable medium, and system are disclosed for rendering images utilizing a foveated rendering algorithm with post-process filtering to enhance a contrast of the foveated image. The method includes the step of receiving a three-dimensional scene, rendering the 3d scene according to a foveated rendering algorithm to generate a foveated image, and filtering the foveated image using a contrast-enhancing filter to generate a filtered foveated image. ... Nvidia Corporation

09/14/17 / #20170263041

System, method and computer program product for generating one or more values for a signal patch using neighboring patches collected based on a distance dynamically computed from a noise distribution of the signal patch

A system, method and computer program product are provided for generating one or more values for a signal patch using neighboring patches collected based on a distance dynamically computed from a noise distribution of the signal patch. In use, a reference patch is identified from a signal, and a reference distance is computed based on a noise distribution in the reference patch. ... Nvidia Corporation

09/07/17 / #20170256022

Programmable graphics processor for multithreaded execution of programs

A processing unit includes multiple execution pipelines, each of which is coupled to a first input section for receiving input data for pixel processing and a second input section for receiving input data for vertex processing and to a first output section for storing processed pixel data and a second output section for storing processed vertex data. The processed vertex data is rasterized and scan converted into pixel data that is used as the input data for pixel processing. ... Nvidia Corporation

09/07/17 / #20170255552

Systems and methods for dynamic random access memory (dram) sub-channels

A method and system for a dram having a first bank that includes a first sub-array (sa) and a second sa. The first sa includes a first storage unit coupled to a first row-buffer in a first sub-channel (fsc) and a second storage unit in a second sub-channel (ssc). ... Nvidia Corporation

09/07/17 / #20170252644

Gaming controller button performance

Aspects of the present invention are directed to techniques for improving the manufacturing control mechanisms—specifically game controllers—for computerized electronic devices. According to one aspect of the present invention, a button assembly is provided that eliminates the need for dampers or gaskets for shock absorption by implementing the hammer and pad using novel and advantageous geometries. ... Nvidia Corporation

08/31/17 / #20170251400

Method and system for dynamic regulation and control of wi-fi scans

A method for discovering wireless access. The method includes launching an application in association with a first device. ... Nvidia Corporation

08/31/17 / #20170249920

Variable refresh rate video capture and playback

A method for displaying video. The method includes executing an application at a processor. ... Nvidia Corporation

08/31/17 / #20170249401

Modeling point cloud data using hierarchies of gaussian mixture models

A method, computer readable medium, and system are disclosed for generating a gaussian mixture model hierarchy. The method includes the steps of receiving point cloud data defining a plurality of points; defining a gaussian mixture model (gmm) hierarchy that includes a number of mixels, each mixel encoding parameters for a probabilistic occupancy map; and adjusting the parameters for one or more probabilistic occupancy maps based on the point cloud data utilizing a number of iterations of an expectation-maximum (em) algorithm.. ... Nvidia Corporation

08/31/17 / #20170249152

Software-assisted instruction level execution preemption

One embodiment of the present invention sets forth a technique for instruction level execution preemption. Preempting at the instruction level does not require any draining of the processing pipeline. ... Nvidia Corporation

08/31/17 / #20170249151

Software-assisted instruction level execution preemption

One embodiment of the present invention sets forth a technique for instruction level execution preemption. Preempting at the instruction level does not require any draining of the processing pipeline. ... Nvidia Corporation

08/24/17 / #20170243319

Sub-frame scanout for latency reduction in virtual reality applications

A system, computer readable medium, and method for sub-frame scan-out are disclosed. The method includes the steps of dividing a frame into a plurality of slices. ... Nvidia Corporation

08/24/17 / #20170243006

Secure provisioning of semiconductor chips in untrusted manufacturing factories

One embodiment of the present invention includes a boot read only memory (rom) with an embedded, private key provision key (kpk) set that enables secure provisioning of chips. As part of taping-out a chip, the chip provider establishes the kpk set and provides the boot rom exclusive access to the kpk. ... Nvidia Corporation

08/17/17 / #20170238022

Quality aware error concealment method for video and game streaming and a viewing device employing the same

A viewing device, a method of displaying streamed data frames and a client viewing device are disclosed herein. In one embodiment, the video viewing device includes: (1) a screen, (2) a decoder configured to decode a data frame received in a bitstream from a transmitter to provide a decoded data frame, and (3) an error concealer configured to either discard the decoded data frame or select the decoded data frame for display on the screen based on a complexity of the decoded data frame.. ... Nvidia Corporation

08/17/17 / #20170237997

Method and system for interpolating base and delta values of associated tiles in an image

A method for performing image decompression. The method includes identifying a pixel in an image, wherein the image comprises a plurality of tiles including color data that is displayed by a plurality of pixels, wherein each tile is associated with a base value, a delta value, and a plurality of indices. ... Nvidia Corporation

08/17/17 / #20170237992

Method for rotating macro-blocks of a frame of a video stream

A method for rotating macro-blocks of a frame of a video stream. A degree of rotation for the video stream is accessed. ... Nvidia Corporation

08/17/17 / #20170237963

Collecting and processing stereoscopic digital image data to produce a parallax corrected tilted head view

An apparatus for capturing digital stereoscopic images of a scene. The apparatus comprises a first pair of separated camera lens oriented such that a first imaginary line between the first pair of lens is substantially parallel with a horizon line a scene, wherein digital image data is capturable through the first pair of camera lens and storable in two separate digital image data bases corresponding to a left-eye horizontal view and a right-eye horizontal view respectively. ... Nvidia Corporation

08/17/17 / #20170236322

Method and a production renderer for accelerating image rendering

A method, a computer program, and a production renderer for accelerating a rendering process of an image are provided. In one embodiment, the method includes intercepting a first invocation of a function from a custom shader during a rendering process of an image, computing a result of the function employing a processor, and returning the result to the custom shader in response to a second invocation of the function during the rendering process.. ... Nvidia Corporation

08/17/17 / #20170236321

Customizable state machine for visual effect insertion

A computing system, driver and method for inserting an extra visual effect into a rendering pipeline of an application are provided. In one embodiment, the method includes: 1) loading into a driver a state machine that is customized for a particular application being rendered at a rendering pipeline; 2) identifying a point in the rendering pipeline to insert an extra visual effect using the state machine; and 3) inserting the extra visual effect into the rendering pipeline at the point.. ... Nvidia Corporation

08/17/17 / #20170236242

Ultra high resolution pan-scan on displays connected across multiple systems/gpus

A server and methods for performing an ultra-high resolution pan-scan on displays connected across multiple client gpus are provided. In one embodiment, one of the methods includes: 1) rendering a surface that exceeds resolutions of displays connected to multiple client gpus; 2) receiving viewport coordinates of one of the displays that is connected to one of the multiple client gpus; 3) encoding only a portion of the surface that corresponds to the viewport coordinates; 4) sending the portion to the one of the multiple client gpus.. ... Nvidia Corporation

08/17/17 / #20170236013

System and method for procedurally synthesizing datasets of objects of interest for training machine-learning models

A system and method for procedurally synthesizing a training dataset for training a machine-learning model. In one embodiment, the system includes: (1) a training designer configured to describe variations in content of training images to be included in the training dataset and (2) an image definer coupled to the training designer, configured to generate training image definitions in accordance with the variations and transmit the training image definitions: to a 3d graphics engine for rendering into corresponding training images, and further to a ground truth generator for generating associated ground truth corresponding to the training images, the training images and the associated ground truth comprising the training dataset.. ... Nvidia Corporation

08/17/17 / #20170235930

Content protection via online servers and code execution in a secure operating system

A computer system comprising a processor and a memory for storing instructions, that when executed by the processor performs a copy protection method. The copy protection method comprises executing a software loop of a first software application in a first operating system. ... Nvidia Corporation

08/17/17 / #20170235690

Producer/consumer remote synchronization

Remotely synchronizing data communicated in an electronic computing system. Ordered writing of a data set of discrete data packets (data) and a following associated semaphore packet (semaphore) from a source electronic device (source) to a bridge interface device (bridge). ... Nvidia Corporation

08/17/17 / #20170235586

System and method for retrieving values of captured local variables for lambda functions in java

A system for and method of retrieving values of captured local variables for a lambda function in java. In one embodiment, the system includes: (1) a java virtual machine and (2) a captured variable retriever that interacts with the java virtual machine and configured to retrieve a signature of the lambda function from a classfile of a java class containing the lambda function, compare the signature with a declaration of the lambda function to identify arguments corresponding to the captured local variables, modify the lambda function and cause the java virtual machine to execute the modified lambda function.. ... Nvidia Corporation

08/17/17 / #20170235581

Instructions for managing a parallel cache hierarchy

A technique for managing a parallel cache hierarchy that includes receiving an instruction from a scheduler unit, where the instruction comprises a load instruction or a store instruction; determining that the instruction includes a cache operations modifier that identifies a policy for caching data associated with the instruction at one or more levels of the parallel cache hierarchy; and executing the instruction and caching the data associated with the instruction based on the cache operations modifier.. . ... Nvidia Corporation

08/17/17 / #20170235491

Migration of peer-mapped memory pages

Techniques are provided by which memory pages may be migrated among ppu memories in a multi-ppu system. According to the techniques, a uvm driver determines that a particular memory page should change ownership state and/or be migrated between one ppu memory and another ppu memory. ... Nvidia Corporation

08/17/17 / #20170234927

Efficient scan latch systems and methods

Systems and methods for latches are presented. In one embodiment a system includes scan in propagation component, data propagation component, and control component. ... Nvidia Corporation

08/10/17 / #20170228856

Navigation device

In one embodiment, a car navigation device is provided. The device comprises: at least one wide-angle camera; a video correction unit for acquiring video data from the wide-angle lens and correcting the video data; a video merging unit for acquiring corrected video data from video correction unit and merging the corrected video data; an image recognition unit for acquiring video from the video merging unit and performing image recognition to the video; and a driving assistant unit for acquiring data from the image recognition unit and assisting driving in accordance with the recognized content. ... Nvidia Corporation

08/10/17 / #20170227773

Catadioptric on-axis virtual/augmented reality glasses system and method

A method and system for operating a catadioptric glasses system is presented. The method includes the steps of generating an image via a light engine included in a glasses system and projecting the image onto a display that includes a diffusion layer positioned between a curved mirror and a user's retina. ... Nvidia Corporation

08/10/17 / #20170227764

Holographic reflective slim virtual/augmented reality display system and method

A display method and system are disclosed for virtual/augmented reality. The method includes the steps of generating an image by a projection engine and projecting light rays defining the image onto a diffuser holographic optical element (dhoe) located between an observer and a concave mirror element, where a concave surface of the concave mirror element faces the observer. ... Nvidia Corporation

08/03/17 / #20170221260

Strain based dynamics for rendering special effects

A strain based dynamic technique, for rendering special effects, includes simulation as a function of a green-st. Venant strain tensor constraint. ... Nvidia Corporation

08/03/17 / #20170219652

Performing on-chip partial good die identification

In one embodiment, a multiple input signature register (misr) shadow works with a misr to compress test responses of a layout partition in a functional region of an integrated circuit. In operation, for each test pattern in a test pattern split, the misr generates a misr signature based on the responses of the layout partition. ... Nvidia Corporation

07/27/17 / #20170213313

Managing event count reports in a tile-based architecture

One embodiment of the present invention sets forth a graphics processing system configured to track event counts in a tile-based architecture. The graphics processing system includes a screen-space pipeline and a tiling unit. ... Nvidia Corporation

07/27/17 / #20170213263

Establishing a billing address for a device by determining a location of the device

To establish a target (e.g., billing) address, a device receives a first physical address determined by geolocating the device (e.g., based on an internet protocol (ip) address associated with the device). A street-level map that includes an indicator that is rendered at a first location in the map corresponding to the first physical address is displayed. ... Nvidia Corporation

07/27/17 / #20170212857

System and method for configuring a channel

An integrated circuit device comprises pin resources, a memory controller circuit, a network interface controller circuit, and transmitter circuitry. The pin resources comprise pads coupled to off-chip pins of the integrated circuit device. ... Nvidia Corporation

07/20/17 / #20170207783

Three state latch

Three state latch. In accordance with a first embodiment, an electronic circuit includes n pairs of cascaded logical gates. ... Nvidia Corporation

07/20/17 / #20170206405

Online detection and classification of dynamic gestures with recurrent convolutional neural networks

A method, computer readable medium, and system are disclosed for detecting and classifying hand gestures. The method includes the steps of receiving an unsegmented stream of data associated with a hand gesture, extracting spatio-temporal features from the unsegmented stream by a three-dimensional convolutional neural network (3dcnn), and producing a class label for the hand gesture based on the spatio-temporal features.. ... Nvidia Corporation

07/20/17 / #20170206231

Tree traversal with backtracking in constant time

A method, computer readable medium, and system are disclosed for performing tree traversal with backtracking in constant time. The method includes the steps of traversing a tree, maintaining a bit trail variable and a current key variable during the traversing, where the bit trail variable includes a first plurality of bits indicating tree levels on which a node has been postponed along a path from the root of the tree during the traversing, and the current key variable includes a second plurality of bits indicating a number of a current node within the tree, and performing backtracking within the tree during the traversing, utilizing the bit trail variable and the current key variable.. ... Nvidia Corporation

07/20/17 / #20170205465

Granular dynamic test systems and methods

In one embodiment, a system comprises: a global clock input for receiving a global clock, a plurality of partitions; and a skew tolerant interface configured to compensate for clock skew differences between a global clock from outside at least one of the partitions and a balanced local clock within at least one of the partitions. The partitions can be test partitions. ... Nvidia Corporation

07/13/17 / #20170199778

Lazy runahead operation for a microprocessor

Embodiments related to managing lazy runahead operations at a microprocessor are disclosed. For example, an embodiment of a method for operating a microprocessor described herein includes identifying a primary condition that triggers an unresolved state of the microprocessor. ... Nvidia Corporation

07/13/17 / #20170199689

Frame buffer access tracking via a sliding window in a unified virtual memory system

One embodiment of the present invention is a memory subsystem that includes a sliding window tracker that tracks memory accesses associated with a sliding window of memory page groups. When the sliding window tracker detects an access operation associated with a memory page group within the sliding window, the sliding window tracker sets a reference bit that is associated with the memory page group and is included in a reference vector that represents accesses to the memory page groups within the sliding window. ... Nvidia Corporation

07/06/17 / #20170195591

Pre-processing for video noise reduction

Embodiments of the present invention are directed to methods and systems for performing automatic noise reduction in video. According to one aspect of the invention, a video noise-reducing system is provided consisting of a noise estimator, a motion classifier, two stages of filters, each including a spatial and temporal filter, and a combiner. ... Nvidia Corporation

06/29/17 / #20170186224

Using a geometry shader for variable input and output algorithms

A system and method uses the capabilities of a geometry shader unit within the multi-threaded graphics processor to implement algorithms with variable input and output.. . ... Nvidia Corporation

06/22/17 / #20170178401

Distributed index fetch, primitive assembly, and primitive batching

One embodiment of the present invention includes a technique for distributing work slices associated with a graphics processing unit for processing. A primitive distribution system receives a draw command related to a graphics object associated with a plurality of indices. ... Nvidia Corporation

06/22/17 / #20170177146

Methods and apparatus for reducing perceived pen-to-ink latency on touchpad devices

A method for reducing line display latency on a touchpad device is disclosed. The method comprises storing information regarding a plurality of prior touch events on a touch screen of the touchpad device into an event buffer. ... Nvidia Corporation

06/15/17 / #20170170870

System and method for cross-talk cancellation in single-ended signaling

A method for transmitting data advantageously reduces cross-talk in high-speed data transmission. The method comprises receiving an input data word, encoding the input data word into a code word, and driving the code word on to an interconnect for transmission. ... Nvidia Corporation

06/15/17 / #20170170869

System and method for cross-talk cancellation in single-ended signaling

A method for transmitting data advantageously reduces cross-talk in high-speed data transmission. The method comprises receiving an input data word, encoding the input data word into a code word, and driving the code word on to an interconnect for transmission. ... Nvidia Corporation

06/15/17 / #20170168839

Branching to alternate code based on runahead determination

The description covers a system and method for operating a micro-processing system having a runahead mode of operation. In one implementation, the method includes providing, for a first portion of code, a runahead correlate. ... Nvidia Corporation

06/15/17 / #20170168598

Magnetic retention of peripheral device for a tablet computer

A peripheral device for a computing device comprises a body configured for insertion into a storage cavity in the computing device, a first magnet, and a second magnet. The first magnet is disposed within the body proximate a first external surface of the body and having a first pole of a first polarity and a second pole of a second polarity, wherein the first pole is oriented toward the first external surface. ... Nvidia Corporation

06/15/17 / #20170165569

Built-in support of in-game virtual split screens with peer-to peer-video conferencing

Methods of providing in-game virtual split screens with peer-to-peer video conferencing are described for use in online gaming, for instance. In one approach, a live video stream, a live audio stream, and a player viewpoint are sent from a first computer system for receipt by a second computer system. ... Nvidia Corporation

06/08/17 / #20170161206

Replaying memory transactions while resolving memory access faults

One embodiment of the present invention is a parallel processing unit (ppu) that includes one or more streaming multiprocessors (sms) and implements a replay unit per sm. Upon detecting a page fault associated with a memory transaction issued by a particular sm, the corresponding replay unit causes the sm, but not any unaffected sms, to cease issuing new memory transactions. ... Nvidia Corporation

06/08/17 / #20170161144

Method for memory scrub of dram with internal error correcting code (ecc) bits during either memory activate and/or precharge operation

A method for updating a dram memory array is disclosed. The method comprises: a) receiving a command from a memory controller to initiate an active cycle for activating a memory row in a dram memory array; b) performing an error correction code (ecc) scrub on the memory row prior to reading data from the memory row into sense amplifiers in the dram memory array in accordance with the command to activate; c) activating the memory row; and d) writing corrected data following the ecc scrub back into memory from the sense amplifiers during a pre-charge cycle of the dram memory array.. ... Nvidia Corporation

06/08/17 / #20170161143

Controller-based memory scrub for drams with internal error-correcting code (ecc) bits contemporaneously during auto refresh or by using masked write commands

A method for updating a dram memory array is disclosed. The method comprises: a) transitioning the dram memory array from an idle state to a refresh state in accordance with a command from a memory controller; b) initiating a refresh on the dram memory array using dram internal control circuitry by activating a row of data into an associated sense amplifier buffer; and c) during the refresh, performing an err correction code (ecc) scrub operation of selected bits in the activated row of the dram memory array.. ... Nvidia Corporation

06/08/17 / #20170161142

Method for scrubbing and correcting dram memory data with internal error-correcting code (ecc) bits contemporaneously during self-refresh state

In one embodiment, a method for updating a dram memory array is disclosed. The method comprises: a) transitioning the dram memory array from an idle state to a self-refresh state after a period of inactivity; b) initiating a refresh on the dram memory array using dram internal control circuitry; and c) during the refresh, performing an error correction code (ecc) scrub operation of selected bits in an activated row of the dram memory array.. ... Nvidia Corporation

06/08/17 / #20170161100

Managing copy operations in complex processor topologies

A copy subsystem within a processor includes a set of logical copy engines and a set of physical copy engines. Each logical copy engine corresponds to a different command stream implemented by a device driver, and each logical copy engine is configured to receive copy commands via the corresponding command stream. ... Nvidia Corporation

06/08/17 / #20170161099

Managing copy operations in complex processor topologies

A copy subsystem within a processor includes a set of logical copy engines and a set of physical copy engines. Each logical copy engine corresponds to a different command stream implemented by a device driver, and each logical copy engine is configured to receive copy commands via the corresponding command stream. ... Nvidia Corporation

06/01/17 / #20170154667

Dram with segmented page configuration

This description is directed to a dynamic random access memory (dram) array having a plurality of rows and a plurality of columns. The array further includes a plurality of cells, each of which are associated with one of the columns and one of the rows. ... Nvidia Corporation

06/01/17 / #20170153945

Memory management systems and methods

The present invention facilitates efficient and effective utilization of storage management features. In one embodiment, a memory device comprises a memory interface, an ecc generation component, and storage components. ... Nvidia Corporation

05/18/17 / #20170142201

System and method for network coupled cloud gaming

Embodiments of the claimed subject matter provide systems and methods for configuring and connecting a controller to a game streaming service. The system includes a plurality of input controls and a network controller configured for communicating with a game streaming service. ... Nvidia Corporation

05/18/17 / #20170141794

Lane-striped computation of packet crc to maintain burst error properties

A crc generator, a method for computing a crc of a data packet, and an electronic system, such as a circuit board, are disclosed herein. In one embodiment the method is for computing the crc of a data packet to be transmitted on a serial communications link having multiple lanes. ... Nvidia Corporation

05/18/17 / #20170141768

Mixed threshold flip-flop element to mitigate hold time penalty due to clock distortion

A flip-flop element is configured to include finfet technology transistors with a mix of threshold voltage levels. The data input path includes finfet transistors configured with high voltage thresholds (hvt). ... Nvidia Corporation

05/18/17 / #20170140569

System and method for optimized sparse volume rendering

A system and method of rendering a fluid-like object in a volume space are provided. In one embodiment, the method includes: (1) determining a list of bricks in the volume space that the fluid-like object would occupy, (2) grouping the bricks into buckets based on depth values of the bricks and (3) rendering each of the buckets separately.. ... Nvidia Corporation

05/11/17 / #20170135043

Saving power in a mobile terminal

Saving power in a mobile terminal includes determining alignment processing moments after the mobile terminal enters a standby mode. Alignable wakeup events, which occur during alignment processing periods corresponding to each alignment processing moment, are thus controlled to commence related processing at each of the alignment processing moments. ... Nvidia Corporation

05/11/17 / #20170134054

Safe communication mode for a high speed link

A transmitter for a serial communications link, a serial communications link and an electronic system are disclosed herein. In one embodiment, the transmitter includes: (1) a communications interface connected to a transmission medium and (2) a safe mode circuit coupled to the communications interface and configured to send data over the transmission medium in a safe mode.. ... Nvidia Corporation

05/11/17 / #20170132834

Adaptive shading in a graphics processing pipeline

One embodiment of the present invention includes a parallel processing unit (ppu) that performs pixel shading at variable granularities. For effects that vary at a low frequency across a pixel block, a coarse shading unit performs the associated shading operations on a subset of the pixels in the pixel block. ... Nvidia Corporation

05/04/17 / #20170127068

Techniques for nonlinear chrominance upsampling

A subsystem configured to upsample a video data stream encoded in ycrcb format 4:2:0 (also termed yuv 4:2;0) performs an algorithm upon a two-by-two group of subsampled pixels. The subsystem computes an inside probability that the chrominance of a target pixel is a close match to the chrominance inside the group of four pixels. ... Nvidia Corporation

05/04/17 / #20170124965

Regional dc balancing for a variable refresh rate display panel

A method, computer program product, and system perform dc balancing for a variable refresh rate display panel based on regions. A first portion of a first image is displayed on a first region of a screen of a display device using a spatial inversion pattern and a first polarity of a temporal polarity pattern for the first region of the screen of the display device. ... Nvidia Corporation

05/04/17 / #20170124934

Variable refresh rate gamma correction

A method, computer program product, and system perform gamma correction for a variable refresh rate display panel. An image is received for display on a screen of a display device. ... Nvidia Corporation

05/04/17 / #20170124679

Latency-resistant sparse simulation technique, system and method

A central processing unit (cpu), system and method of performing a graphics processing unit (gpu) simulation of a fluid-like object in a grid-based simulation space are provided. In one embodiment, the method includes: (1) determining, by a cpu, a list of bricks in the simulation space that the fluid-like object would occupy in a future frame based on simulation data of a current frame and (2) updating, based on the list, a virtual table that maps portions of a gpu memory to tiled resources corresponding to the bricks before a simulation of said future frame.. ... Nvidia Corporation

05/04/17 / #20170124029

System and method of producing dynamically customized images

Embodiments of the claimed subject matter provide systems and methods for determining a rendering size of an image and resizing the image based on the rendering size of the image. The method can include accessing layout information associated with a webpage to be rendered. ... Nvidia Corporation

05/04/17 / #20170123978

Organizing memory to optimize memory accesses of compressed data

In one embodiment of the present invention a cache unit organizes data stored in an attached memory to optimize accesses to compressed data. In operation, the cache unit introduces a layer of indirection between a physical address associated with a memory access request and groups of blocks in the attached memory. ... Nvidia Corporation

05/04/17 / #20170123977

Organizing memory to optimize memory accesses of compressed data

In one embodiment of the present invention a cache unit organizes data stored in an attached memory to optimize accesses to compressed data. In operation, the cache unit introduces a layer of indirection between a physical address associated with a memory access request and groups of blocks in the attached memory. ... Nvidia Corporation

04/27/17 / #20170116760

Relative encoding for a block-based bounding volume hierarchy

A system, method, and computer program product for implementing a tree traversal operation for a tree data structure is disclosed. The method includes the steps of receiving at least a portion of a tree data structure that represents a tree having a plurality of nodes and processing, via a tree traversal operation algorithm executed by a processor, one or more nodes of the tree data structure by intersecting the one or more nodes of the tree data structure with a query data structure. ... Nvidia Corporation

04/27/17 / #20170116700

Techniques for maintaining atomicity and ordering for pixel shader operations

A tile coalescer within a graphics processing pipeline coalesces coverage data into tiles. The coverage data indicates, for a set of xy positions, whether a graphics primitive covers those xy positions. ... Nvidia Corporation

04/27/17 / #20170116699

Techniques for maintaining atomicity and ordering for pixel shader operations

A tile coalescer within a graphics processing pipeline coalesces coverage data into tiles. The coverage data indicates, for a set of xy positions, whether a graphics primitive covers those xy positions. ... Nvidia Corporation

04/27/17 / #20170116698

Techniques for maintaining atomicity and ordering for pixel shader operations

A tile coalescer within a graphics processing pipeline coalesces coverage data into tiles. The coverage data indicates, for a set of xy positions, whether a graphics primitive covers those xy positions. ... Nvidia Corporation

04/27/17 / #20170115353

Granular dynamic test systems and methods

In one embodiments, a system comprises: a plurality of scan test chains configured to perform test operations at a first clock speed; a central test controller for controlling testing by the scan test chains; and an interface configured to generate instructions to direct central test controller. The interface communicates with the centralized test controller at the first clock speed and an external scan input at a second clock speed. ... Nvidia Corporation

04/27/17 / #20170115352

Independent test partition clock coordination across multiple test partitions

Granular dynamic test systems and methods facilitate efficient and effective timing of test operations. In one embodiment, a chip test system comprises: a first test partition operable to perform test operations based upon a first local test clock signal; a second test partition operable to perform test operations based upon a second local test clock signal; and a centralized controller configured to coordinate testing between the plurality of test partitions, wherein the coordination includes managing communication of test information between the plurality of test partitions and external pins. ... Nvidia Corporation

04/27/17 / #20170115351

Dynamic independent test partition clock

In one embodiment, a test system comprises: a plurality of test partitions and a centralized controller configured to coordinate testing between the plurality of test partitions. At least one of the plurality of test partitions comprises: a partition test interface controller configured to control testing within at least one test partition in accordance with dynamic selection of a test mode, and at least one test chain configured to perform test operations. ... Nvidia Corporation

04/27/17 / #20170115346

Scan system interface (ssi) module

A method for testing. The method includes sending a single instruction over a jtag interface to a jtag controller to select a first internal test data register of a plurality of data registers. ... Nvidia Corporation

04/27/17 / #20170115345

Method and system for dynamic standard test access (dsta) for a logic block reuse

A method for testing. An external clock frequency is generated. ... Nvidia Corporation

04/27/17 / #20170115338

Test partition external input/output interface control

In one embodiment, a test system comprises: a test partition configured to perform test operations; a centralized test controller for controlling testing by the test partition; and a test link interface controller configured to communicate between the centralized test controller and the test partition, wherein the test link interface controller controls dynamic changes to external pads associated with the test operations. The test link interface controller dynamically selects between an input direction and output direction for the external pads. ... Nvidia Corporation

04/20/17 / #20170111144

System and method for enabling replay using a packetized link protocol

A receiver, transmitter and method for enabling a replay using a packetized link protocol are provided. In one embodiment, the method includes: (1) transmitting a stream of packets including an untagged packet and (2) using synchronized counters to determine a sequence id of the untagged packet, which is a corrupt/lost packet that needs to be retransmitted.. ... Nvidia Corporation

04/20/17 / #20170109859

Partial refresh of display devices

An aspect of the present invention proposes a method for performing partial refresh on display panels. According to one or more embodiments of the present invention, the display panels may be implemented as self-refreshing display panels communicatively coupled with a computing device that generates graphical data for display in the display panel. ... Nvidia Corporation

04/13/17 / #20170102760

Techniques for limiting power via secondary control of a voltage regulator

A power subsystem is configured to manage the maximum power usage of a computer subsystem. A power detector determines when power usage approaches the maximum capability of the power supply. ... Nvidia Corporation

04/13/17 / #20170102744

Techniques for reducing fan cycling

A fan control module configured to control the speed of a fan receives a signal that indicates the power used by a graphics processing unit (gpu) and a signal that indicates the gpu temperature. Whenever the gpu power exceeds a power threshold level, but the gpu temperature is below a temperature threshold level, the control module turns the fan on and causes the fan to operate at a minimum speed. ... Nvidia Corporation

04/06/17 / #20170097896

Storing secure state information in translation lookaside buffer cache lines

One embodiment of the present invention includes a memory management unit (mmu) that is configured to efficiently process requests to access memory that includes protected regions. Upon receiving an initial request via a virtual address (va), the mmu translates the va to a physical address (pa) based on page table entries (ptes) and gates the response based on page-specific secure state information. ... Nvidia Corporation

04/06/17 / #20170097867

System and method for early packet header verification

A receiver, transmitter and method for early packet header verification are provided. In one embodiment, the method includes: (1) receiving a payload flit of a preceding packet and a header flit of a current packet; and (2) using a cyclic redundancy check (crc) in the header flit to verify the payload flit of the preceding packet and the header flit of the current packet.. ... Nvidia Corporation

03/30/17 / #20170093403

Balanced charge-recycling repeater link

A balanced, charge-recycling repeater link is disclosed. The link includes a first set of segments operating in a first voltage domain and a second set of segments operating in a second voltage domain. ... Nvidia Corporation

03/30/17 / #20170091458

Secure reconfiguration of hardware device operating features

A secure reconfigurable operating mode system includes a hardware device having multiple operating modes and an operating mode selector that is coupled to the hardware device. The operating mode selector has a virtual fusing register that selects an operating mode for the hardware device and a security processor that enables a secure virtual fusing based on documented security files authorizing selection of the operating mode. ... Nvidia Corporation

03/23/17 / #20170085656

Automatic absolute orientation and position

Methods of determining an absolute orientation and position of a mobile computing device are described for use in augmented reality applications, for instance. In one approach, the framework implemented herein detects known objects within a frame of a video feed. ... Nvidia Corporation

03/23/17 / #20170084078

System, method, and computer program product for rejecting small primitives

A system, method, and computer program product are provided for rejecting small primitives. A three-dimensional (3d) primitive is received and a position within the primitive is identified. ... Nvidia Corporation








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