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Nvidia Corporation patents (2015 archive)


Recent patent applications related to Nvidia Corporation. Nvidia Corporation is listed as an Agent/Assignee. Note: Nvidia Corporation may have other listings under different names/spellings. We're not affiliated with Nvidia Corporation, we're just tracking patents.

ARCHIVE: New 2018 2017 2016 2015 2014 2013 2012 2011 2010 2009 | Company Directory "N" | Nvidia Corporation-related inventors


12/10/15 / #20150357009

High-density latch arrays

A system and device are provided for implementing memory arrays using high-density latch cells. The device includes an array of cells arranged into columns and rows. ... Nvidia Corporation

12/10/15 / #20150355996

System, method, and computer program product for collecting execution statistics for graphics processing unit workloads

A system, method, and computer program product are provided for collecting trace information based on a computational workload. The method includes the steps of compiling source code to generate a program, launching a workload to be executed by the parallel processing unit, collecting one or more records of trace information associated with a plurality of threads configured to execute the program, and correlating the one or more records to one or more corresponding instructions included in the source code. ... Nvidia Corporation

12/03/15 / #20150348509

Dynamic frame repetition in a variable refresh rate system

A method, computer program product, and system for adjusting a dynamic refresh frequency of a display device are disclosed. The method includes the steps of obtaining a current frame duration associated with a first image, computing, based on the current frame duration, a repetition value for a second image, and repeating presentation of the second image on a display device based on the repetition value. ... Nvidia Corporation

12/03/15 / #20150348317

System, method, and computer program product for processing primitive specific attributes generated by a fast geometry shader

A system, method, and computer program product are provided for processing primitive-specific attributes. A portion of a graphics processor is determined to operate in a fast geometry shader mode and a vertex associated with a set of per-vertex attributes is determined to be a shared vertex. ... Nvidia Corporation

12/03/15 / #20150346902

Touch-screen input/output device touch sensing techniques

A touch-screen input/output device including a touch sensor, a display, a display control module, a touch sensor control module and a synchronizer module. The touch sensor is overlaid on a display. ... Nvidia Corporation

12/03/15 / #20150346817

Physiologically based adaptive image generation

A system, computer-readable medium, and method are provided for generating images based on adaptations of the human visual system. An input image is received, an effect provoking change is received, and an afterimage resulting from a cumulative effect of human visual adaptation is computed based on the effect provoking change and a per-photoreceptor type physiological adaptation of the human visual system. ... Nvidia Corporation

11/26/15 / #20150339994

Refresh rate dependent adaptive dithering for a variable refresh rate display

A method, computer program product, and system for selectively disabling temporal dithering is disclosed. The method includes the steps of configuring a display device to refresh utilizing a dynamic refresh rate to display images and selectively disabling temporal dithering of the images based on the dynamic refresh rate. ... Nvidia Corporation

11/26/15 / #20150339799

Techniques for optimizing stencil buffers

One embodiment sets forth a method for associating each stencil value included in a stencil buffer with multiple fragments. Components within a graphics processing pipeline use a set of stencil masks to partition the bits of each stencil value. ... Nvidia Corporation

11/26/15 / #20150339209

Determining overall performance characteristics of a concurrent software application

One embodiment of the present invention includes a dependency extractor and a dependency investigator that, together, facilitate performance analysis of computer systems. In operation, the dependency extractor instruments a software application to generate run-time execution data for each work task. ... Nvidia Corporation

11/19/15 / #20150332757

Configurable delay circuit and method of clock buffering

An sram clock circuit and an sram. In one embodiment, the sram clock circuit includes: (1) a plurality of transistor stacks optionally serially electrically couplable to form a configurable delay path through which a clock signal is buffered, and (2) a delay path select circuit respectively electrically coupled between pairs of the plurality of transistor stacks and operable to selectively electrically couple the plurality of transistor stacks to a base delay path, thereby activating the configurable delay path based on a desired delay.. ... Nvidia Corporation

11/19/15 / #20150331700

Partial program specialization at runtime

A solution is proposed for implementing staging in computer programs and code specialization at runtime. Even when values are not known at compile time, many of the values used as parameters for a code section or a function are constant, and are known prior to starting the computation of the algorithm. ... Nvidia Corporation

11/12/15 / #20150327325

Enhanced discontinued transmission and reception methods

Methods for operating a small cell in a discontinued reception (drx) mode include maintaining the small cell in a discontinuous transmission (dtx) mode during a first time period having a plurality of first time slots. The methods include transmitting common reference signals in a predetermined number of second time slots prior to the first time slots and in a predetermined number of third time slots following commencement of the first time slots. ... Nvidia Corporation

11/12/15 / #20150326255

Radio frequency power amplifier including a pulse generator and matching network circuit

A system and method are provided for controlling a radio frequency (rf) power amplifier. A magnitude input and a phase input are received for transmission of a rf signal by the rf power amplifier. ... Nvidia Corporation

11/12/15 / #20150325028

Method and system for representing objects with velocity-dependent particles

A method and system of representing and simulating an object by representing using with velocity-dependent particles.. . ... Nvidia Corporation

11/05/15 / #20150317827

System, method, and computer program product for pre-filtered anti-aliasing with deferred shading

A system, method, and computer program product are provided for generating anti-aliased images. The method includes the steps of assigning one or more samples to a plurality of clusters, each cluster in the plurality of clusters corresponding to an aggregate stored in an aggregate geometry buffer, where each of the one or more samples is covered by a visible fragment and rasterizing three-dimensional geometry to generate material parameters for each sample of the one or more samples. ... Nvidia Corporation

10/29/15 / #20150310798

Superresolution display using cascaded panels

System and method of displaying images in temporal superresolution by multiplicative superposition of cascaded display layers integrated in a display device. Using an original video with a target temporal resolution as a priori, a factorization process is performed to derive respective image data for presentation on each display layer. ... Nvidia Corporation

10/29/15 / #20150310789

Superresolution display using cascaded panels

System and method of displaying images in spatial/temporal superresolution by multiplicative superposition of cascaded display layers integrated in a display device. Using an original image with a target spatial/temporal resolution as a priori, a factorization process is performed to derive respective image data for presentation on each display layer. ... Nvidia Corporation

10/22/15 / #20150301761

System and method of protecting data in dynamically-allocated regions of memory

Embodiments of the claimed subject matter provide systems and methods for protecting data in dynamically allocated regions of memory. The method can include receiving the read request where the read request comprises a virtual address associated with a memory and determining a physical address associated with the virtual address. ... Nvidia Corporation

09/24/15 / #20150271853

Fourier transform for a signal to be transmitted on a random access channel

Provided is a recursive method and apparatus for processing a signal for determining a plurality of frequency components of the signal, the signal being a chirp-like polyphase sequence. In one embodiment, the method includes: (1) determining a first frequency component of the plurality of frequency components, (2) determining a component factor by accessing a factor table, (3) determining the second frequency component using the determined first frequency component and the determined component factor. ... Nvidia Corporation

09/24/15 / #20150270917

Estimating channel information

Disclosed is a method of providing channel state information for a desired downlink channel of a wireless communication system. In a configuration phase, the method comprises receiving on a signaling channel configuration information comprising an identifier of an interference source and an association which associates the identifier with at least one resource element not used for transmission on the desired downlink channel. ... Nvidia Corporation

09/17/15 / #20150263708

Low power master-slave flip-flop

A flip-flop circuit may include a master latch and a slave latch. Each latch may have a transparent mode and a storage mode. ... Nvidia Corporation

09/10/15 / #20150255365

Microelectronic package plate with edge recesses for improved alignment

A microelectronic package includes a package substrate with at least one semiconductor die mounted thereon and a plate coupled to the package substrate. The plate is configured with a first recess formed in a first edge of the plate and a second recess formed in a second edge of the plate wherein the first edge and the second edge are formed on opposing sides of the plate. ... Nvidia Corporation

09/10/15 / #20150253373

Dynamic yield prediction

Dynamic yield prediction. In accordance with a first method embodiment of the present invention, a computer-implemented method includes collecting sample test information from a plurality of test-only structures prior to completion of the first wafer, gathering finished test data from all die of the first wafer, after completion of the first wafer, constructing a yield prediction model based on the sample test information and on the finished test data, and predicting, using the model, a percentage of die of the first wafer that will meet a particular specification. ... Nvidia Corporation

08/27/15 / #20150243610

System, method, and computer program product for a high bandwidth bottom package

A system, method, and computer program product are provided for producing a high bandwidth bottom package of a die-on-package structure. The method includes the steps of receiving a bottom package comprising a substrate material having a top layer and an integrated circuit die that is coupled to the top layer of the substrate material. ... Nvidia Corporation

08/27/15 / #20150243234

Techniques for avoiding and remedying dc bias buildup on a flat panel variable refresh rate display

A method for driving a display panel having a variable refresh rate is disclosed. The method comprises receiving a current input frame from an image source. ... Nvidia Corporation

08/27/15 / #20150243233

Techniques for avoiding and remedying dc bias buildup on a flat panel variable refresh rate display

A method for driving a display panel having a variable refresh rate is disclosed. The method comprises receiving a current input frame from an image source. ... Nvidia Corporation

08/27/15 / #20150243057

Methods of rendering graphics by stroking paths

Methods of rendering graphics include defining one or more paths from a plurality of commands. The commands include corresponding coordinates and pen actions, and the commands generate sub-paths or curve segments. ... Nvidia Corporation

08/27/15 / #20150243048

System, method, and computer program product for performing one-dimesional searches in two-dimensional images

A system, method, and computer program product are provided for implementing a search of a digital image along a set of paths. The method includes the steps of selecting a set of paths in an image and identifying at least one feature pixel in the set of paths by comparing gradients for each of the pixels in the set of paths. ... Nvidia Corporation

08/27/15 / #20150242988

Methods of eliminating redundant rendering of frames

A method for reducing redundant rendering of frames includes receiving draw calls including state information for a frame. The method includes generating respective bounding boxes for the draw calls. ... Nvidia Corporation

08/27/15 / #20150241976

Wearable finger ring input device and controller

Systems and methods for remotely providing user input to different electronic devices based on user finger motions and/or gestures. A universal user input device assembles a motion sensor, control logic, a memory and a processor into a substantially ring-shaped housing that is wearable on a finger of a user. ... Nvidia Corporation

08/27/15 / #20150238875

System and method for multi-client control of an avatar using different, but related, views

A system for multi-client control of an avatar. In one embodiment, the system includes: (1) a game engine configured to execute game code configured to create a game in a game space and accept a response stream to allow said avatar to be controlled and (2) a cooperative play engine associated with said game engine for communication therewith and having a stereoscopic device driver configured to render left-eye and right-eye views of said game space, said cooperative play engine configured to: (2a) transmit said left-eye view toward a first client associated with a first player and (2b) transmit said right-eye view toward a second client associated with a second player.. ... Nvidia Corporation

08/27/15 / #20150238859

System and method for granting remote access to a video game executed on a video game console or network client

Systems for granting remote access to, and methods of playing, a video game executing on a video game console coupled to a computer network or video games executing on hosting clients of a computer network. One embodiment of the system includes: (1) a stream distributor configured to receive a video stream conveying a view of a gamespace of the video game from the video game console via the computer network and transmit the video stream toward a remote client via the computer network and (2) a response receiver associated with the stream distributor and configured to receive a response stream from the remote client via the computer network and transmit the response stream toward the video game console.. ... Nvidia Corporation

08/20/15 / #20150235695

Write assist scheme for low power sram

A write-assist memory includes a memory supply voltage and a column of sram cells that is controlled by a pair of bit lines, during a write operation. Additionally, the write-assist memory includes a write-assist unit that is coupled to the memory supply voltage and the column of sram cells and has a separable conductive line located between the pair of bit lines that provides a collapsible sram supply voltage to the column of sram cells based on a capacitive coupling of a control signal in the pair of bit lines, during the write operation. ... Nvidia Corporation

08/20/15 / #20150235681

Pseudo-differential read scheme for dual port ram

A memory read system includes a memory column having a plurality of dual port memory cells that are controlled by separate read word lines and a read bit line structure organized into upper and lower read bit line portions. Additionally, the memory read system also includes a pseudo-differential memory read unit coupled to the read bit line structure, wherein the upper and lower read bit line portions respectively control corresponding upper and lower local bit lines to provide a global bit line for the memory column. ... Nvidia Corporation

08/20/15 / #20150234963

Interface analysis for verification of digital circuits

A method for performing an interface analysis. The method includes identifying a first module included in a representation of a digital circuit. ... Nvidia Corporation

08/20/15 / #20150234659

Apparatus and method for asymmetric dual path processing

According to embodiments disclosed herein, there is disclosed a computer processor architecture; and in particular a computer processor, a method of operating the same, and a computer program product that makes use of an instruction set for the computer. In one embodiment, the computer processor includes: (1) a decode unit for decoding instruction packets fetched from a memory holding the instruction packets, (2) a control processing channel capable of performing control operations and (3) a data processing channel capable of performing data processing operations, wherein, in use the decode unit causes instructions of instruction packets comprising a plurality of only control instructions to be executed sequentially on the control processing channel, and wherein, in use the decode unit causes instructions of instruction packets comprising a plurality of instructions comprising at least one data processing instruction to be executed simultaneously on the data processing channel.. ... Nvidia Corporation

08/13/15 / #20150229921

Intra searches using inaccurate neighboring pixel data

One embodiment of the present invention sets forth a technique for performing an intra search. The technique includes performing a first intra search based on a first block size associated with a first pixel block included in a video frame to determine a first intra mode. ... Nvidia Corporation

08/13/15 / #20150229879

System and method for creating a video frame from a single video field

A system and method of producing a frame of a video image from an interlaced field. In one embodiment, the method includes: (1) creating an equal-intensity trace from present samples in the field, (2) recognizing an equal-intensity path in the equal-intensity trace, (3) at least partially straightening the equal-intensity path and (4) using the equal-intensity path to determine an intensity value for a missing sample in the frame.. ... Nvidia Corporation

08/13/15 / #20150229848

Method and system for generating an image including optically zoomed and digitally zoomed regions

A method for generating images. The method includes capturing first image data representing a first scene taken optically at a first magnification index, wherein the first image data comprises a first region of an image. ... Nvidia Corporation

08/13/15 / #20150229311

Oscillator frequency divider with improved phase noise

A gated divider circuit includes a windowing unit configured to generate windowing waveforms from input oscillator waveforms having a fixed duty cycle. Additionally, the gated divider circuit includes a gated output unit coupled to the windowing unit and configured to provide selected ones of the input oscillator waveforms as controlled by corresponding selected ones of the windowing waveforms. ... Nvidia Corporation

08/13/15 / #20150228226

Power-efficient steerable displays

A method for angularly varying backlight illumination of a backlit display device. The method comprises determining at least one subject position and angularly varying a backlight illumination of a displayed image. ... Nvidia Corporation

08/13/15 / #20150228055

Liquid crystal display overdrive interpolation circuit and method

A liquid crystal display (lcd) overdrive interpolation circuit and method, and an lcd drive system incorporating the circuit or method. In one embodiment, the circuit includes: (1) a diagonal interpolator operable to perform a diagonal interpolation along a diagonal direction in a lookup table based on to and from gray levels and (2) a further interpolator coupled to the diagonal interpolator and operable to perform a further interpolation based on a result of the diagonal interpolation and the from gray level.. ... Nvidia Corporation

08/13/15 / #20150228046

Automatically performing a trade-off between visual quality and latency during rendering of a video/graphics sequence

A method includes automatically capturing, through a processor of a data processing device communicatively coupled to a memory, one or more parameter(s) related to a visual quality of rendering of a video frame that is part of a sequence on a display unit communicatively coupled to the processor and one or more parameter(s) related to latency associated with the rendering of the video frame on the display unit. The sequence is a video and/or a graphics sequence. ... Nvidia Corporation

08/06/15 / #20150222284

System and method for dynamic frequency estimation for a spread-spectrum digital phase-locked loop

A digital phase-and-frequency controller. In one embodiment, the controller includes: (1) a first segment accumulator operable to accumulate errors while an accumulation-selection signal has a first value and (2) a second segment accumulator operable to accumulate errors while said accumulation-selection signal has a second value, and (3) circuitry operable to produce the control signal using the errors accumulated in the first segment accumulator while a use-selection signal has a first value and the errors accumulated in the second segment accumulator while the use-selection signal has a second value.. ... Nvidia Corporation

08/06/15 / #20150222266

Low tau synchronizer flip-flop with dual loop feedback approach to improve mean time between failure

A flip-flop and a method of receiving a digital signal from an asynchronous domain. In one embodiment, the flip-flop includes: (1) a first loop coupled to a flip-flop input and having first and second stable states and (2) a second loop coupled to the first loop and having the first and second stable states, properties of cross-coupled inverters in the first and second loops creating a metastable state skewed toward the first stable state in the first loop and skewed toward the second stable state in the second loop. ... Nvidia Corporation

08/06/15 / #20150221123

System and method for computing gathers using a single-instruction multiple-thread processor

Systems for, and methods of, computing gathers for processing on a simt processor. In one embodiment, the system includes: (1) a thread group creator executing on a processor and operable to assign ray traces pertaining to a single receiver to threads for execution by a simt processor and (2) a memory configured to contain at least some of the threads for execution by the simt processor.. ... Nvidia Corporation

08/06/15 / #20150221064

User distance based modification of a resolution of a display unit interfaced with a data processing device and/or a display area size thereon

A method includes obtaining, through a distance sensor in conjunction with a processor of a data processing device communicatively coupled to a memory, data related to a distance between a user of the data processing device and a display unit associated therewith. The method also includes automatically modifying, through the processor, a resolution of the display unit and/or a size of an area in which data is to be rendered on the display unit in accordance with the obtained data.. ... Nvidia Corporation

08/06/15 / #20150220675

System and method for routing buffered interconnects in an integrated circuit

A system and method for routing a buffered interconnect in an ic from a source cell to a target cell thereof. In one embodiment, the system includes: (1) a path tracer operable to designate the source cell as a current node and construct a path toward the target node by: (1a) defining a boundary about the current node based on a buffer driving length, (1b) trimming the boundary by any blockage therein to yield a candidate area for placing a buffer, (1c) dividing the boundary into line segments, (1d) selecting a closest, valid one of the line segments to the target cell as the current node and (1e) repeating the defining, trimming, dividing and selecting the closest, valid one until the current node lies within the buffer driving length and (2) a buffer placer associated with the path tracer and operable to select a location along the path to place the buffer.. ... Nvidia Corporation

08/06/15 / #20150220341

System, method, and computer program product for implementing software-based scoreboarding

A system, method, and computer program product are provided for implementing a software-based scoreboarding mechanism. The method includes the steps of receiving a dependency barrier instruction that includes an immediate value and an identifier corresponding to a first register and, based on a comparison of the immediate value to the value stored in the first register, dispatching a subsequent instruction to at least a first processing unit of two or more processing units.. ... Nvidia Corporation

08/06/15 / #20150220314

Control flow optimization for efficient program code execution on a processor

A method includes identifying a divergent region of interest (dri) not including a post dominator node thereof within a control flow graph, and introducing a decision node in the control flow graph such that the decision node post-dominates an entry point of the dri and is dominated by the entry point. The method also includes redirecting a regular control flow path within the control flow graph from another node previously coupled to the dri to the decision node, and redirecting a runaway path from the another node to the decision node. ... Nvidia Corporation

08/06/15 / #20150219697

Integrated circuit detection circuit for a digital multi-level strap and method of operation thereof

An integrated circuit (ic) based detection circuit for determining a strap value and a method of detecting a digital strap value. In one embodiment, the detection circuit includes: (1) a first receiver including transistors having first electrical characteristics that define a first threshold for the first receiver, the first receiver operable to generate a first binary digit based on an input signal and the first threshold and (2) a second receiver including transistors having second electrical characteristics that differ from the first electrical characteristics and define a second threshold for the second receiver that is lower than the first threshold, the second receiver operable to generate a second binary digit based on the input signal and the second threshold, the first and second binary digits indicating whether the strap value lies above the first threshold, between the first and second thresholds or below the second threshold.. ... Nvidia Corporation

07/30/15 / #20150216066

Integrated circuit package having improved coplanarity

One aspect of the present disclosure provides an ic package that includes a printed circuit board (pcb) having a first material layer located thereon. The first material layer has bond pads located therein that form a contact array defined by a perimeter. ... Nvidia Corporation

07/30/15 / #20150215512

System, method, and computer program product for determining a quantity of light received by an element of a scene

A system, method, and computer program product are provided for determining a quantity of light received by an element of a scene. In use, a quantity of light received by a first element of the scene is determined by averaging a quantity of light received by elements of the scene that are associated with a selected set of light paths.. ... Nvidia Corporation

07/30/15 / #20150214963

Phase lock loop (pll/fll) clock signal generation with frequency scaling to power supply voltage

A clock signal generation circuit provides an output clock signal to a digital system. The digital system is powered by a power supply voltage, vdd, that may include transients associated with the impedance of the packaged digital system. ... Nvidia Corporation

07/30/15 / #20150213855

Mode-changeable dual data rate random access memory driver with asymmetric offset and memory interface incorporating the same

A memory driver, a method of driving a command bus for a synchronous dual data rate (sddr) memory and a memory controller for controlling dynamic random-access memory (dram). In one embodiment, the memory driver includes: (1) pull-up and pull-down transistors couplable to a command bus of a memory controller and operable in 1n and 2n timing modes and (2) gear down offset circuitry coupled to the pull-up transistor and operable to offset the command bus when transitioning out of the 1n timing mode and increase an extent and duration of 1-0-1 transitions on the command bus.. ... Nvidia Corporation

07/30/15 / #20150213786

Method for changing a resolution of an image shown on a display

Provided is a method for changing a resolution of an image shown on a display. The method, in one embodiment, includes, providing an image on a display, and detecting a relative distance of an object to the display. ... Nvidia Corporation

07/30/15 / #20150213776

Computing system and method for automatically making a display configuration persistent

A computing system and method for automatically making a display configuration persistent. One embodiment of the computing system includes: (1) a video adapter coupled to a data bus and operable to interface a display configuration associated with extended display identification data (edid), (2) a cache configured to store the edid, and (3) a central processing unit (cpu) coupled to the data bus and the cache, and operable to execute a driver associated with the video adapter and configured to detect the display configuration and cause the edid to be written to the cache.. ... Nvidia Corporation

07/30/15 / #20150213752

Adjustable screen display size for an electronic device

One aspect provides a method for image display. The method for image display, in accordance with one embodiment, includes providing a display, the display having a maximum display area (amax) defined by a total number of pixels. ... Nvidia Corporation

07/30/15 / #20150213641

Barycentric filtering for measured biderectional scattering distribution function

The disclosure provides a method of determining reflected irradiance for a surface point on a surface whose reflectance properties are represented by a measured bsdf. Additionally, the disclosure provides a renderer and a computer program product. ... Nvidia Corporation

07/30/15 / #20150213640

Hybrid virtual 3d rendering approach to stereovision

A method for stereoscopically presenting visual content is disclosed. The method comprises identifying and distinguishing between a first type of content and a second type of content of a frame to be stereoscopically displayed. ... Nvidia Corporation

07/30/15 / #20150213638

Hierarchical tiled caching

One embodiment of the present invention includes a method for processing graphics objects. The method includes receiving a first draw-call and a second draw-call. ... Nvidia Corporation

07/30/15 / #20150213303

Image processing with facial reference images

Systems and methods are provided for capturing and processing digital images. During a capture session, an image capture system is configured to capture one or more subject images and one or more calibration images potentially containing the user's face under common lighting conditions. ... Nvidia Corporation

07/30/15 / #20150212933

Methods for reducing memory space in sequential operations using directed acyclic graphs

Various disclosed embodiments are directed to methods and systems for reducing memory space in sequential computer-implemented operations. The method includes generating a directed acyclic graph (dag) having a plurality of vertices and directed edges, wherein each edge connects a predecessor vertex to a successor vertex. ... Nvidia Corporation

07/30/15 / #20150212890

Graphics processing subsystem and method for recovering a video basic input/output system

A graphics processing subsystem and a method for recovering a video basic input/output system (vbios). One embodiment of the graphics processing subsystem includes: (1) a memory configured to store a vbios, and (2) a processor coupled to the memory and configured to employ a bridge to gain access to the vbios and cause the vbios to be written to the memory.. ... Nvidia Corporation

07/30/15 / #20150212819

System and processor for implementing interruptible batches of instructions

A system, method, and computer program product are provided for scheduling interruptible hatches of instructions for execution by one or more functional units of a processor. The method includes the steps of receiving a batch of instructions that includes a plurality of instructions and dispatching at least one instruction from the batch of instructions to one or more functional units for execution. ... Nvidia Corporation

07/30/15 / #20150212815

Methods and systems for maintenance and control of applications for performance tuning

Methods and systems for maintenance and control of multiple versions of an application are disclosed. The method includes creating a first version of the application comprising computer-executable instructions and executing the first version of the application. ... Nvidia Corporation

07/30/15 / #20150212631

System, method, and computer program product for multiple stimulus sensors for an input device

A system, method, and computer program product are provided for sensing input stimulus at an input device. The method includes the steps of configuring an input device comprising a first sensor layer and a second sensor layer to activate the first sensor layer and to deactivate the second sensor layer, where the second sensor layer is layered above the first sensor layer and associated with a stimulus device. ... Nvidia Corporation

07/30/15 / #20150212601

Stylus tool with deformable tip

A passive stylus with a deformable tip is described herein. In one embodiment, a thin annular body configured to be hand-held with a chisel shaped tip disposed at the first end of the body is provided. ... Nvidia Corporation

07/30/15 / #20150212600

Stylus tool with deformable tip

A passive stylus with a deformable tip is described herein. In one embodiment, a thin annular body configured to be hand-held with a tip disposed at the first end of the body is provided. ... Nvidia Corporation

07/30/15 / #20150212569

User space based performance state switching of a processor of a data processing device

A method includes capturing an interaction of a user of a data processing device therewith at a level of a user space through a process executing on the data processing device, and communicating the captured user interaction as an event from the user space to a kernel space associated with an operating system executing on the data processing device. The method also includes incorporating, through the kernel space, the communicated event as a feedback to an algorithm executing on a processor of the data processing device communicatively coupled to a memory. ... Nvidia Corporation

07/30/15 / #20150212154

Methods and apparatus for debugging lowest power states in system-on-chips

Methods and apparatus for debugging finite state machine are disclosed. The method includes implementing a debug logic circuit and connecting the debug logic circuit to a system on chip (soc) voltage source. ... Nvidia Corporation

07/30/15 / #20150212149

Degradation detector and method of detecting the aging of an integrated circuit

A degradation detector for an integrated circuit (ic), a method of detecting aging in an ic and an ic incorporating the degradation detector or the method. In one embodiment, the degradation detector includes: (1) an offline ring oscillator (ro) coupled to a power gate and a clock gate, (2) a frozen ro coupled to a clock gate, (3) an online ro and (4) an analyzer coupled to the offline ro, the frozen ro and the online ro and operable to place the degradation detector in a normal state in which the offline ro is disconnected from both the drive voltage source and the clock source, the frozen ro is connected to the drive voltage source but disconnected from the clock source and the online ro is connected to both the drive voltage source and the clock source.. ... Nvidia Corporation

07/30/15 / #20150209662

Cloud gaming system and method of initiating a gaming session

A gaming cloud gaming system and a method of initiating a gaming session. One embodiment of the gaming cloud gaming system includes a computing system having: (1) an entry point operable to receive a game session request and generate instructions for establishing a connection between a client and a game server, and (2) a dynamically configurable reverse proxy operable to proxy for the game server and configured to employ the instructions to create a route to a randomly selected port on the game server through which the connection is makeable.. ... Nvidia Corporation

07/23/15 / #20150208354

System and method for extending battery life of a mobile device providing content wirelessly to a remote display

A system for, and method of, extending the battery life of a mobile device providing content wirelessly and a mobile device incorporating the system or the method. In one embodiment, the system includes: (1) a power manager operable to generate a signal indicating that a low battery condition exists and (2) an audio/video subsystem operable to receive the signal and adjust at least one parameter controlling an encoding of the content to decrease a quality of the encoding.. ... Nvidia Corporation

07/23/15 / #20150208079

Adaptive frame type detection for real-time low-latency streaming servers

An enhanced display encoder system for a video stream source includes an enhanced video encoder that has parallel intra frame and inter frame encoding units for encoding a video frame, wherein an initial number of macroblocks is encoded to determine a scene change status of the video frame. Additionally, a video frame history unit determines an intra frame update status for the video frame from a past number of video frames, and an encoder selection unit selects the intra frame or inter frame encoding unit for further encoding of the video frame to support a wireless transmission based on the scene change status and the intra frame update status. ... Nvidia Corporation

07/23/15 / #20150208075

Memory management of motion vectors in high efficiency video coding motion vector prediction

In one embodiment of the present invention, a high efficiency video coding codec optimizes the memory resources used during motion vector (mv) prediction. As the codec processes block of pixels, known as coding units (cus), the codec performs read and write operations on a fixed-sized neighbor union buffer representing the mvs associated with processed cus. ... Nvidia Corporation

07/23/15 / #20150208072

Adaptive video compression based on motion

One embodiment of the present invention sets forth a technique for adaptively compressing video frames. The technique includes monitoring a motion vector associated with a video stream and encoding a first plurality of video frames included in the video stream based on a first video compression algorithm to generate first encoded video frames. ... Nvidia Corporation

07/23/15 / #20150207988

Interactive panoramic photography based on combined visual and inertial orientation tracking

A panoramic image is generated from a plurality of source images. A panoramic analysis engine samples a first source image and a second source image included in the plurality of source images to generate a first proxy image and a second proxy image, respectively. ... Nvidia Corporation

07/23/15 / #20150207975

Dct based flicker detection

One embodiment of the present invention sets forth a technique for reducing flicker in image frames captured with a rolling shutter. A flicker detection and correction engine selects a first channel from a first image frame for processing. ... Nvidia Corporation

07/23/15 / #20150207501

System and method for a dynamic voltage controlled oscillator

A system and method are provided for generating an adaptive clock signal, configured to track prevailing operating conditions within an integrated circuit. The method comprises transmitting a first signal edge to a row of cells within a memory instance, waiting for two or more selected cells within the row of cells to propagate corresponding responses based on the first signal edge, and generating a memory delay signature signal edge based on the corresponding responses. ... Nvidia Corporation

07/23/15 / #20150207231

Co-located antennas and an electronic device including the same

Provided is an antenna system. The antenna system, in this aspect, includes a loop antenna element, the loop antenna element having a positive loop antenna terminal end and a negative loop antenna terminal end. ... Nvidia Corporation

07/23/15 / #20150207230

Wideband loop antenna and an electronic device including the same

Provided is an antenna. In one aspect, the antenna includes a feed element having a first feed element end and a second feed element end, the first feed element end configured to electrically connect to a positive terminal of a transmission line. ... Nvidia Corporation

07/23/15 / #20150207228

Single element dual-feed antennas and an electronic device including the same

Provided is an antenna. The antenna, in this aspect, includes an inverted-f gps antenna structure, the inverted-f gps antenna structure embodying a gps feed element, a gps extending arm, and a ground element. ... Nvidia Corporation

07/23/15 / #20150207219

Wideband antenna and an electronic device including the same

Provided is an antenna. The antenna, in one embodiment, includes a feed element having a first feed element end and a second feed element end, the first feed element end configured to electrically connect to a positive terminal of a transmission line. ... Nvidia Corporation

07/23/15 / #20150206862

Package on package arrangement and method

A method of forming a package on package, semiconductor package arrangement is described. In one aspect, solder bumps on a lower surface of a first grid array package substrate are fused to corresponding unencapsulated solder bumps on an upper surface of a second grid array package substrate. ... Nvidia Corporation

07/23/15 / #20150206848

System, method, and computer program product for a cavity package-on-package structure

A system, method, and computer program product are provided for producing a cavity bottom package of a package-on-package structure. The method includes the steps of receiving a bottom package comprising a substrate material having a top layer including a first set of pads configured to be electrically coupled to a second set of pads of an integrated circuit die. ... Nvidia Corporation

07/23/15 / #20150206596

Managing a ring buffer shared by multiple processing engines

A technique for managing data processed by multiple processing engines comprises storing a first data block associated with a first processing engine in a first portion of a ring buffer memory, subsequent to storing the first data block, storing a second data block associated with a second processing engine in a second portion of the ring buffer memory, and receiving a second process complete signal from the second processing engine while waiting for a first process complete signal from the first processing engine. The technique further comprises receiving the first process complete signal from the first processing engine once the first processing engine completes processing of the first data block, and, upon receiving the first process complete signal, indicating that the first portion of the ring buffer memory is available for storing data other than the first data block.. ... Nvidia Corporation

07/23/15 / #20150206577

Hybrid approach to write assist for memory array

A hybrid write-assist memory system includes an array voltage supply and a static random access memory (sram) cell that is controlled by bit lines and a word line and employs a separable cell supply voltage coupled to the array voltage supply. Additionally, the hybrid write-assist memory system includes a supply voltage droop unit that is coupled to the sram cell and provides a voltage reduction of the separable cell supply voltage during a write operation. ... Nvidia Corporation

07/23/15 / #20150206576

Negative bit line write assist for memory array

A negative bit line write assist system includes an array voltage supply and a static random access memory (sram) cell that is coupled to the array voltage supply and controlled by bit lines during a write operation. Additionally, the negative bit line write assist system includes a bit line voltage unit that is coupled to the sram cell, wherein a distributed capacitance is controlled by a write assist command to provide generation of a negative bit line voltage during the write operation. ... Nvidia Corporation

07/23/15 / #20150206511

Leveraging compression for display buffer blit in a graphics system having an integrated graphics processing unit and a discrete graphics processing unit

A graphics system includes an integrated graphics processor and a discrete graphics processing unit. An intra-system bus coupled data from the discrete graphics processing unit to the integrated graphics processor. ... Nvidia Corporation

07/23/15 / #20150206504

Unified optimization method for end-to-end camera image processing for translating a sensor captured image to a display image

A computer implemented method of determining a latent image from an observed image is disclosed. The method comprises implementing a plurality of image processing operations within a single optimization framework, wherein the single optimization framework comprises solving a linear minimization expression. ... Nvidia Corporation

07/23/15 / #20150206285

Efficient approximate-nearest-neighbor (ann) search for high-quality collaborative filtering

A computer implemented method of performing an approximate-nearest-neighbor search is disclosed. The method comprises dividing an image into a plurality of tiles. ... Nvidia Corporation

07/23/15 / #20150206277

Unified memory systems and methods

The present invention facilitates efficient and effective utilization of unified virtual addresses across multiple components. In one embodiment, the presented new approach or solution uses operating system (os) allocation on the central processing unit (cpu) combined with graphics processing unit (gpu) driver mappings to provide a unified virtual address (va) across both gpu and cpu. ... Nvidia Corporation

07/23/15 / #20150206272

Selectively killing trapped multi-process service clients sharing the same hardware context

A method for handling parallel processing clients associated with a server in a gpu, the method comprising: receiving a failure indication for at least client running a thread in the gpu; determining threads in the gpu associated with the failing client; exiting threads in the gpu associated with the failing client; and continuing to execute remaining threads in the gpu for other clients running threads in the gpu.. . ... Nvidia Corporation

07/23/15 / #20150206271

System and method for increasing a graphics processing capability of a mobile device

A system for, and method of, increasing a graphics processing capability of a mobile device and a mobile device incorporating the system or the method. In one embodiment, the system includes: (1) a graphics application programming interface (api) operable to cause a graphics processing resource of the mobile device to render data generated by an application to yield rendered data and (2) a network interface associated with the mobile device and operable to: (2a) transmit at least some of the rendered data via a network link for postprocessing to yield postprocessed data and (2b) receive the postprocessed data for display on the mobile device.. ... Nvidia Corporation

07/23/15 / #20150206270

System and method for wirelessly sharing graphics processing resources and gpu tethering incorporating the same

A system and method for wirelessly sharing graphics processing resources and a mobile device incorporating the system or the method. In one embodiment, the system includes: (1) a call evaluator operable to receive a graphics call from an application and determine whether the call should be wirelessly directed to a shared graphics processing resource and (2) a tether interface associated with the call evaluator and operable to receive calls from the call evaluator that the call evaluator has determined should be wirelessly directed to the shared graphics processing resource and wirelessly direct the calls to the shared graphics processing resource.. ... Nvidia Corporation

07/23/15 / #20150205757

System, method, and computer program product for executing casting-arithmetic instructions

A system, method, and computer program product are provided for executing casting-arithmetic instructions. The method comprises receiving a casting-arithmetic instruction that specifies an arithmetic operation to be performed on input data and at least one casting operation of an input casting operation and an output casting operation. ... Nvidia Corporation

07/23/15 / #20150205711

Methods and systems for monitoring and logging software and hardware failures

Methods and systems monitor and log software and hardware failures (i.e. Errors) over a communication network. ... Nvidia Corporation

07/23/15 / #20150205636

Using high priority thread to boost cpu clock rate

When a computing system is running at a lower clock rate, in response to an event that triggers the computing system to increase the clock rate, a list of threads pending execution by the computing system is accessed. The list includes a thread that, when executed, causes the clock rate to increase. ... Nvidia Corporation

07/23/15 / #20150205607

Tree-based thread management

In one embodiment of the present invention, a streaming multiprocessor (sm) uses a tree of nodes to manage threads. Each node specifies a set of active threads and a program counter. ... Nvidia Corporation

07/23/15 / #20150205606

Tree-based thread management

In one embodiment of the present invention, a streaming multiprocessor (sm) uses a tree of nodes to manage threads. Each node specifies a set of active threads and a program counter. ... Nvidia Corporation

07/23/15 / #20150205590

Confluence analysis and loop fast-forwarding for improving simd execution efficiency

One embodiment of the present invention sets forth a method for causing thread convergence. The method includes determining that a control flow graph representing a first section of a program includes at least two non-overlapping paths that extend from a first divergent node to a candidate node. ... Nvidia Corporation

07/23/15 / #20150205589

System, method, and computer program product for improved power efficiency during program code execution

A system, method, and computer program product are provided for compiling a computer program comprising arithmetic operations having different requirements with respect to numeric dynamic range, numeric resolution, or any combination thereof. The method comprises generating a transformed graph representation of the computer program by applying propagation rules that provide for relaxed numeric requirements, where applicable, and generating output code based on the transformed graph representation. ... Nvidia Corporation

07/23/15 / #20150205586

System, method, and computer program product for bulk synchronous binary program translation and optimization

A system, method, and computer program product are provided for. The method includes the steps of executing a block of translated binary instructions by multiple threads and gathering profiling data during execution of the block of translated binary instructions. ... Nvidia Corporation

07/23/15 / #20150205572

Determination and application of audio processing presets in handheld devices

One embodiment of the present invention sets forth techniques for selecting an audio environment for a handheld device. A widget detects a first input via a specially designated input mechanism. ... Nvidia Corporation

07/23/15 / #20150205381

Mobile gaming controller with integrated virtual mouse

A method is enacted in a computer system operatively coupled to a hand-actuated input device. The method includes the action of determining automatically which form of user input to offer a process running on the computer system, the user input including position data from the input device. ... Nvidia Corporation

07/23/15 / #20150204945

Hybrid on-chip clock controller techniques for facilitating at-speed scan testing and scan architecture support

Various aspects described or referenced herein are directed to different methods, systems, and computer program products for implementing hybrid on-chip clock controller techniques for facilitating at-speed scan testing and scan architecture support.. . ... Nvidia Corporation

07/23/15 / #20150202533

Mapping touchscreen gestures to ergonomic controls across application scenes

A technique of implementing on-screen gestures associated with a software application comprises receiving a first control input that relates to a first scene associated with the software application, translating the first control input into a first set of instructions based on a first mapping, and providing the first set of instructions to an operating system that includes the first set of instructions in the software application, receiving a second control input that relates to a second scene associated with the software application, translating the second control input into a second set of instructions based on a second mapping, and providing the second set of instructions to the operating system, wherein the operating system is configured to include the second set of instructions in the software application.. . ... Nvidia Corporation

07/16/15 / #20150201219

System and method for pixel data compression

A system for, and method of, pixel data compression and a smartphone incorporating the system or the method. In one embodiment, the system includes: (1) a differential pulse code modulation encoder operable differentially to compress the two pixel values losslessly to yield two losslessly compressed pixel values and (2) an entropy encoder coupled to the differential pulse code modulation encoder and configured to receive and entropy-encode the losslessly compressed pixel values using a tiered technique to yield entropy-encoded, losslessly compressed pixel values. ... Nvidia Corporation

07/16/15 / #20150200541

Input rail dynamic power balancing and merging

A dynamic multiple input rail switching unit includes a plurality of dc input voltage rails and a rail switching section coupled to the plurality of dc input voltage rails that is configured to individually connect selected ones of the plurality of dc input voltage rails to a switched rail output. The dynamic multiple input rail switching unit also includes a rail selection section that is coupled to the rail switching section and configured to dynamically choose the selected ones by balancing rail supply currents from the plurality of dc input voltage rails based on rail supply current capacity margins and a switched rail output current. ... Nvidia Corporation

07/16/15 / #20150200020

Integrated circuit having an enhanced fuseless fuse structure, a method of manufacturing the same and a data structure for use with the fuseless fuse structure

An enhanced fuseless fuse structure is provided herein. Additionally, an ic with an enhanced fuseless fuse structure, a data structure that can be used with this structure and a method of manufacturing an ic are disclosed herein. ... Nvidia Corporation

07/16/15 / #20150200006

Sram write driver with improved drive strength

A subsystem configured to write data to a static random access memory cell employs a single n-channel mos device connected to ground in each leg of the bi-stable memory cell to overdrive the stored data. The subsystem implements the dual control required to effect matrix operation of the sram cell in the gate circuit of the single n-channel mos device in the drive path. ... Nvidia Corporation

07/16/15 / #20150199833

Hardware support for display features

One embodiment of the present invention sets forth a system for displaying images including a hardware display controller engine that receives a rendered image. The system also includes an output compositor that composites a first image and the rendered image to create a second composited image. ... Nvidia Corporation

07/16/15 / #20150199822

Pcie clock rate stepping for graphics and platform processors

Circuits, methods, and apparatus for modifying the data rate of a data bus. In a circuit having two processors coupled by a data bus, the processors each learn that the other is capable of operating at a modified data rate. ... Nvidia Corporation

07/16/15 / #20150199464

Floorplan anneal using perturbation of selected automated macro placement results

A method of designing a floorplan for an integrated circuit comprises executing one or more automated placement processes on one or more seed floorplans to generate at least one output floorplan for each of the one or more seed floorplans, wherein the one or more automated placement processes are included in a plurality of pre-selected automated placement processes. The method further comprises computing a quality score for each output floorplan and, based on the quality scores, selecting at least one of the output floorplans for further execution via at least one automated placement process included in the plurality of pre-selected automated placement processes.. ... Nvidia Corporation

07/16/15 / #20150199280

Method and system for implementing multi-stage translation of virtual addresses

A system and method are provided for implementing multi-stage translation of virtual addresses. The method includes the steps of receiving, at a first memory management unit, a memory request including a virtual address in a first address space, translating the virtual address to generate a second virtual address in a second address space, and transmitting a modified memory request including the second virtual address to a second memory management unit. ... Nvidia Corporation

07/16/15 / #20150199223

Approach to predictive verification of write integrity in a memory driver

A subsystem is configured to apply an offset voltage to a test, or canary, sram write driver circuit to create a condition that induces failure of the write operation. The offset voltage is incrementally increased until failure of the test write operation occurs in the canary sram circuit. ... Nvidia Corporation

07/16/15 / #20150199176

Power supply for ring-oscillator based true random number generator and method of generating true random numbers

A true random number generator, a method of generating a true random number and a system incorporating the generator or the method. In one embodiment, the generator includes: (1) a ring oscillator including inverting gates having power inputs and (2) a time-varying power supply coupled to the power inputs to provide power thereto and including power perturbation circuitry operable to perturb the power provided to at least one of the power inputs.. ... Nvidia Corporation

07/16/15 / #20150199165

Automatic proximity display switching for a miracast environment

A proximity display system includes a mobile device that is enabled for miracast sourcing and that provides a screen display. The proximity display system also includes a plurality of display units, which is enabled for miracast sinking and is also coupled to the mobile device. ... Nvidia Corporation

07/09/15 / #20150195521

Candidate motion vector selection systems and methods

The present invention facilitates efficient and effective encoding and motion detection. A system and method can include: receiving graphics frame information; performing a motion vector analysis including candidate selection utilizing motion vectors that processing has previously been initiated for; and performing an encoding utilizing results of the motion vector analysis. ... Nvidia Corporation

07/09/15 / #20150195482

Method, system and smartphone that chooses optimal image to reduce shutter shake

An image capturer for reducing the effect of shutter shake of a digital camera in a smartphone, a method of capturing an image employing a digital camera, and a smartphone. In one embodiment, the image capturer includes: (1) a control interface configured to receive a command to photograph a scene and (2) a best shot determiner, coupled to the control interface and configured to select, after a focused image of the scene has been acquired and in response to receiving the command, a captured image of the scene based on sharpness metrics.. ... Nvidia Corporation

07/09/15 / #20150195342

Remote configuration of data processing devices in a cluster computing system

A method includes implementing a cluster computing system including a number of data processing devices coupled to one another in a daisy-chain configuration and communicatively coupled to a server, executing a process on the server and executing an instance of the process on each data processing device. The method also includes remotely configuring, through the server, one or more specific parameter(s) of a display unit associated with a first data processing device, a screen of the display unit, a processor thereof, a memory communicatively coupled to the processor, an algorithm executing thereon and/or a power supply of the first data processing device based on the execution of the process. ... Nvidia Corporation

07/09/15 / #20150194951

Toggling a clocked component using a slow clock to address bias temperature instability aging

While a clocked component is not idle, the component receives a clock signal that is at a first frequency. When the clocked component is idle, the clock signal is changed to a non-zero second frequency that is less than the first frequency. ... Nvidia Corporation

07/09/15 / #20150194360

Integrated circuit package having improved coplanarity

One aspect of the present disclosure provides an ic substrate, comprising a first material layer located on a first side of the ic substrate, and a second material layer located on a second, opposing side of the ic substrate, wherein the second material layer has a higher coefficient of thermal expansion cte value than the first material layer.. . ... Nvidia Corporation

07/09/15 / #20150194157

System, method, and computer program product for artifact reduction in high-frequency regeneration audio signals

A system, method, and computer program product are provided for artifact reduction in high-frequency regeneration audio signals. In operation, a high-frequency regeneration (hfr) audio signal is received. ... Nvidia Corporation

07/09/15 / #20150194137

Method and apparatus for optimizing display updates on an interactive display device

A solution is proposed to perform display updates in a lower power user interface. According to one embodiment, the display panel is placed in the lower possible refresh rate that can be supported. ... Nvidia Corporation

07/09/15 / #20150194136

Method and system for keyframe detection when executing an application in a cloud based system providing virtualized graphics processing to remote servers

A method for switching, including initializing an instantiation of an application and performing graphics rendering to generate a plurality of rendered frames through execution of the application in order to generate a first video stream comprising the plurality of rendered frames. The method includes sequentially loading the plurality of rendered frames into one or more frame buffers, and determining when a first bitmap of a frame that is loaded into a corresponding frame buffer matches an application signature comprising a derivative of a master bitmap associated with a keyframe of the first video stream.. ... Nvidia Corporation

07/09/15 / #20150194128

Generating a low-latency transparency effect

One embodiment of the present invention sets forth a technique for generating a transparency effect for a computing device. The technique includes transmitting, to a camera, a synchronization signal associated with a refresh rate of a display. ... Nvidia Corporation

07/09/15 / #20150194111

Dc balancing techniques for a variable refresh rate display

A method for driving a display panel having a variable refresh rate is disclosed. The method comprises detecting a condition that results in a charge accumulation in the display panel using an accumulated difference in time duration between frames of positive polarity and frames of negative polarity received from an image source. ... Nvidia Corporation

07/09/15 / #20150193915

Technique for projecting an image onto a surface with a mobile device

A mobile device includes a projector configured to project images onto a target surface that resides within a projectable area. The mobile device identifies the target surface within the projectable area and then tracks that target surface as the mobile device is subject to different types of motion, including translation and rotation, among others. ... Nvidia Corporation

07/09/15 / #20150193907

Efficient cache management in a tiled architecture

A surface cache stores pixel data on behalf of a pixel processing pipeline that is configured to generate screen tiles. The surface cache assigns hint levels to cache lines storing pixel data according to whether that pixel data is likely to be needed again. ... Nvidia Corporation

07/09/15 / #20150193903

Efficient cache management in a tiled architecture

A surface cache stores pixel data on behalf of a pixel processing pipeline that is configured to generate screen tiles. The surface cache assigns hint levels to cache lines storing pixel data according to whether that pixel data is likely to be needed again. ... Nvidia Corporation

07/09/15 / #20150193358

Prioritized memory reads

A system includes a processing unit and a memory system coupled to the processing unit. The processing unit is configured to mark a memory access in the series of instructions as a priority memory access as a consequence of the memory access having a dependent instruction following less than a threshold distance after the memory access in the series of instructions. ... Nvidia Corporation

07/09/15 / #20150193272

System and processor that include an implementation of decoupled pipelines

A system and apparatus are provided that include an implementation for decoupled pipelines. The apparatus includes a scheduler configured to issue instructions to one or more functional units and a functional unit coupled to a queue having a number of slots for storing instructions. ... Nvidia Corporation

07/09/15 / #20150193203

Efficiency in a fused floating-point multiply-add unit

A four cycle fused floating point multiply-add unit includes a radix 8 booth encoder multiplier that is partitioned over two stages with the compression element allocated to the second stage. The unit further includes an improved shifter design. ... Nvidia Corporation

07/09/15 / #20150193062

Method and apparatus for buffering sensor input in a low power system state

A solution is proposed for processing input in a lower power user interface of touch-sensitive display panels. According to an embodiment, a mobile computing device is placed in the low power mode. ... Nvidia Corporation

07/09/15 / #20150192942

Voltage optimization circuit and managing voltage margins of an integrated circuit

A voltage margin controller, an ic included the same and a method of controlling voltage margin for a voltage domain of an ic are disclosed herein. In one embodiment, the voltage margin controller includes: (1) monitoring branches including circuit function indicators configured to indicate whether circuitry in the voltage domain could operate at corresponding candidate reduced voltage levels and (2) a voltage margin adjuster coupled to the monitoring branches and configured to develop a voltage margin adjustment for a voltage regulator of the voltage domain based upon an operating number of the circuit function indicators.. ... Nvidia Corporation

07/02/15 / #20150189126

Controlling content frame rate based on refresh rate of a display

A video frame producer, a method of generating content frames and a video viewing device are disclosed herein. In one embodiment, the video frame producer includes: (1) a content provider configured to generate content frames for a display and (2) a viewing smoother configured to direct the content provider to generate the content frames at a frame rate based on a display refresh rate of the display.. ... Nvidia Corporation

07/02/15 / #20150189012

Wireless display synchronization for mobile devices using buffer locking

One embodiment of the present invention includes techniques for synchronizing displays of a plurality of mobile devices over a wireless network. A processing unit renders an image frame related to a software application into an application image buffer associated with a first mobile device and causes a second mobile device to render a second image frame into a second application image buffer of the second mobile device. ... Nvidia Corporation

07/02/15 / #20150187256

Preventing fetch of occluded pixels for display processing and scan-out

One embodiment of the present invention includes techniques for compositing image surfaces to generate a display image for display. A display engine receives a first set of parameters associated with a first image surface stored in a memory. ... Nvidia Corporation

07/02/15 / #20150187135

Generating indirection maps for texture space effects

Embodiments of the present invention are directed to a novel approach for realistically modeling sub-surface scattering effects in three-dimensional objects of graphically rendered images. In an embodiment, an indirection map is generated for an image by analyzing the triangle mesh of one or more three-dimensional objects in the image and identifying pairs of edges between adjacent triangles in the mesh that have the same spatial locations in the three-dimensional representations, but which have different locations in the texture map. ... Nvidia Corporation

07/02/15 / #20150187129

Technique for pre-computing ambient obscurance

One embodiment of the present invention includes techniques for pre-computing ambient shadowing parameters for a computer-generated scene. A processing unit retrieves a reference object associated with the computer-generated scene and comprising a plurality of vertices. ... Nvidia Corporation

07/02/15 / #20150187126

Using indirection maps for rendering texture space effects

Embodiments of the present invention are directed to a novel approach for realistically modeling sub-surface scattering effects in three-dimensional objects of graphically rendered images. In an embodiment, an indirection map is generated for an image by analyzing the triangle mesh of one or more three-dimensional objects in the image and identifying pairs of edges between adjacent triangles in the mesh that have the same spatial locations in the three-dimensional representations, but which have different locations in the texture map. ... Nvidia Corporation

07/02/15 / #20150187041

Gpu and gpu computing system for providing a virtual machine and a method of manufacturing the same

Disclosed herein is a gpu for improved multitasking by a user, a gpu computing system including the gpu and a method of manufacturing a gpu system. In one embodiment, the gpu includes: (1) a video overlayer configured to create an operating area over a portion of a video image generated by the graphical processing unit and (2) an overlay interface configured to provide a virtual space input to the video overlayer to operate a virtual machine within the operating area.. ... Nvidia Corporation

06/25/15 / #20150180694

Radio frequency circuit for intra-band and inter-band carrier aggregation

A radio frequency (rf) circuit for intra-band and inter-band carrier aggregation includes a receive path configured to receive an input signal. The rf circuit includes a low noise amplifier which has multiple separate input stages and multiple separate output stages. ... Nvidia Corporation

06/25/15 / #20150179232

System and method for performing sram access assists using vss boost

A method and a system are provided for performing memory access assist using voltage boost. A memory access request is received at a storage cell array that comprises two or more subarrays, each subarray including at least one row of storage cells. ... Nvidia Corporation

06/25/15 / #20150179142

System, method, and computer program product for reduced-rate calculation of low-frequency pixel shader intermediate values

A system, method, and computer program product are provided for calculating shader program intermediate values. The method includes the steps of receiving a graphics primitive for processing according to a shader program including a first set of instructions and a second set of instructions, executing the first set of instructions by a processing pipeline to calculate multi-pixel intermediate values, executing the second set of instructions by the processing pipeline to calculate per-pixel values based on at least the multi-pixel intermediate values, and repeating the receiving and executing of the first and second sets of instructions for one or more additional graphics primitives.. ... Nvidia Corporation

06/25/15 / #20150178961

System, method, and computer program product for angular subdivision of quadratic bezier curves

A system, method, and computer program product are provided for subdividing a quadratic bezier curve. The method includes the steps of receiving a quadratic bezier curve defined by a plurality of control points including at least a first endpoint and a second endpoint. ... Nvidia Corporation

06/25/15 / #20150178932

Image analysis of display content for dynamic adjustment of a continuous scan display

Various embodiments relating to reducing memory bandwidth consumed by a continuous scan display screen are provided. In one embodiment, scoring criteria are applied to a reference image of a first image format having a first bit depth to generate an image conversion score. ... Nvidia Corporation

06/25/15 / #20150178879

System, method, and computer program product for simultaneous execution of compute and graphics workloads

A system, method, and computer program product are provided for allocating processor resources to process compute workloads and graphics workloads substantially simultaneously. The method includes the steps of allocating a plurality of processing units to process tasks associated with a graphics pipeline, receiving a request to allocate at least one processing unit in the plurality of processing units to process tasks associated with a compute pipeline, and reallocating the at least one processing unit to process tasks associated with the compute pipeline.. ... Nvidia Corporation

06/25/15 / #20150178085

System, method, and computer program product for remapping registers based on a change in execution mode

A system, method, and computer program product are provided for remapping registers based on a change in execution mode. A sequence of instructions is received for execution by a processor and a change in an execution mode from a first execution mode to a second execution mode within the sequence of instructions is identified, where a first register mapping is associated with the first execution mode and a second register mapping is associated with the second execution mode. ... Nvidia Corporation

06/25/15 / #20150177514

System, method, and computer program product for a pinlight see-through near-eye display

A system, method, and computer program product are provided for implementing a pinlight see-through near-eye display. Light cones configured to substantially fill a field-of-view corresponding to a pupil are generated by an array of pinlights positioned between a near focus plane and the pupil. ... Nvidia Corporation

06/18/15 / #20150171631

System, method, and computer program product for a swtich mode current balancing rail merge circuit

A system, method, and computer program product are provided for merging two or more supply rails into a merged supply rail. The method comprises receiving two or more current measurement signals associated with two or more supply rails, selecting one supply rail from the two or more supply rails, based on the current measurement signals, and enabling the selected supply rail to source current into a merged supply rail.. ... Nvidia Corporation

06/18/15 / #20150170409

Adaptive shading in a graphics processing pipeline

One embodiment of the present invention includes a parallel processing unit (ppu) that performs pixel shading at variable granularities. For effects that vary at a low frequency across a pixel block, a coarse shading unit performs the associated shading operations on a subset of the pixels in the pixel block. ... Nvidia Corporation

06/18/15 / #20150170408

Adaptive shading in a graphics processing pipeline

One embodiment of the present invention includes a parallel processing unit (ppu) that performs pixel shading at variable granularities. For effects that vary at a low frequency across a pixel block, a coarse shading unit performs the associated shading operations on a subset of the pixels in the pixel block. ... Nvidia Corporation

06/18/15 / #20150169289

Logic circuitry configurable to perform 32-bit or dual 16-bit floating-point operations

A system and method are provided for performing 32-bit or dual 16-bit floating-point arithmetic operations using logic circuitry. An operating mode that specifies an operating mode for a multiplication operation is received, where the operating mode is one of a 32-bit floating-point mode and a dual 16-bit floating-point mode. ... Nvidia Corporation

06/18/15 / #20150169101

Method and system for reduced power touch input detection on an electronic device using reduced scanning

Embodiments of the present invention can be configured to recognize and/or track certain types of touch input detected by a touch sensor, such as stylus input, during the performance of standard “full” touch scans in which each drive line of the touch sensor is generally scanned. Upon detection of these input types, “partial” touch scan operations can advantageously be performed which can dynamically reduce the number of lines scanned in a power-saving manner. ... Nvidia Corporation

06/11/15 / #20150163324

Approach to adaptive allocation of shared resources in computer systems

A request management subsystem is configured to establish service classes for clients that issue requests for a shared resource on a computer system. The subsystem also is configured to determine the state of the system with respect to bandwidth, current latency, frequency and voltage levels, among other characteristics. ... Nvidia Corporation

06/11/15 / #20150161810

Position based fluid dynamics simulation

Systems and methods for providing a mechanism of simulating fluid dynamics while maintaining the incompressibility of a fluid based on a position based dynamics (pbd) framework. A set of constraint equations that enforce constant density of the particles in a fluid object are formulated in terms of neighbor particle positions. ... Nvidia Corporation

06/11/15 / #20150160911

Enabling hardware acceleration in a computing device during a mosaic display mode of operation thereof

A method includes providing a memory unit in a computing device already including a number of processors communicatively coupled to a memory through a system bus, and providing a non-system bus based dedicated channel between the number of processors and the memory unit. The method also includes rendering a different video frame and/or a surface on each processor of the number of processors, and leveraging the memory unit to store a video frame and/or a surface rendered on a processor therein through the non-system bus based dedicated channel. ... Nvidia Corporation

06/04/15 / #20150156483

Providing a capability to simultaneously view and/or listen to multiple sets of data on one or more endpoint device(s) associated with a data processing device

A method includes interleaving, through a processor of a data processing device communicatively coupled to a memory and/or a processor of a data source communicatively coupled to the data processing device, each of a data and another data within a data frame. The each of the data and the another data corresponds to a distinct set of video data, image data and/or audio data. ... Nvidia Corporation

06/04/15 / #20150156143

System and method for side display on a multi-display mobile device

Embodiments of the present invention are operable to display content related to an application using side display screens installed on a multi-display mobile device. As such, embodiments of the present invention can make use of the display surface areas associated with side display screens to render content (e.g., notifications associated with an application) in a power efficient manner. ... Nvidia Corporation

06/04/15 / #20150154934

Method and system for customizing optimal settings using end-user preferences

Embodiments of the present invention provide a novel solution that uses subjective end-user input to generate optimal image quality settings for an application. Embodiments of the present invention enable end-users to rank and/or select various adjustable application parameter settings in a manner that allows them to specify which application parameters and/or settings are most desirable to them for a given application. ... Nvidia Corporation

06/04/15 / #20150154733

Stencil buffer data compression

A raster operations (rop) unit is configured to compress stencil values included in a stencil buffer. The rop unit divides the stencil values into groups, subdivides each group into two halves, and selects an anchor value for each half. ... Nvidia Corporation

06/04/15 / #20150154732

Compositing of surface buffers using page table manipulation

One embodiment of the present invention sets forth a method for compositing surface buffered data for display. The method includes identifying a first set of memory mappings that associates a first set of contiguous virtual addresses with a first set of image data. ... Nvidia Corporation

06/04/15 / #20150154036

Method of disseminating updated drivers to mobile computing devices and a dissemination system therefor

Disclosed herein are mobile computing devices that employ compatible updated drivers. In one embodiment, the mobile computing device includes: (1) a processor, (2) a driver library configured to store original drivers and updated drivers for applications on the mobile computing device, and (3) a driver selector configured to determine at least one driver from the original drivers or the updated drivers to use for running one of the applications.. ... Nvidia Corporation

06/04/15 / #20150153805

Dynamic voltage-frequency scaling to limit power transients

A clocked electronic device includes first and second control systems. The first control system is configured to decrease clock frequency in the device in response to decreasing supply voltage. ... Nvidia Corporation

06/04/15 / #20150153777

Electronic device with both inflexible display screen and flexible display screen

Systems and methods for providing a user interface by using a flexible display screen as well as an inflexible display screen. The dual display screens are installed on the same electronic device and may be used to display information simultaneously or alternatively. ... Nvidia Corporation

06/04/15 / #20150153544

Method and apparatus for augmenting and correcting mobile camera optics on a mobile device

Embodiments of the present invention utilize an attachable lens board that can be secured to the back of a mobile device and placed in a position that is proximate to the built-in camera lens associated with the camera system of the mobile device. As such, the lens board can be positioned to accurately align several different auxiliary camera lenses, each installed within various camera lens receivers formed within the lens board, with the built-in camera lens for focusing and/or image capture. ... Nvidia Corporation

05/28/15 / #20150149788

System, method, and computer program product for optimizing data encryption and decryption by implementing asymmetric aes-cbc channels

A system, method, and computer program product are provided for implementing asymmetric aes-cbc (advanced encryption standard-cipher block chaining) channels usage between encryption and decryption of data. In operation, data to be written to memory is identified. ... Nvidia Corporation

05/28/15 / #20150149713

Memory interface design

An improved memory interface design is provided. In some implementations, an integrated circuit includes a first cache memory unit, a second cache memory unit located in parallel with the first cache memory unit, and a floorsweeping module configured to be able to select between the first cache memory unit and the second cache memory unit for cache requests, wherein the selection is based at least partially on the presence or absence of one or more manufacturing defects in the first cache memory unit or the second cache memory unit.. ... Nvidia Corporation

05/28/15 / #20150146993

Generalization of methods and systems for image compression while encoding at least one extra bit

A method for encoding at least one extra bit in an image compression and decompression system. The method includes accessing an input image, and compressing the input image into a compressed image using an encoder system, wherein said encoding system implements an algorithm for encoding at least one extra bit. ... Nvidia Corporation

05/28/15 / #20150145871

System, method, and computer program product to enable the yielding of threads in a graphics processing unit to transfer control to a host processor

A method, system, and computer-program product are provided to enable the yielding by threads executing in a processing unit to transfer control to a host processor. The method includes the steps of receiving an intermediate representation of a program, replacing a yield instruction in the intermediate representation with a yield operation that includes one or more instructions, and compiling at least a portion of the modified intermediate representation into a machine code for execution on a parallel processing unit.. ... Nvidia Corporation

05/21/15 / #20150143347

Software development environment and method of compiling integrated source code

A software development environment (sde) and a method of compiling integrated source code. One embodiment of the sde includes: (1) a parser configured to partition an integrated source code into a host code partition and a device code partition, the host code partition including a reference to a device variable, (2) a translator configured to: (2a) embed device machine code, compiled based on the device code partition, into a modified host code, (2b) define a pointer in the modified host code configured to be initialized, upon execution of the integrated source code, to a memory address allocated to the device variable, and (2c) replace the reference with a dereference to the pointer, and (3) a host compiler configured to employ a host library to compile the modified host code.. ... Nvidia Corporation

05/21/15 / #20150143061

Partitioned register file

A system includes a processing unit and a register file. The register file includes at least a first memory structure and a second memory structure. ... Nvidia Corporation

05/21/15 / #20150143058

System, method, and computer program product for utilizing a data pointer table pre-fetcher

A system, method, and computer program product are provided for utilizing a data pointer table pre-fetcher. In use, an assembly of a data pointer table within a main memory is identified. ... Nvidia Corporation

05/21/15 / #20150141092

Electronic device and associated protective cover

Provided for herein is an electronic device. The electronic device, in one example, includes a housing having a housing width, housing height, housing thickness, and a front and a back, and a display positioned proximate the front of the housing. ... Nvidia Corporation

05/21/15 / #20150139543

System, method, and computer program product for enhancing an image utilizing a hyper-clarity transform

A system, method, and computer program product are provided for enhancing an image utilizing a hyper-clarity transform. In use, an image is identified. ... Nvidia Corporation

05/21/15 / #20150138697

Protective cover for an electronic device and method of manufacturing the same

Provided for herein is a protection device for an electronic device, comprising (1) a cover having a cover width, cover height and cover thickness; and (2) a spindle attached to an edge of the cover, the spindle configured to cooperatively engage a groove formed in a housing of the electronic device and couple the cover to the electronic device.. . ... Nvidia Corporation

05/21/15 / #20150138228

System, method, and computer program product for implementing anti-aliasing operations using a programmable sample pattern table

A system, method, and computer program product are provided for implementing anti-aliasing operations using a programmable sample pattern table. The method includes the steps of receiving an instruction that causes one or more values to be stored in one or more corresponding entries of the programmable sample pattern table and performing an anti-aliasing operation based on at least one value stored in the programmable sample pattern table. ... Nvidia Corporation

05/21/15 / #20150138065

Head-mounted integrated interface

A head mounted integrated interface (hmii) is presented that may include a wearable head-mounted display unit supporting two compact high resolution screens for outputting a right eye and left eye image in support of the stereoscopic viewing, wireless communication circuits, three-dimensional positioning and motion sensors, and a processing system which is capable of independent software processing and/or processing streamed output from a remote server. The hmii may also include a graphics processing unit capable of also functioning as a general parallel processing system and cameras positioned to track hand gestures. ... Nvidia Corporation

05/07/15 / #20150128083

Virtual keyboard with adaptive character recognition zones

A virtual keyboard with dynamically adjusted recognition zones for predicted user-intended characters. When a user interaction with the virtual keyboard is received on the virtual keyboard, a character in a recognition zone encompassing the detected interaction location is selected as the current input character. ... Nvidia Corporation

05/07/15 / #20150127860

Setting a pcie device id

One embodiment of the present invention includes a hard-coded first device id. The embodiment also includes a set of fuses that represents a second device id. ... Nvidia Corporation

05/07/15 / #20150127335

Voice trigger

Voice trigger. In accordance with a first method embodiment, a long term average audio energy is determined based on a one-bit pulse-density modulation bit stream. ... Nvidia Corporation

05/07/15 / #20150127333

Efficient digital microphone receiver process and system

A method for processing a bitstream starts by shifting a bitstream of a first sample of a signal into a buffer. The buffer also holds bits of one or more additional bitstreams for one or more additional samples of the signal. ... Nvidia Corporation

05/07/15 / #20150125091

System, method, and computer program product for performing fast, non-rigid registration for high dynamic range image stacks

A system, method, and computer program product are provided for performing fast, non-rigid registration for at least two images of a high-dynamic range image stack. The method includes the steps of generating a warped image based on a set of corresponding pixels, analyzing the warped image to detect unreliable pixels in the warped image, and generating a corrected pixel value for each unreliable pixel in the warped image. ... Nvidia Corporation

05/07/15 / #20150123977

Low latency and high performance synchronization mechanism amongst pixel pipe units

A method for synchronizing a plurality of pixel processing units is disclosed. The method includes sending a first trigger to a first pixel processing unit to execute a first operation on a portion of a frame of data. ... Nvidia Corporation

04/30/15 / #20150120674

Virtual program installation and state restoration

The description is directed to systems and methods for restoring a program state retained from a prior execution session on a virtual machine. On receiving a request to execute a program an image of user-independent files are mounted to a virtual machine. ... Nvidia Corporation

04/30/15 / #20150119149

Method and system for gathering time-varying metrics

Embodiments of the present invention provide a novel solution which can be used to detect and analyze instances of micro stutter within a given game, gpu and/or driver version. Embodiments of the present invention may be operable to divide an application session into a set of sub-sessions and perform multiple derivative calculations on time-varying application parameters (e.g., frame rates) measured during each sub-session. ... Nvidia Corporation

04/30/15 / #20150119142

Gamecasting techniques

One embodiment of the present invention sets forth a technique for broadcasting composited game content. The technique includes executing an application program to generate a first video frame of game content, and causing the first video frame to be displayed on a primary display device. ... Nvidia Corporation

04/30/15 / #20150117666

Providing multichannel audio data rendering capability in a data processing device

A method includes distinctly assigning, through a driver component, each audio channel of multichannel audio data in a memory of a data processing device to one or more audio endpoint device(s) of a number of audio endpoint devices communicatively coupled to the data processing device. Each audio endpoint device of the number of audio endpoint devices is capable of supporting a number of audio channels less than a number of audio channels of the multichannel audio data. ... Nvidia Corporation

04/30/15 / #20150117536

Video decoder techniques

Avc decoding techniques include parsing a set of alternating slices of one or more picture frames and parsing another set of alternating slices of the one or more picture frames. The parsed set of alternating slices of the one or more picture frames are buffered separately from the parsed other set of alternating slices of the one or more picture frames. ... Nvidia Corporation

04/30/15 / #20150116879

In-rush current limiting switch control

A subsystem is configured to apply a voltage source to a gated circuit domain in a manner that limits in-rush current and affords minimal time delay. A control signal turns on a wake-up switch that connects the voltage source to the domain. ... Nvidia Corporation

04/30/15 / #20150116523

Image signal processor and method for generating image statistics

An image signal processor (isp) and a method of generating image statistics. One embodiment of the isp includes: (1) a client configured to employ image statistics to process a current frame of a scene if changes in the current frame relative to a previous frame of the scene rise above a threshold, and (2) a statistics engine associated with the client and configured to generate the image statistics based on the current frame if the changes rise above the threshold.. ... Nvidia Corporation

04/30/15 / #20150116294

Power-efficient control of display data configured to be rendered on a display unit of a data processing device

A method includes scanning, through a processor of a data processing device communicatively coupled to a memory, display data to be rendered on a display unit communicatively coupled to the data processing device for boundaries of one or more virtual object(s) therein. The method also includes rendering, through the processor, a portion of the display data outside the boundaries of the one or more virtual object(s) at a reduced level compared to a portion of the display data within the boundaries on the display unit.. ... Nvidia Corporation

04/23/15 / #20150113538

Hierarchical staging areas for scheduling threads for execution

One embodiment of the present invention is a computer-implemented method for scheduling a thread group for execution on a processing engine that includes identifying a first thread group included in a first set of thread groups that can be issued for execution on the processing engine, where the first thread group includes one or more threads. The method also includes transferring the first thread group from the first set of thread groups to a second set of thread groups, allocating hardware resources to the first thread group, and selecting the first thread group from the second set of thread groups for execution on the processing engine. ... Nvidia Corporation

04/23/15 / #20150113527

Method and system for fast cloning of virtual machines

A method for network cloud resource generation, including creating a template virtual machine. The method includes creating an instantiation of a virtual machine for an end user by cloning the template, and loading an application executed by the virtual machine. ... Nvidia Corporation

04/23/15 / #20150113300

Battery operated computer system

Disclosed herein is a computer system operating on a local power supply of finite capacity has a plurality of system components each connected to a voltage supply system to draw current for their operation. The computer system includes a measuring circuit connected to detect prevailing usage of the local power supply, for example, a battery. ... Nvidia Corporation

04/23/15 / #20150113254

Efficiency through a distributed instruction set architecture

A subsystem is configured to support a distributed instruction set architecture with primary and secondary execution pipelines. The primary execution pipeline supports the execution of a subset of instructions in the distributed instruction set architecture that are issued frequently. ... Nvidia Corporation

04/23/15 / #20150112690

Low power always-on voice trigger architecture

The description is directed to systems and methods for a low-power, hands-free voice triggering of a main processing complex of a computing system to wake from a suspended state. An always-on voice activity detection module samples output received from a microphone in the computing system and determines whether a portion of the sampled output potentially contains a triggering keyphrase. ... Nvidia Corporation

04/23/15 / #20150111649

Framework to enable consumption of captured gameplay data over multiple mediums concurrently

A game recording unit includes a gaming data capture section coupled to a game playing unit and configured to capture gameplay audio and video data for processing as directed by a game user control input. The game recording unit also includes a gaming data processing section coupled to the gaming data capture section and configured to process the gameplay audio and video data, wherein the processing includes a manual mode, a gamecast mode and a shadow mode of gameplay capture. ... Nvidia Corporation

04/23/15 / #20150110455

Utility and method for capturing computer-generated video output

A video capture utility and method for a computer system. In one embodiment, the video capture utility includes: (1) a circular buffer allocated in a memory of the computer system to store at most a predefined video length, (2) a video output interceptor executable in a processor of the computer system and operable to receive and store video output most recently generated by an application program and (3) a video output extractor executable in the processor and operable to prompt contents of the circular buffer to be copied from the circular buffer to another location.. ... Nvidia Corporation

04/23/15 / #20150109486

Filtering extraneous image data in camera systems

In one embodiment of the present invention a camera system includes a frame screener that configures an image signal processor (isp) to ignore pixel data that does not contribute to image quality. For each image frame, the frame screener processes packets of pixel data. ... Nvidia Corporation

04/23/15 / #20150109473

Programming a camera sensor

One embodiment of the present invention sets forth a method for performing camera startup operations substantially in parallel. The method includes programming graphics hardware to perform one or more processing functions for a camera. ... Nvidia Corporation

04/23/15 / #20150109315

System, method, and computer program product for mapping tiles to physical memory locations

A system, method, and computer program product are provided for mapping tiles to physical memory locations. In use, a plurality of virtual tiles associated with a texture is identified. ... Nvidia Corporation

04/23/15 / #20150109309

Unified position based solver for visual effects

A method for simulating visual effects is disclosed. The method comprises modeling each visual effect within a simulation as a set of associated particles with associated constraints applicable thereto. ... Nvidia Corporation

04/23/15 / #20150109300

System and method for computing reduced-resolution indirect illumination using interpolated directional incoming radiance

A system for, and method of, computing reduced-resolution indirect illumination using interpolated directional incoming radiance and a graphics processing subsystem incorporating the system or the method. In one embodiment, the system includes: (1) a cone tracing shader executable in a graphics processing unit to compute directional incoming radiance cones for sparse pixels and project the directional incoming radiance cones on a basis and (2) an interpolation shader executable in the graphics processing unit to compute outgoing radiance values for untraced pixels based on directional incoming radiance values for neighboring ones of the sparse pixels.. ... Nvidia Corporation

04/23/15 / #20150109298

Computing system and method for representing volumetric data for a scene

A computing system and method for representing volumetric data for a scene. One embodiment of the computing system includes: (1) a memory configured to store a three-dimensional (3d) clipmap data structure having at least one clip level and at least one mip level, and (2) a processor configured to generate voxelized data for a scene and cause the voxelized data to be stored in the 3d clipmap data structure.. ... Nvidia Corporation

04/23/15 / #20150109297

Graphics processing subsystem and method for computing a three-dimensional clipmap

A graphics processing subsystem and method for computing a 3d clipmap. One embodiment of the subsystem includes: (1) a renderer operable to render a primitive surface representable by a 3d clipmap, (2) a geometry shader (gs) configured to select respective major-plane viewports for a plurality of clipmap levels, the major-plane viewports being sized to represent full spatial extents of the 3d clipmap relative to a render target (rt) for the plurality of clipmap levels, (3) a rasterizer configured to employ the respective major-plane viewports and the rt to rasterize a projection of the primitive surface onto a major plane corresponding to the respective major-plane viewports into pixels representing fragments of the primitive surface for each of the plurality of clipmap levels, and (4) a plurality of pixel shader (ps) instances configured to transform the fragments into respective voxels in the plurality of clipmap levels, thereby voxelizing the primitive surface.. ... Nvidia Corporation

04/23/15 / #20150109296

Graphics processing subsystem and method for updating voxel representation of a scene

A graphics processing subsystem and method for updating a voxel representation of a scene. One embodiment of the graphics processing subsystem includes: (1) a memory configured to store a voxel representation of a scene having first and second regions to be updated, and (2) a graphics processing unit (gpu) operable to: (2a) unify the first and second regions into a bounding region if a volume thereof does not exceed summed volumes of the first and second regions by more than a tolerance, and (2b) generate voxels for the bounding region and cause the voxels to be stored in the voxel representation.. ... Nvidia Corporation

04/23/15 / #20150109289

Method and apparatus for simulating stiff stacks

A computer implemented method of simulating a stack of objects represented as data within memory of a computer system is disclosed. The method comprises modeling the stack within a computer simulation as a set of associated primitives with associated constraints thereto in the memory, wherein the stack comprises a plurality of layers and wherein each layer comprises at least one primitive. ... Nvidia Corporation

04/23/15 / #20150109286

System, method, and computer program product for combining low motion blur and variable refresh rate in a display

A system, method, and computer program product are provided for combining low motion blur and variable refresh rate in a display. In one embodiment, a hold-type display is operated in a first mode of operation where the hold-type display is dynamically refreshed such that the hold type display handles updates to image frames at unpredictable times and where for each of the image frames a backlight of the hold-type display is activated for an entire duration of display of the image frame. ... Nvidia Corporation

04/23/15 / #20150108934

Distributed fan control

A device for processing graphics data may include a plurality of graphics processing units. The device may include a fan to dissipate thermal energy generated during the operation of the plurality of graphics processing units. ... Nvidia Corporation

04/16/15 / #20150106729

Remotely controlling one or more display unit(s) communicatively coupled to a data processing device and/or display data rendered thereon

A method includes executing a process on a data processing device, and defining, through a driver component, mapping between: the process and a display unit communicatively coupled to the data processing device, and one or more other processes executing on the data processing device and one or more other display unit(s) communicatively coupled to the data processing device. Based on the execution of the process on the data processing device, the method also includes providing a capability to: preview display data rendered on the one or more other display unit(s) through the display unit in a user interface provided through the process, and configure the display data rendered on the one or more other display unit(s) and/or one or more parameter(s) associated with the display data rendered on the one or more other display unit(s) and/or the one or more other display unit(s) directly through the preview.. ... Nvidia Corporation

04/16/15 / #20150106634

System and method for providing low-voltage, self-powered voltage multi-sensing feedback

A system and method are provided for regulating a supply voltage of a device. The method includes the steps of determining whether a supply voltage for an analog multiplexor is below a threshold voltage. ... Nvidia Corporation

04/16/15 / #20150103894

Systems and methods to limit lag between a client and a server for remote computing

Novel solutions are described herein for providing a consistent quality of service, latency-wise, for remote processing by managing the process queues in a processing server and temporarily pausing frame production and delivery to limit the lag experienced by a user in a client device. The claimed embodiments limit the latency (lag) experienced by a user by preventing the production rate of rendered frames at the server from significantly outperforming the decoding and display of the received frames in the client device and avoiding the resultant lag.. ... Nvidia Corporation

04/16/15 / #20150103880

Adaptive video compression for latency control

One embodiment of the present invention sets forth a technique for adaptively compressing video frames. The technique includes encoding a first plurality of video frames based on a first video compression algorithm to generate first encoded video frames and transmitting the first encoded video frames to a client device. ... Nvidia Corporation

04/16/15 / #20150103584

Configurable delay circuit and method of clock buffering

A configurable delay circuit and a method of clock buffering. One embodiment of the configurable delay circuit includes: (1) a first delay stage electrically couplable in series to a second delay stage, the first delay stage and the second delay stage each having an input port electrically coupled to a signal source, and (2) a delay path select circuit electrically coupled between the first delay stage and the second delay stage, and operable to select between a delay path including the first delay stage and another delay path including the first delay stage and the second delay stage.. ... Nvidia Corporation

04/16/15 / #20150103252

System, method, and computer program product for gamma correction in a video or image processing engine

A system and method are provided for generating a gamma adjusted value. The method comprises generating a logarithm space representation of an input value by computing a logarithm of the input value, computing a logarithm space gamma-adjusted value by multiplying the logarithm space representation with a current gamma value, and generating the gamma adjusted value by computing an antilogarithm of the logarithm space gamma-adjusted value.. ... Nvidia Corporation

04/16/15 / #20150103193

Method and apparatus for long term image exposure with image stabilization on a mobile device

A method for displaying a live preview image on a mobile device is disclosed. The method comprises computing a history color value and confidence value for each pixel of a sensor of a camera on the device. ... Nvidia Corporation

04/16/15 / #20150103184

Method and system for visual tracking of a subject for automatic metering using a mobile device

Embodiments of the present invention provide a novel solution that enables mobile devices to continuously track interesting subjects by creating dynamic visual models that can be used to detect and track subjects in-real time through total occlusion or even if a subject temporarily leaves the mobile device's field of view. Additionally, embodiments of the present invention use an online learning scheme that dynamically adjusts tracking procedures responsive to any appearance and/or environmental changes associated with an interesting subject that may occur over a period of time. ... Nvidia Corporation

04/16/15 / #20150103183

Method and apparatus for device orientation tracking using a visual gyroscope

A method for tracking device orientation on a portable device is disclosed. The method comprises initializing a device orientation to a sensor orientation, wherein the sensor orientation is based on information from an inertial measurement unit (imu) sensor. ... Nvidia Corporation

04/16/15 / #20150103087

System, method, and computer program product for discarding pixel samples

A system, method, and computer program product are provided for discarding pixel samples. The method includes the steps of completing shading operations for a pixel set including one or more pixels to generate per-sample shaded attributes according to a shader program executed by a processing pipeline. ... Nvidia Corporation

04/16/15 / #20150102799

Jitter determination of noisy electrical signals

A jitter analysis system includes an electronic circuit having a noisy electrical signal with jitter along a baseline of the signal. The jitter analysis system also includes a sampling unit coupled to the noisy electrical signal that provides waveform samples of the noisy electrical timing signal and a jitter detection unit coupled to the sampling unit that provides baseline crossings of the noisy electrical signal, wherein the baseline crossings are determined from a selection of the waveform samples proximate the baseline of the signal. ... Nvidia Corporation

04/16/15 / #20150102788

Energy-based control of a switching regulator

A system and method are provided for controlling a switching voltage regulator circuit. An energy difference between a stored energy of a switching voltage regulator and a target energy is determined. ... Nvidia Corporation

04/16/15 / #20150102483

Microelectronic package with stress-tolerant solder bump pattern

A microelectronic package includes larger diameter solder bumps and smaller diameter solder bumps for coupling an interposer to a packaging substrate. The larger diameter solder bumps are positioned on a peripheral surface of the interposer and the smaller diameter solder bumps are positioned on a center surface of the interposer. ... Nvidia Corporation

04/09/15 / #20150100884

Hardware overlay assignment

An aspect of the present invention proposes a novel approach that can reduce the total number of the overlays to be composited during the display of graphical output in a mobile computing device. As a result, the total number of memory bandwidth and the usage of a graphics processing unit by a pre-compositor can be decreased significantly. ... Nvidia Corporation

04/09/15 / #20150100840

Scan systems and methods

Efficient scan system presented can comprise: an array including a plurality of array non scannable components and a plurality of array quasi-scannable components wherein each column of the array includes at least one of the plurality of array quasi-scannable components; and an input interface configured to receive and selectively forward data and scan information to at least a portion of the array. At least a portion of the plurality of array quasi-scannable components can form a diagonal pattern in the array. ... Nvidia Corporation

04/09/15 / #20150100802

Reducing power consumption in multi-display environments

The disclosure is directed to a system and method for selectively controlling display power consumption in a system with a first and second display. While the system is in a non-idle state and while an application that is actively executing has an active window on the first display, a determination is made that the second display is inactive. ... Nvidia Corporation

04/09/15 / #20150100764

Dynamically detecting uniformity and eliminating redundant computations to reduce power consumption

One embodiment of the present invention includes techniques to decrease power consumption by reducing the number of redundant operations performed. In operation, a streamlining multiprocessor (sm) identifies uniform groups of threads that, when executed, apply the same deterministic operation to uniform sets of input operands. ... Nvidia Corporation

04/09/15 / #20150100324

Audio encoder performance for miracast

A method for encoding audio comprises receiving an unencoded audio signal and monitoring a user interface for user interface events. The method continues by selecting one of a plurality of transform windows to hold a defined quantity of audio samples based upon a detected one or more user interface interaction events and associated transient information. ... Nvidia Corporation

04/09/15 / #20150098020

Method and system for buffer level based frame rate recovery

Embodiments of the present invention can measure internal buffer levels (e.g., queue levels) within the sink device and dynamically adjust step size values responsive to buffer level conditions that dynamically alter the sink frame rate. As such, embodiments of the present invention can find an equivalent of the source device frame rate on the sink device based on the sink device's own clock speed. ... Nvidia Corporation

04/09/15 / #20150097851

Approach to caching decoded texture data with variable dimensions

A texture processing pipeline is configured to store decoded texture data within a cache unit in order to expedite the processing of texture requests. When a texture request is processed, the texture processing pipeline queries the cache unit to determine whether the requested data is resident in the cache. ... Nvidia Corporation

04/09/15 / #20150097847

Managing memory regions to support sparse mappings

One embodiment of the present invention includes a memory management unit (mmu) that is configured to manage sparse mappings. The mmu processes requests to translate virtual addresses to physical addresses based on page table entries (ptes) that indicate a sparse status. ... Nvidia Corporation

04/09/15 / #20150097845

Heuristics for improving performance in a tile-based architecture

One embodiment of the present invention includes a technique for processing graphics primitives in a tile-based architecture. The technique includes storing, in a buffer, a first plurality of graphics primitives and a first plurality of state bundles received from a world-space pipeline, and transmitting the first plurality of graphics primitives to a screen-space pipeline for processing while a tiling function is enabled. ... Nvidia Corporation

04/09/15 / #20150097844

Split driver to control multiple graphics processors in a computer system

A computer system includes an operating system having a kernel and configured to launch a plurality of computing processes. The system also includes a plurality of graphics processing units (gpus), a front-end driver module, and a plurality of back-end driver modules. ... Nvidia Corporation

04/02/15 / #20150095980

Controlling sharing of content between data processing devices

A method includes executing an instance of a process on each of a data processing device and one or more another data processing device(s), and authenticating, registering or pairing the one or more another data processing device(s) with the data processing device through a personal area network (pan) associated with a user of the data processing device and/or a computer network based on an identifier. The method also includes sharing content generated and/or stored in the data processing device with the one or more another data processing device(s) through the pan and/or the computer network, and providing, through the execution of the instance of the process, a capability to the user of the data processing device to control the sharing of the content with the one or more another data processing device(s). ... Nvidia Corporation

04/02/15 / #20150095394

Math processing by detection of elementary valued operands

One embodiment of the present invention includes a method for simplifying arithmetic operations by detecting operands with elementary values such as zero or 1.0. Computer and graphics processing systems perform a great number of multiply-add operations. ... Nvidia Corporation

04/02/15 / #20150095006

Mass conserving eulerian fluid simulation

A simulation engine performs a mass-conserving eulerian fluid simulation by manipulating the distribution of density between nodes associated with the fluid simulation. The simulation engine traces a velocity field upstream to identify the source of mass that currently resides at a given node. ... Nvidia Corporation

04/02/15 / #20150093024

System, method, and computer program product for joint color and depth encoding

A system and method are provided for performing joint color and depth encoding. Color data and depth data for an image is received. ... Nvidia Corporation

04/02/15 / #20150092344

Push pin and graphics card with the push pin

The invention discloses a push pin and a graphics card with the push pin. The push pin comprises a rod, a head, an expansion lock and a first spring. ... Nvidia Corporation

04/02/15 / #20150091912

Independent memory heaps for scalable link interface technology

A method to render graphics on a computer system having a plurality of graphics-processing units (gpus) includes the acts of instantiating an independent physical-memory allocator for each gpu, receiving a physical-memory allocation request from a graphics-driver process, and passing the request to one of the independent physical-memory allocators. The method also includes creating a local physical-memory descriptor to reference physical memory on the gpu associated with that physical-memory allocator, assigning a physical-memory handle to the local physical-memory descriptor, and returning the physical-memory handle to the graphics-driver process to fulfill a subsequent memory-map request from the graphics-driver process.. ... Nvidia Corporation

03/26/15 / #20150089288

Technique for establishing an audio socket debug connection

A debug controller monitors a tip-ring-ring-shield (trrs) socket, within a form factor device, to detect whether a debug unit is transmitting a request for a trrs socket debug connection. The form factor device also includes a system on chip (soc), a switch, and an audio codec. ... Nvidia Corporation

03/26/15 / #20150089284

Approach to reducing voltage noise in a stalled data pipeline

Computer and graphics processing elements, connected generally in series, form a pipeline. Circuit elements known as di/dt throttles are inserted within the pipeline at strategic locations where the potential exists for data flow to transition from an idle state to a maximum data processing rate. ... Nvidia Corporation

03/26/15 / #20150089218

Secure storage with scsi storage devices

A security command protocol provides secure authenticated access to an auxiliary security memory within a scsi storage device. The auxiliary security memory acts as an authenticated separate secure storage area that stores sensitive data separately from the user data area of the scsi storage device. ... Nvidia Corporation

03/26/15 / #20150089207

Technique for counting values in a register

A parallel counter accesses data generated by an application and stored within a register. The register includes different segments that include different portions of the application data. ... Nvidia Corporation

03/26/15 / #20150089202

System, method, and computer program product for implementing multi-cycle register file bypass

A system, method, and computer program product are provided for implementing a multi-cycle register file bypass mechanism. The method includes the steps of receiving a set of control bits, combining the set of control bits with a set of valid bits associated with previously issued instructions, and enabling a bypass path for each thread based on the set of control bits and the set of valid bits. ... Nvidia Corporation

03/26/15 / #20150089198

Technique for reducing voltage droop by throttling instruction issue rate

An issue control unit is configured to control the rate at which an instruction issue unit issues instructions to an execution pipeline in order to avoid spikes in power drawn by that execution pipeline. The issue control unit maintains a history buffer that reflects, for n previous cycles, the number of instructions issued during each of those n cycles. ... Nvidia Corporation

03/26/15 / #20150089151

Surface resource view hash for coherent cache operations in texture processing hardware

Techniques are disclosed for performing memory access operations. A texture unit receives a memory access operation that includes a tuple associated with a first view in a plurality of views. ... Nvidia Corporation

03/26/15 / #20150085159

Multiple image capture and processing

Various embodiments relating to image capture with a camera and generation of a processed image having desired image characteristics are provided. In one embodiment, a plurality of images of a scene captured by a camera and associated image metadata are stored. ... Nvidia Corporation

03/26/15 / #20150085146

Method and system for storing contact information in an image using a mobile device

Using face detection procedures, embodiments of the present invention can detect the presence of multiple of contacts within an image. Embodiments of the present invention can also associate the faces detected within the image with contacts belonging to a list of contacts stored on a mobile device. ... Nvidia Corporation

03/26/15 / #20150085145

Multiple image capture and processing

Various embodiments relating to image capture with a camera and generation of a processed image having desired image characteristics are provided. In one embodiment, a suggested range of values of one or more image characteristics based on preferences of one or more sources is received. ... Nvidia Corporation

03/26/15 / #20150084975

Load/store operations in texture hardware

Approaches are disclosed for performing memory access operations in a texture processing pipeline having a first portion configured to process texture memory access operations and a second portion configured to process non-texture memory access operations. A texture unit receives a memory access request. ... Nvidia Corporation

03/26/15 / #20150084974

Techniques for interleaving surfaces

One embodiment sets forth a method for allocating memory to surfaces. A software application specifies surface data, including interleaving state data. ... Nvidia Corporation

03/26/15 / #20150084952

System, method, and computer program product for rendering a screen-aligned rectangle primitive

A system, method, and computer program product are provided for processing a screen-aligned rectangle within a processing pipeline. The method includes the steps of determining coordinates for a screen-aligned rectangle by projecting a specification line onto a screen-space plane, computing a plane equation associated with the specification line, and rasterizing the screen-aligned rectangle that is within the screen-space plane based on the coordinates and the plane equation. ... Nvidia Corporation

03/26/15 / #20150084583

Control of wireless battery charging

One embodiment provides a method to store electrical energy in an electronic device, which has a central processing unit (cpu) to provide operating-system and application processing in the device. The method includes controlling, from the cpu of the electronic device, communication sent from the device and received at a wireless charger within communication range of the device. ... Nvidia Corporation

03/19/15 / #20150082444

Security mode configuration procedures in wireless devices

A method of detecting an error in a security mode configuration procedure conducted at a radio access network is provided. A cell update message is transmitted which causes the radio access network to abort a security mode configuration procedure. ... Nvidia Corporation

03/19/15 / #20150082075

Technique for scaling the bandwidth of a processing element to match the bandwidth of an interconnect

A transmitter is configured to scale up a low bandwidth delivered by a first processing element to match a higher bandwidth associated with an interconnect. A receiver is configured to scale down the high bandwidth delivered by the interconnect to match the lower bandwidth associated with a second processing element. ... Nvidia Corporation

03/19/15 / #20150082074

Technique for scaling the bandwidth of a processing element to match the bandwidth of an interconnect

A transmitter is configured to scale up a low bandwidth delivered by a first processing element to match a higher bandwidth associated with an interconnect. A receiver is configured to scale down the high bandwidth delivered by the interconnect to match the lower bandwidth associated with a second processing element. ... Nvidia Corporation

03/19/15 / #20150082001

Techniques for supporting for demand paging

One embodiment of the present invention includes techniques to support demand paging across a processing unit. Before a host unit transmits a command to an engine that does not tolerate page faults, the host unit ensures that the virtual memory addresses associated with the command are appropriately mapped to physical memory addresses. ... Nvidia Corporation

03/19/15 / #20150081937

Snoop and replay for bus communications

Systems and devices configured to implement techniques for ensuring the completion of transactions while minimizing latency and power consumption are described. A device may be operably coupled to a bidirectional communications bus. ... Nvidia Corporation

03/19/15 / #20150081866

System and method for sharing special-purpose processing resources

A special-purpose processing system, a method of carrying out sharing special-purpose processing resources and a graphics processing system. In one embodiment, the special-purpose processing system includes: (1) a special-purpose processing resource and (2) a representational state transfer (rest) application programming interface operable to process data using the special-purpose processing resource in response to stateless commands based on a standard protocol selected from the group consisting of: (2a) a standard network protocol and (2b) a standard database query protocol.. ... Nvidia Corporation

03/19/15 / #20150081761

Determining format compatibility across a data processing device and another data processing device prior to transfer of a multimedia file therebetween

A method includes executing an instance of a process on a data processing device and another data processing device, and setting up a personal area network (pan) through registering or pairing the another data processing device with the data processing device based on an identifier thereof. The method also includes initiating transfer of a multimedia file from the data processing device to the another data processing device through the instance of the process executing on the data processing device, and transmitting, metadata associated with the multimedia file from the data processing device to the another data processing device. ... Nvidia Corporation

03/19/15 / #20150081753

Technique for performing arbitrary width integer arithmetic operations using fixed width elements

One embodiment of the present invention includes a method for performing arithmetic operations on arbitrary width integers using fixed width elements. The method includes receiving a plurality of input operands, segmenting each input operand into multiple sectors, performing a plurality of multiply-add operations based on the multiple sectors to generate a plurality of multiply-add operation results, and combining the multiply-add operation results to generate a final result. ... Nvidia Corporation

03/19/15 / #20150081175

Vehicle user preference system and method of use thereof

A vehicle user preference system and a method of applying user preferences. One embodiment of the vehicle user preference system includes: (1) a memory configured to store a user preference data structure, according to which user preferences are stored, (2) a bluetooth communication interface operable to gain access to a device id profile (dip) identifying a mobile device communicably coupled thereto and associated with the user preference data structure, and (3) a processor communicably coupled to the memory and the bluetooth communication interface, and configured to employ the dip in gaining access to the user preference data structure, and cause the user preferences to be applied to vehicle subsystems.. ... Nvidia Corporation

03/19/15 / #20150079948

Call establishment

A modem for use at a terminal, the modem comprising: a first interface arranged to connect to a communications network; a second interface arranged to connect to a host processor on the terminal; and a processing unit, the processing unit configured to: detect that a call is to be established over the communications network; in response to said detection, perform a call setup procedure; determine if the call setup procedure has been successful or has failed due to failure of a security procedure; and in response to determining that the call setup procedure has failed due to failure of a security procedure, repeat said call setup procedure without indicating failure of the call setup procedure to a user of said terminal.. . ... Nvidia Corporation

03/19/15 / #20150077918

Stiffening electronic packages

Stiffening is provided for an electronic package assembly having a substrate. A first electronic package, having a first function, is electromechanically fastened to a first surface of the substrate with a first array of electrically conductive interconnects, which is disposed over a central area of the substrate first surface. ... Nvidia Corporation

03/19/15 / #20150077420

Efficient setup and evaluation of filled cubic bezier paths

A graphics processing system includes a central processing unit that processes a cubic bezier curve corresponding to a filled cubic bezier path. Additionally, the graphics processing system includes a cubic preprocessor coupled to the central processing unit that formats the cubic bezier curve to provide a formatted cubic bezier curve having quadrilateral control points corresponding to a mathematically simple cubic curve. ... Nvidia Corporation

03/12/15 / #20150074597

Separate smoothing filter for pinch-zooming touchscreen gesture response

A device including a touch screen display may be configured to selectively filter touch input. The device may receive a plurality of touch events. ... Nvidia Corporation

03/12/15 / #20150074436

In-kernel cpu clock boosting on input event

One embodiment provides a method to wake an electronic device having a central processing unit (cpu) from an idle condition. The method includes creating a worker queue in an interrupt-request (irq) driver module of the operating-system kernel of the device, receiving in the kernel an indication of user input in a form of an irq, and in response to receiving the indication of user input, posting a request in the worker queue to boost clock speed in the cpu. ... Nvidia Corporation

03/12/15 / #20150074315

Memory transaction ordering

Embodiments are disclosed relating to methods of ordering transactions across a bus of a computing device. One embodiment of a method includes determining a current target memory channel for an incoming transaction request, and passing the incoming transaction request downstream if the current target memory channel matches an outstanding target memory channel indicated by a direction bit of a counter or the counter equals zero. ... Nvidia Corporation

03/12/15 / #20150072662

Resumption of data connectivity between mobile devices via switching application

The disclosure is directed to systems and methods for switching a data downloading session from a first mobile device to a second mobile device. The data downloading session first commences on the first mobile device. ... Nvidia Corporation

03/12/15 / #20150072661

Mobile communication device, an apparatus and a method for improving call setup failure rate and quality for hearing impaired calls

A mobile communication device, a method of establishing a mobile telephone voice call and an apparatus are provided herein. In one embodiment, the mobile communication device includes: 1) a processor configured to indicate a voice call employing the mobile communication device is a hearing impaired call and (3) a modem configured to initiate establishment of the hearing impaired call with a mobile cellular network, wherein the establishment includes providing a hearing impaired codec list to the mobile cellular network.. ... Nvidia Corporation

03/12/15 / #20150072647

Security configuration alignment

A wireless communications device is disclosed herein. In one embodiment, the wireless communication device includes: a transceiver configured to facilitate communications with a radio access network; and a processing unit configured to: determine that a cell update message is to be transmitted to the network; determine if a security mode configuration procedure is in progress at the device; if a security procedure is in progress, abort the security procedure and transmit a first type of cell update message to a network entity, the first type of cell update message indicating that the device has aborted the security procedure; and if a security mode configuration procedure is not in progress, transmit a second type of cell update message to the network entity, the second type of cell update message not including an indicator indicating that the device has not had to abort an on-going security procedure and in place of said indicator including information not pertaining to a security procedure.. ... Nvidia Corporation

03/12/15 / #20150072635

Circuit and method for filtering adjacent channel interferers

A circuit and method for filtering adjacent channel interferers. One embodiment of an adjacent channel filtering circuit for reducing adjacent channel interference with an in-band signal, includes: (1) a radio frequency (rf) circuit configured to receive and down-convert an rf signal to a baseband signal containing an in-band signal and adjacent channel components, (2) a controlled single pole filter electrically coupled to the rf circuit and configured to reject the adjacent channel components and cause a predetermined attenuation in the in-band signal, (3) a baseband circuit coupled to the controlled single pole filter and configured to condition the baseband signal for conversion to a digital signal, and (4) a digital circuit coupled to the baseband circuit and configured to receive the digital signal and compensate for the predetermined attenuation.. ... Nvidia Corporation

03/12/15 / #20150071333

Filtering high speed signals

A method for filtering a data signal includes transmitting the data signal from a transmitter to a receiver across a conductor disposed in an interposer, which interconnects the receiver and the transmitter. The data signal is low-passed with a filter, which includes a passive resistive element disposed within the interposer and coupled in series electrically with a passive inductive element. ... Nvidia Corporation

03/12/15 / #20150071307

Communication interface and method for robust header compression of data flows

A communication interface and method for efficient robust header compression (rohc). One embodiment of the communication interface includes: (1) a data flow associated with a context id (cid) and a data flow status indicator, and having packets, and (2) a robust header compression (rohc) compressor configured to employ the cid to compress headers of the packets and to mark the cid as reusable by another data flow if the data flow status indicator indicates the data flow is terminated.. ... Nvidia Corporation

03/12/15 / #20150071247

Modem and method for handing over ip multimedia subsystem sessions from a packet-switched network to a circuit-switched network

A modem and a method for handing over internet protocol (ip) multimedia subsystem (ims) sessions from a packet-switched network to a circuit-switched network. One embodiment of the modem includes: (1) a physical layer through which ims packets for a plurality of ims sessions are transmittable and receivable, and (2) a control layer configured to gain access to respective ims session data for the plurality of ims sessions, the respective ims session data originating from a host ims application.. ... Nvidia Corporation

03/12/15 / #20150070464

Backward-compatible stereo image processing system and method of generating a backward-compatible stereo image

A backward-compatible stereo image processing system and a method of generating a backward-compatible stereo image. One embodiment of the backward-compatible stereo image processing system includes: (1) first and second viewpoints for an image, (2) an intermediate viewpoint for the image, and (3) first and second output channels configured to provide respective images composed of high spatial frequency content of the intermediate viewpoint and respective low spatial frequency content of the first and second viewpoints.. ... Nvidia Corporation

03/12/15 / #20150070400

Remote display rendering for electronic devices

An image is remotely processed over a network. An electronic device is characterized based on a unique identifier associated therewith and properties data, which relate to display related properties of the device. ... Nvidia Corporation

03/12/15 / #20150070381

System, method, and computer program product for using compression with programmable sample locations

A system, method, and computer program product are provided for using compression with programmable sample locations, where the compression is a function of the programmable sample locations. The method includes the steps of storing a first value specifying a programmed sample location within a pixel in a first sample pattern table that is associated with a first display surface and storing, in a memory, geometric surface parameters corresponding to a first attribute at the programmed sample location within a first pixel of the first display surface. ... Nvidia Corporation

03/12/15 / #20150070380

System, method, and computer program product for using compression with programmable sample locations

A system, method, and computer program product are provided for using compression with programmable sample locations, where the compression is a function of the programmable sample locations. The method includes the steps of storing a first value specifying a programmed sample location within a pixel in a sample pattern table and storing, in a memory, geometric surface parameters corresponding to a first attribute at the programmed sample location within a first pixel of a display surface. ... Nvidia Corporation

03/05/15 / #20150067745

System and method for providing real-time assistance regarding a cloud-based application

A system and method for providing real-time assistance regarding a cloud-based application and an application server incorporating the system or the method. In one embodiment, the system includes: (1) an assistance request receiver operable to receive from a user requesting assistance an assistance request regarding the cloud-based application, (2) a rendered video stream diverter associated with the assistance request receiver and operable to reroute an original rendered video stream associated with the user requesting assistance to a user providing assistance and (3) a modification receiver associated with the assistance request receiver and operable to receive from the user providing assistance at least one modification regarding the original rendered video stream, a stream transmitter associated with the modification receiver operable to transmit a modified rendered video stream toward the user requesting assistance that has been modified based on the at least one modification.. ... Nvidia Corporation

03/05/15 / #20150067691

System, method, and computer program product for prioritized access for multithreaded processing

A system, method, and computer program product are provided for providing prioritized access for multithreaded processing. The method includes the steps of allocating threads to process a workload and assigning a set of priority tokens to at least a portion of the threads. ... Nvidia Corporation

03/05/15 / #20150067672

Simultaneous utilization of a first graphics processing unit (gpu) and a second gpu of a computing platform through a virtual machine (vm) in a shared mode and a dedicated mode respectively

A method includes executing a driver component on a hypervisor of a computing platform including a first graphics processing unit (gpu) and a second gpu, and executing an instance of the driver component in the vm. The method also includes providing support for hardware virtualization of the second gpu in the hypervisor and the instance of the driver component executing in the vm, defining a data path between the vm and the first gpu in a configuration register, and defining a data path between the vm and the second gpu in another configuration register. ... Nvidia Corporation

03/05/15 / #20150063695

Technique for deblurring images

An image capture application captures a sequence of images via a digital camera. The sequence of images may have undesirable levels of blurriness due to the motion of objects in the field of view of the digital camera or due to movement of the digital camera itself. ... Nvidia Corporation

03/05/15 / #20150063679

System, method, and computer program product for a stereoscopic image lasso

A system, method, and computer program product for providing a lasso selection tool for a stereoscopic image is disclosed. The method includes the steps of obtaining a lasso region of a stereoscopic image pair based on a path defined by a user using a lasso selection tool. ... Nvidia Corporation

03/05/15 / #20150063103

Bandwidth-dependent compressor for robust header compression and method of use thereof

A bandwidth-dependent robust header compression (rohc) compressor and a method of rohc. One embodiment of the bandwidth-dependent rohc compressor is embodied in a protocol stack, including: (1) a bandwidth estimator operable to generate an indicator of excess bandwidth on a channel over which a data flow having original packet headers compressed at an initial compression level is transmitted, and (2) a robust header compression (rohc) compressor operable to gain access to the indicator and select a reduced compression level based on the indicator.. ... Nvidia Corporation

03/05/15 / #20150062023

Method and system for reduced rate touch scanning on an electronic device

Embodiments of the present invention are capable of lowering touch scan rates in a manner that conserves power resources without compromising performance or user experience thereby promoting battery life. Embodiments of the present invention perform touch scan operations using a touch sensitive panel at a first scan rate. ... Nvidia Corporation

03/05/15 / #20150062021

Methods and apparatus for reducing perceived pen-to-ink latency on touchpad devices

A method for reducing line display latency on a touchpad device is disclosed. The method comprises storing information regarding a plurality of prior touch events on a touch screen of the touchpad device into an event buffer. ... Nvidia Corporation

03/05/15 / #20150061633

Technique for supplying power to a load via voltage control and current control modes of operation

A regulator draws power from a battery or power delivery system and supplies regulated power to a load according to alternating modes of operation. In a voltage control mode, the regulator supplies power with a nominal voltage level and a fluctuating current level that is allowed to float according to the current demands of the load. ... Nvidia Corporation

02/26/15 / #20150058678

Method and system for testing a memory

A method and system for testing a memory is provided in the present invention. The method includes the following steps. ... Nvidia Corporation

02/26/15 / #20150054845

Bit-count texture format

A system, method, and computer program product are provided for using a bit-count texture format. A rasterized coverage bit mask is received by a texture processing unit from a bit-count format texture map, the rasterized coverage bit mask is converted to a scalar value, and the scalar value is processed while the rasterized coverage bit mask is retained in the bit-count format texture map. ... Nvidia Corporation

02/26/15 / #20150054843

Color-correct alpha blending texture filter and method of use thereof

A color-correct alpha blending texture filter and a method of texture filtering. One embodiment of the color-correct alpha blending texture filter includes: (1) an alpha blender configured to receive a post-multiplied pixel color and convert to a pre-multiplied pixel color, and (2) a filter configured to apply texture filtering to the plurality of pixels based on pre-multiplied pixel colors.. ... Nvidia Corporation

02/26/15 / #20150054836

System, method, and computer program product for redistributing a multi-sample processing workload between threads

A system, method, and computer program product are provided for redistributing multi-sample processing workloads between threads. A workload for a plurality of multi-sample pixels is received and each thread in a parallel thread group is associated with a corresponding multi-sample pixel of the plurality of pixels. ... Nvidia Corporation

02/26/15 / #20150054827

System, method, and computer program product for passing attribute structures between shader stages in a graphics pipeline

A system, method, and computer program product are provided for passing attribute structures between shader stages of a processing pipeline. The method includes the steps of receiving data represented at a first level by a processing pipeline including an upstream shader unit, a downstream shader unit, and a processing unit. ... Nvidia Corporation

02/26/15 / #20150054821

Dynamic adjustment of display content for power optimization of a continuous scan display

Various embodiments relating to reducing memory bandwidth consumed by a continuous scan display screen are provided. In one embodiment, an indication of a static image period of a continuous scan display screen is determined. ... Nvidia Corporation

02/26/15 / #20150054573

Inductors for integrated voltage regulators

An active component of an integrated voltage regulator (ivr) circuit is deployed within an ic device for regulating an operating voltage thereof. An interposer interconnects the ic device with a power source. ... Nvidia Corporation

02/19/15 / #20150052386

Technique for repairing memory modules in different power regions

A reshift unit within a computer system is configured to store repair information associated with random-access memory (ram) modules that reside in different power regions. When one or more ram modules in a given power region need to be repaired, the reshift unit identifies a portion of the repair information that is relevant to those ram modules. ... Nvidia Corporation

02/19/15 / #20150050005

Automatic playback of one or more excerpt(s) of a video sequence on a data processing device

A method includes initiating, through an interface of a data processing device, generation of one or more excerpt(s) of a video sequence associated with a video file stored in a memory of the data processing device. The method also includes automatically reading, through a processor of the data processing device communicatively coupled to the memory, video frames of the video file corresponding to the one or more excerpt(s) and reference video frames thereof in accordance with the initiation through the interface. ... Nvidia Corporation

02/19/15 / #20150049800

Estimation of entropy encoding bits in video compression

A technique for encoding digital video data comprises determining an estimated number of real bits associated with performing one or more entropy encoding operations on a coding unit of digital video data. Based on the estimated number of real bits, an estimated cost of compressing the coding unit using a compression technique is determined, and the compression technique is selected to compress the coding unit based at least in part on the estimated cost.. ... Nvidia Corporation

02/19/15 / #20150049390

Hybrid optics for near-eye displays

A method for displaying a near-eye light field display (neld) image is disclosed. The method comprises determining a pre-filtered image to be displayed, wherein the pre-filtered image corresponds to a target image. ... Nvidia Corporation

02/19/15 / #20150049110

Rendering using multiple render target sample masks

One embodiment sets forth a method for transforming 3-d images into 2-d rendered images using render target sample masks. A software application creates multiple render targets associated with a surface. ... Nvidia Corporation

02/19/15 / #20150049104

Rendering to multi-resolution hierarchies

One embodiment of the present invention includes techniques for processing a multi-resolution hierarchy, where an application configures a rop unit to render all the levels included in the multi-resolution hierarchy to a single composite render target. The rop unit renders memory pages to the composite render target in pitch order. ... Nvidia Corporation

02/19/15 / #20150049094

Multi gpu interconnect techniques

A graphics processing subsystem includes one or more memory devices and two or more graphics processing units (gpu). The graphics processing units each include a memory interface. ... Nvidia Corporation

02/19/15 / #20150049069

Automatic backup of configuration-related settings in a data processing device

A method includes executing an instance of a process on a data processing device, and controlling configuration of a display unit, a processor, a memory and/or a power supply of the data processing device through a user interface provided by the process and/or an operating system executing on the data processing device based on continued execution of the instance of the process. The method also includes providing a capability to automatically backup, through the processor in conjunction with a driver component associated with the display unit, the processor and/or the power supply, settings related to one or more specific parameter(s) of the display unit, a screen of the display unit, the processor, the memory, an algorithm executing on the processor and/or the power supply of the data processing device through the user interface as a non-system file to the memory and/or a storage device external to the data processing device.. ... Nvidia Corporation

02/12/15 / #20150046684

Technique for grouping instructions into independent strands

A device compiler and linker is configured to group instructions into different strands for execution by different threads based on the dependence of those instructions on other, long-latency instructions. A thread may execute a strand that includes long-latency instructions, and then hardware resources previously allocated for the execution of that thread may be de-allocated from the thread and re-allocated to another thread. ... Nvidia Corporation

02/12/15 / #20150046662

Coalescing texture access and load/store operations

A system, method, and computer program product are provided for coalescing memory access requests. A plurality of memory access requests is received in a thread execution order and a portion of the memory access requests are coalesced into memory order, where memory access requests included in the portion are generated by threads in a thread block. ... Nvidia Corporation

02/12/15 / #20150046612

Memory device formed with a semiconductor interposer

A packaged memory device includes a semiconductor interposer, a first memory stack, a second memory stack, and a buffer chip that are all coupled to the semiconductor interposer. The first memory stack and the second memory stack each include multiple memory chips that are configured as a single stack. ... Nvidia Corporation

02/12/15 / #20150043698

Clock data recovery circuit

Systems and methods for stabilizing clock data recovery (cdr) by filtering the abrupt phase shift associated with data pattern transition in the input signal. The cdr circuit includes a data pattern detector coupled to a data pattern filter. ... Nvidia Corporation

02/12/15 / #20150042672

Parallel multicolor incomplete lu factorization preconditioning processor and method of use thereof

A parallel multicolor ilu factorization preconditioner processor and a method of computing an ilu preconditioning matrix. One embodiment of the preconditioning processor having parallel computing pipelines includes: (1) a graph coloring circuit operable to identify parallelisms in a sparse linear system, (2) an ilu computer configured to employ the parallel computing pipelines according to the parallelisms to: (2a) determine a sparsity pattern for an ilu preconditioning matrix, and (2b) compute non-zero elements of the ilu preconditioning matrix according to the sparsity pattern, and (3) a memory communicably couplable to the parallel computing pipelines and configured to store the ilu preconditioning matrix.. ... Nvidia Corporation

02/12/15 / #20150042669

Rotating displayed content on an electronic device

The description is directed to systems and methods for rotating the image displayed on an electronic device. The data associated with the displayed image is stored in memory locations, typically in a matrix of rows and columns of pixel data. ... Nvidia Corporation

02/12/15 / #20150042664

Scale-up techniques for multi-gpu passthrough

A device for processing graphics data includes a plurality of graphics processing units. Each graphics processing unit may correspond to a virtualized operating system. ... Nvidia Corporation

02/12/15 / #20150042652

System, method, and computer program product for simulating light transport

A system, method, and computer program product are provided for simulating light transport. In operation, a distribution function is decomposed utilizing a technique for sampling from a probability distribution (e.g. ... Nvidia Corporation

02/12/15 / #20150042626

Pixel data transmission over multiple pixel interfaces

Embodiments are disclosed relating to a method of driving a display panel. In one embodiment, the method includes sending a stream of pixels from a display engine to a first pixel interface and a second pixel interface, transmitting a first subset of the stream of pixels from the first pixel interface to the display panel, and transmitting a second subset of the stream of pixels from the second pixel interface to the display panel.. ... Nvidia Corporation

02/12/15 / #20150042553

Dynamic gpu feature adjustment based on user-observed screen area

An aspect of the present invention proposes a solution to allow a dynamic adjustment of a performance level of a gpu based on the user observed screen area. According to one embodiment, a user's focus in one or more display panels is determined. ... Nvidia Corporation

02/05/15 / #20150039662

Ffma operations using a multi-step approach to data shifting

A fused floating-point multiply-add element includes a multiplier that generates a product, and a shifter that shifts an addend within a narrow range. Interpreting logic analyzes the magnitude of the addend relative to the product and then causes logic arrays to position the shifted addend within the left, center, or right portions of a composite register depending in the magnitude of the addend relative to the product. ... Nvidia Corporation

02/05/15 / #20150039621

Method for capturing the moment of the photo capture

A method for storing digital images is presented. The method includes capturing an image using a digital camera system. ... Nvidia Corporation

02/05/15 / #20150036875

Method and system for application execution based on object recognition for mobile devices

Embodiments of the present invention enable mobile devices to behave as a dedicate remote control for different target devices through camera detection of a particular target device and autonomous execution of applications linked to the detected target device. Also, when identical target devices are detected, embodiments of the present invention may be configured to use visual identifiers and/or positional data associated with the target device for purposes of distinguishing the target device of interest. ... Nvidia Corporation

02/05/15 / #20150036695

Real time network adaptive low latency transport stream muxing of audio/video streams for miracast

Systems and methods for multiplexing audio/video data and generating transport streams for wifi network with reduced latency for real time playback at a remote device. A virtual presentation clock reference (pcr) representing a scheduled transmission time of a transport stream packet at a transport stream multiplexer is calculated based on the network transmission rate and generation of the data packets. ... Nvidia Corporation

02/05/15 / #20150036020

Method for sharing original photos along with final processed image

A method for storing digital images is presented. The method comprises accessing a first image. ... Nvidia Corporation

02/05/15 / #20150035999

Method for sharing digital photos securely

A method for sharing digital photos securely is presented. The method includes capturing image data using a digital camera system. ... Nvidia Corporation

02/05/15 / #20150035842

Dedicated voice/audio processing through a graphics processing unit (gpu) of a data processing device

A method includes providing an input port and/or an output port directly interfaced with a graphics processing unit (gpu) of a data processing device further including a central processing unit (cpu) to enable a corresponding reception of input data and/or rendering of output data therethrough. The method also includes implementing a voice/audio processing engine in the data processing device. ... Nvidia Corporation

01/29/15 / #20150030257

Low-complexity bilateral filter (bf) implementation in a data processing device

A method includes implementing, through a processor communicatively coupled to a memory and/or a hardware block, a bilateral filter (bf) including a spatial filter component and a range filter component, and implementing the spatial filter component with a low-complexity function to allow for focus on the range filter component. The method also includes determining, through the processor, filter tap value(s) related to the range filter component as a function of radiometric distance between a pixel of a video frame and/or an image and other pixels thereof based on a pre-computed corpus of data related to execution of an application in accordance with a filtering requirement of the pixel by the application. ... Nvidia Corporation

01/29/15 / #20150030070

Adaptive decoding of a video frame in accordance with initiation of non-sequential playback of video data associated therewith

A method includes determining that a reference video frame of a predicted frame or a bi-predicted frame, corresponding to a point in time of beginning of a non-sequential playback of video data and currently being decoded, is unavailable or corrupt. The method also includes determining if a reference video frame utilized most recently with reference to the point in time to decode another video frame is available in the memory. ... Nvidia Corporation

01/29/15 / #20150028927

Low power master-slave flip-flop

A flip-flop circuit may include a master latch and a slave latch. Each latch may have a transparent mode and a storage mode. ... Nvidia Corporation

01/22/15 / #20150026652

System, method, and computer program product for correlating transactions within a simulation of a hardware platform for post-simulation debugging

A system, method, and computer program product for correlating transaction within a simulation of a hardware platform for post-simulation debugging is disclosed. The method includes the steps of initializing state information associated with a hardware simulation for a register-transfer level model representing a digital circuit design, executing the hardware simulation to generate a simulation output, generating one or more transaction objects based on the signals in the simulation output, and correlating a first transaction object of the one or more transaction objects with a second transaction object of the one or more transaction objects based on a set of rules and a state model.. ... Nvidia Corporation

01/22/15 / #20150026443

Branching to alternate code based on runahead determination

The description covers a system and method for operating a micro-processing system having a runahead mode of operation. In one implementation, the method includes providing, for a first portion of code, a runahead correlate. ... Nvidia Corporation

01/22/15 / #20150026442

System, method, and computer program product for managing out-of-order execution of program instructions

A method, system and computer program product embodied on a computer-readable medium are provided for managing the execution of out-of-order instructions. The method includes the steps of receiving a plurality of instructions and identifying a subset of instructions in the plurality of instructions to be executed out-of-order.. ... Nvidia Corporation

01/22/15 / #20150026438

System, method, and computer program product for cooperative multi-threading for vector threads

A system, method, and computer program product for ensuring forward progress of threads that implement divergent operations in a single-instruction, multiple data (simd) architecture is disclosed. The method includes the steps of allocating a queue data structure to a thread block including a plurality of threads, determining that a current instruction specifies a yield operation, pushing a token onto the second side of the queue data structure, disabling any active threads in the thread block, popping a next pending token from the first side of the queue data structure, and activating one or more threads in the thread block according to a mask included in the next pending token.. ... Nvidia Corporation

01/22/15 / #20150026256

Alert notification synchronization across data processing devices

A method includes executing an instance of a process on each of a data processing device and one or more other data processing device(s), and setting up a personal area network (pan) associated with a user through registering the one or more other data processing device(s) with the data processing device based on an identifier thereof utilizing a first communication link of the pan to enable data communication therebetween. The method also includes transmitting, through the execution of the instance of the process, a notification of an alert of an incoming communication to the one or more other data processing device(s) from the one or more other data processing device(s) to the data processing device through a second communication link of the pan following the setting up of the pan to enable the user be apprised of the alert through the data processing device.. ... Nvidia Corporation

01/22/15 / #20150024721

Automatically connecting/disconnecting an incoming phone call to a data processing device based on determining intent of a user thereof to respond to the incoming phone call

A method includes triggering determination of an intent of a user of a data processing device to respond to an incoming phone call thereto through a processor of the data processing device in conjunction with one or more sensor(s) associated therewith based on initiation through the incoming phone call or the user. The method also includes automatically connecting to or disconnecting the incoming phone call through the processor following the determination of the intent of the user to respond to the incoming phone call without requiring the user to intervene on the data processing device therefor.. ... Nvidia Corporation

01/22/15 / #20150023507

Speaker protection in small form factor devices

An audio engine applies a driving signal to a speaker system, which produces an audio signal. The audio signal is captured by a microphone on the same device and feeds that signal back to the audio engine. ... Nvidia Corporation

01/22/15 / #20150022636

Method and system for voice capture using face detection in noisy environments

Embodiments of the present invention are capable of determining a face direction associated with a detected subject (or multiple detected subjects) of interest within a 3d space using face detection procedures, while simultaneously avoiding the pick up of other environmental sounds. In addition, if more than one face is detected, embodiments of the present invention can automatically detect an active speaker based on the recognition of facial movements consistent with the performance of providing audio (e.g., tracking mouth movements) by those subjects whose faces were detected. ... Nvidia Corporation

01/22/15 / #20150022548

Graphics server for remotely rendering a composite image and method of use thereof

A graphics server for remotely rendering a composite image and a method of use thereof. One embodiment of the graphics server includes: (1) a graphics renderer configured to render updates for a plurality of graphics windows within the composite image and (2) a display processing unit (dpu) configured to identify changed portions of the composite image and provide the changed portions to an encoder for encoding and subsequent transmission.. ... Nvidia Corporation

01/22/15 / #20150022541

Method and system for distributed shader optimization

Embodiments of the present invention are operable to communicate a list of important shaders and their current best-known compilations to remote client devices over a communications network. Client devices are allowed to produce modified shader compilations by varying optimizations. ... Nvidia Corporation

01/22/15 / #20150022537

Variable fragment shading with surface recasting

A system, method, and computer program product are provided for shading primitive fragments. A target buffer may be recast when shaded samples that are covered by a primitive fragment are generated at a first shading rate using a first sampling mode, the shaded samples are stored in the target buffer that is associated with the first sampling mode and the first shading rate, a second sampling mode is determined, and the target buffer is associated with the second sampling mode. ... Nvidia Corporation

01/22/15 / #20150022519

Pixel serialization to improve conservative depth estimation

One embodiment includes determining a first z-range for a first portion of a coarse raster tile, where the first portion includes a plurality of pixels having a first set of pixel locations, retrieving from a memory a corresponding z-range related to a second set of pixel locations associated with the coarse raster tile, where the first set of pixel locations comprises a subset of the second set of pixel locations, and comparing the first z-range to the corresponding z-range to determine whether the plurality of pixels is occluded. If the plurality of pixels determined to be occluded, then the plurality of pixels is culled. ... Nvidia Corporation

01/22/15 / #20150022435

Gaze-tracking eye illumination from display

A method to drive a pixelated display of an electronic device arranged in sight of a user of the device. The method includes receiving a signal that encodes a display image, and controlling the pixelated display based on the signal to form the display image in addition to a latent image, the latent image being configured to illuminate an eye of the user with light of such characteristics as to be unnoticed by the user, but to reveal an orientation of the eye on reflection into a machine-vision system.. ... Nvidia Corporation

01/22/15 / #20150022433

Display control in a data processing device based on sensing deviation thereof from a reference position

A method includes sensing, through a processor of a data processing device in conjunction with a motion sensor, a deviation of the data processing device from a reference position thereof. The method also includes modifying, through the processor, a display parameter of a display unit of the data processing device and/or display data to be rendered on the display unit in accordance with the sensed deviation.. ... Nvidia Corporation

01/22/15 / #20150022402

Capacitively coupled loop antenna and an electronic device including the same

Provided is an antenna. The antenna, in one embodiment, includes a feed element electrically connectable to a positive terminal of a transmission line, and a ground element electrically connectable to a negative terminal of the transmission line. ... Nvidia Corporation

01/22/15 / #20150022401

Antenna system and an electronic device including the same

Provided is an antenna system. The antenna system, in this aspect, includes a first antenna operable to communicate at a given frequency below about 1000 mhz. ... Nvidia Corporation

01/22/15 / #20150022272

Closed loop dynamic voltage and frequency scaling

A system is based on an ic. A first component of the ic generates a signal that clocks the ic at a target operating frequency. ... Nvidia Corporation

01/15/15 / #20150020055

System, method, and computer program product for automated stability testing of device firmware

A method, system, and computer-program product are provided for automatically performing stability testing on device firmware. The method includes the steps of copying a binary file corresponding to a version of a firmware to one or more nodes that each include a testbench, causing the one or more nodes to perform tests utilizing the version of the firmware, and determining whether a new build of the firmware is available. ... Nvidia Corporation

01/15/15 / #20150018048

Smart control of an alert of an incoming communication to a data processing device

A method includes determining, through a processor of a data processing device in conjunction with one or more sensor(s) associated therewith, an intent of a user of the data processing device to respond to an alert of an incoming communication thereto expressed through a sound volume level and/or a vibrational level of the alert. The method also includes automatically reducing, through the processor, the sound volume level and/or the vibrational level of the alert following the determination of the intent of the user to respond to the alert.. ... Nvidia Corporation

01/15/15 / #20150017948

Method and system for in-application locking of mobile devices

Embodiments of the present invention are capable of detecting a command issued by the user to lock a mobile device from receiving user input provided by input devices coupled to the mobile device, as well as the native buttons of the device itself, while an application executes. Provided the command is confirmed by the user, embodiments may proceed to intercept signals transmitted from input devices coupled to the mobile device and as well as from the native buttons of the device for the duration of the device's locked state. ... Nvidia Corporation

01/15/15 / #20150016183

Sense amplifier with transistor threshold compensation

One embodiment provides, in a sense amplifier for an electronic memory array in which a selected memory cell drives a developing voltage differential according to a logic state of the memory cell, a method to store the logic state. The method includes poising source voltages of first and second transistors at levels offset, respectively, by threshold voltages of the first and second transistors. ... Nvidia Corporation

01/15/15 / #20150016043

Integrated circuit package with a conductive grid formed in a packaging substrate

An integrated circuit package includes a packaging substrate, which has an electrically conductive grid formed on a dielectric layer, and an integrated circuit die electrically coupled to the electrically conductive grid at one or more locations. In this embodiment, the electrically conductive grid includes a plurality of electrically conductive portions, wherein each portion is electrically coupled to at least one other portion, and a plurality of void regions that are electrically non-contiguous and substantially free of electrically conductive material. ... Nvidia Corporation

01/15/15 / #20150016042

Packaging substrate that has electroplated pads that are free of plating tails

An integrated circuit package includes a packaging substrate with an electrical connection pad formed thereon and an integrated circuit die coupled to the electrical connection pad. The electrical connection pad includes an electroplated surface finish layer, but does not include an electrical trace configured as a plating tail. ... Nvidia Corporation

01/15/15 / #20150015595

Techniques for optimizing stencil buffers

One embodiment sets forth a method for associating each stencil value included in a stencil buffer with multiple fragments. Components within a graphics processing pipeline use a set of stencil masks to partition the bits of each stencil value. ... Nvidia Corporation

01/15/15 / #20150015594

Techniques for optimizing stencil buffers

One embodiment sets forth a method for associating each stencil value included in a stencil buffer with multiple fragments. Components within a graphics processing pipeline use a set of stencil masks to partition the bits of each stencil value. ... Nvidia Corporation

01/15/15 / #20150015574

System, method, and computer program product for optimizing a three-dimensional texture workflow

A system, method, and computer program product for implementing a workflow for generating and editing texture maps is disclosed. The method includes the steps of generating an object in a memory for storing image data corresponding to a texture map associated with a three-dimensional model, launching a two-dimensional image editing application to modify the image data, and updating the texture map in a three-dimensional modeling application based on the modified image data. ... Nvidia Corporation

01/15/15 / #20150015494

Method and system for a creased paper effect on page limits

In a touchscreen viewing device, a method for implementing a crease effect. The method includes receiving a swipe input related to an image displayed on a touch screen of a viewing device, upon determination that the swipe input will generate an item end effect, causing a crease effect to appear on the image in response to the swipe input, and subsequent to the end of the swipe input, undoing the crease effect on the image to return the image to an original effect.. ... Nvidia Corporation

01/15/15 / #20150015314

Mesochronous synchronizer with delay-line phase detector

A method and a system are provided for synchronizing a signal. A keep out window is defined relative to a second clock signal and an edge detection signal is generated that indicates if an edge of a first clock signal is within the keep out window. ... Nvidia Corporation

01/15/15 / #20150015269

Detection of mis-soldered circuits by signal echo characteristics

One embodiment of the present invention sets forth a method for detecting defective solder balls that includes configuring a transmitter pad to transmit a pulse signal, transmitting the pulse signal, configuring transmitter pad to receive a pulse reflection, receiving a pulse reflection, analyzing the pulse reflection; and determining whether the pulse reflection is indicative of a defective solder ball. One advantage of the disclosed method is that solder ball defects may be detected more accurately than in the trial and error approach.. ... Nvidia Corporation

01/08/15 / #20150012705

Reducing memory traffic in dram ecc mode

A method for managing memory traffic includes causing first data to be written to a data cache memory, where a first write request comprises a partial write and writes the first data to a first portion of the data cache memory, and further includes tracking the number of partial writes in the data cache memory. The method further includes issuing a fill request for one or more partial writes in the data cache memory if the number of partial writes in the data cache memory is greater than a predetermined first threshold.. ... Nvidia Corporation

01/08/15 / #20150012115

Operating environment parameter regulation in a multi-processor environment

A method includes receiving, at a control server, data related to a parameter of an operating environment of a number of processors. Each processor is associated with a data processing device of a number of data processing devices. ... Nvidia Corporation

01/08/15 / #20150011259

Remote display for communications device

Provided in one aspect are headphones. The headphones, in accordance with this disclosure, include one or more electro-acoustic transducers operable to convert electrical signals into sounds. ... Nvidia Corporation

01/08/15 / #20150010047

Adaptation of crossing dfe tap weight

A method comprises receiving an input signal at an input of a receiver and retrieving a data sample signal and an error sample signal from the input signal. The method also comprises applying an adaptive procedure to generate a feedback code using the data sample signal and the error sample signal for feeding back into a decision feedback equalization (dfe) module. ... Nvidia Corporation

01/08/15 / #20150009306

Mapping sub-portions of three-dimensional (3d) video data to be rendered on a display unit within a comfortable range of perception of a user thereof

A method includes receiving, through a processor of a data processing device communicatively coupled to a memory, data related to a dimensional parameter of a display unit and/or a distance between a user and the display unit, and determining, through the processor, a comfortable range of perception of a sub-portion of three-dimensional (3d) video data on the display unit based on the dimensional parameter of the display unit and/or the distance between the user and the display unit. The method also includes adjusting, through the processor, a disparity between one or more sub-portion(s) of the 3d video data corresponding to perception of the sub-portion by a left eye of the user and one or more sub-portion(s) of the 3d video data corresponding to perception of the sub-portion by a right eye of the user such that the sub-portion is mapped within the determined comfortable range of perception.. ... Nvidia Corporation

01/08/15 / #20150009238

Method for zooming into and out of an image shown on a display

Provided is a method for zooming into and out of an image shown on a display. The method, in one embodiment, includes, providing an image on a display, and detecting a relative distance of an object to the display. ... Nvidia Corporation

01/08/15 / #20150009222

Method and system for cloud based virtualized graphics processing for remote displays

An apparatus for providing graphics processing. The apparatus includes a dual cpu socket architecture comprising a first cpu socket and a second cpu socket. ... Nvidia Corporation

01/08/15 / #20150009221

Direct interfacing of an external graphics card to a data processing device at a motherboard-level

A method includes providing an input/output (i/o) interface at a periphery of a motherboard of a data processing device, and providing traces between a processor of the data processing device and the i/o interface across a surface of the motherboard. The traces provide conductive pathways between circuits of the processor and the i/o interface. ... Nvidia Corporation

01/08/15 / #20150009118

Intelligent page turner and scroller

Provided is a method for changing an image on a display. The method, in one embodiment, includes providing a first image on a display. ... Nvidia Corporation

01/08/15 / #20150008987

Clock generation circuit that tracks critical path across process, voltage and temperature variation

Clock generation circuit that track critical path across process, voltage and temperature variation. In accordance with a first embodiment of the present invention, an integrated circuit device includes an oscillator electronic circuit on the integrated circuit device configured to produce an oscillating signal and a receiving electronic circuit configured to use the oscillating signal as a system clock. ... Nvidia Corporation

01/08/15 / #20150008940

Clock jitter and power supply noise analysis

Disclosed are a method, system, and/or apparatus to perform clock jitter and power supply noise analysis. In one embodiment, a method may include receiving a first signal, which may be a clock signal, then generating a second signal based on the first signal. ... Nvidia Corporation

01/01/15 / #20150006090

String sequencing with multiple search stages

A sequencing application implements a multi-stage search technique in order to identify locations where a sequence of elements occurs within a much longer reference sequence of elements. The sequencing application breaks the sequence of elements into multiple, possibly overlapping seeds, used to determine all potential occurrences of the sequence in the reference. ... Nvidia Corporation

01/01/15 / #20150002693

Method and system for performing white balancing operations on captured images

Embodiments of the present invention are operable to perform automatic white balancing operations on images captured by a camera system through the use of weights derived through crowdsourcing procedures. Embodiments of the present invention use crowdsourced weight data resident on the camera system in combination with sampled image data of a captured image to determine a likely illuminant source. ... Nvidia Corporation

01/01/15 / #20150002692

Method and system for generating weights for use in white balancing an image

Embodiments of the present invention are operable to generate a set of weights derived through crowdsourcing procedures for use in automatically performing white balancing operations on images captured by a digital camera system. Embodiments of the present invention are operable to generate a set of images which are illuminated with known and different illuminants. ... Nvidia Corporation

01/01/15 / #20150002508

Unique primitive identifier generation

A system, method, and computer program product are provided for generating unique primitive identifiers. A specified scope and geometry for a scene is received. ... Nvidia Corporation








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