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Nvidia Corporation patents (2016 archive)


Recent patent applications related to Nvidia Corporation. Nvidia Corporation is listed as an Agent/Assignee. Note: Nvidia Corporation may have other listings under different names/spellings. We're not affiliated with Nvidia Corporation, we're just tracking patents.

ARCHIVE: New 2018 2017 2016 2015 2014 2013 2012 2011 2010 2009 | Company Directory "N" | Nvidia Corporation-related inventors


Low-latency bi-directional repeater

A repeater circuit is disclosed. The repeater circuit is coupled to a transmission line driven by a first transmitter circuit and configured to detect a signal transition from a first voltage level to a second voltage level at a first position on the transmission line. ... Nvidia Corporation

Clock generation circuit that tracks critical path across process, voltage and temperature variation

Clock generation circuit that track critical path across process, voltage and temperature variation. In accordance with a first embodiment of the present invention, an integrated circuit device includes an oscillator electronic circuit on the integrated circuit device configured to produce an oscillating signal and a receiving electronic circuit configured to use the oscillating signal as a system clock. ... Nvidia Corporation

Removable substrate for controlling warpage of an integrated circuit package

One embodiment of the present invention sets forth a technique for packaging an integrated circuit die. The technique includes bonding a first surface of the integrated circuit die to a first substrate via a first plurality of solder bump structures and bonding a second substrate to a second surface of the integrated circuit die. ... Nvidia Corporation

Modifying implant regions in an integrated circuit to meet minimum width design rules

A computer-implemented method for designing an integrated circuit includes determining a timing slack associated with a first cell of the integrated circuit that is physically adjacent to a second cell of the integrated circuit, the second cell including an implant region that is in violation of an implant width design rule associated with the integrated circuit, determining that the timing slack is greater than a change in timing slack associated with expanding the implant region into the first cell, and, in response, expanding the implant region from first cell into the second cell to form a larger implant region.. . ... Nvidia Corporation

Approach for performing incremental timing analysis with improved accuracy

One embodiment of the present invention includes a method for updating timing parameters after a circuit design change. The method includes, prior to the circuit design change, deriving a value for a first timing parameter based on a signoff timing analysis of a timing arc, and a value for a second timing parameter based on a quick timing analysis of the timing arc; and obtaining a first transition time based on the quick timing analysis. ... Nvidia Corporation

System and method for reducing power consumed obtaining system information from a cell

A system for, and method of, reducing power consumed obtaining system information from a cell, the system information contained in at least a master information block, a scheduling information block and a system information block. In one embodiment, the system includes: (1) a broadcast control channel (bcch) frame cache configured to buffer received bcch frames bearing portions of the system information and (2) a system information verifier associated with the bcch frame cache and configured to determine version consistency in the master information block and the scheduling information block by employing the check numbers associated therewith.. ... Nvidia Corporation

Low-power state with a variable refresh rate display

One embodiment of the present invention sets forth a method for displaying images. The method includes causing a graphics processing unit (gpu) to transmit first display data to a variable refresh rate display at a first refresh rate. ... Nvidia Corporation

Cooperative thread array reduction and scan operations

One embodiment of the present invention sets forth a technique for performing aggregation operations across multiple threads that execute independently. Aggregation is specified as part of a barrier synchronization or barrier arrival instruction, where in addition to performing the barrier synchronization or arrival, the instruction aggregates (using reduction or scan operations) values supplied by each thread. ... Nvidia Corporation

Migrating pages of different sizes between heterogeneous processors

One embodiment of the present invention sets forth a computer-implemented method for migrating a memory page from a first memory to a second memory. The method includes determining a first page size supported by the first memory. ... Nvidia Corporation

Secure provisioning of semiconductor chips in untrusted manufacturing factories

One embodiment of the present invention includes a boot read only memory (rom) with an embedded, private key provision key (kpk) set that enables secure provisioning of chips. As part of taping-out a chip, the chip provider establishes the kpk set and provides the boot rom exclusive access to the kpk. ... Nvidia Corporation

High speed comparator with digitally calibrated threshold

A subsystem configured to implement an analog to digital converter that includes a high speed comparator with an embedded reference voltage level that functions as a calibrated threshold. A calibration element applies power to a reference voltage system. ... Nvidia Corporation

Piecewise linear irregular rasterization

One embodiment of the present invention includes a method for rendering a geometry object in a computer-generated scene. A screen space associated with a display screen is divided into a set of regions. ... Nvidia Corporation

Fusing a sequence of operations through subdividing

A compiler and a method of compiling code that reduces memory bandwidth when processing code on a computer are provided herein. In one embodiment, the method includes: (1) automatically identifying a sequence of operations for fusing, wherein the sequence of operations correspond to instructions from a source code, (2) determining subdivisions of a final output of the sequence of operations, (3) determining input data and intermediate operations needed to obtain a final subdivision output for each of the subdivisions and (4) automatically generating code to fuse the sequence of operations employing the subdivisions, wherein the automatically identifying and the automatically generating are performed by a processor.. ... Nvidia Corporation

Selective power gating to extend the lifetime of sleep fets

A power-gating array configured to power gate a logic block includes multiple zones of sleep field-effect transistors (fets). A zone controller coupled to the power-gating array selectively enables a certain number of zones within the array depending on the voltage drawn by the logic block. ... Nvidia Corporation

12/01/16 / #20160346689

Start-up performance improvement for remote video gaming

A gaming system includes a network server and a gaming manager communicatively coupled to the network server. The gaming manager having a video control unit that starts a video game running remotely with a static video portion and a user interactive video portion and a video receiving unit, coupled to the video control unit, that receives the static video portion for local display while the user interactive video portion is being initialized remotely for subsequent local game play. ... Nvidia Corporation

11/24/16 / #20160343108

Pixel density normalization for viewing images across dissimilar displays

A monitor display system includes a computing device that is coupled to a collection of dissimilar monitors and a display manager that is coupled to the computing device. The display manager has an image generator that generates an image for the collection of dissimilar monitors and also has a pixel density normalizer that is coupled to the image generator and provides an alignment of the image across the collection of dissimilar monitors. ... Nvidia Corporation

11/24/16 / #20160342513

Assymetric coherent caching for heterogeneous computing

A method of caching data in the memory of electronic processor units including compiling, in a first processor configured to perform data-parallel computation, a set of asymmetric coherent caching rules. The set rules configure the first processor to be: inoperable to cache, in a second level memory cache of the first electronic processor unit, data whose home location is in a final memory store of a second electronic processor unit; operable to cache, in the second level memory cache of the first electronic processor unit, the data whose home location is in a final memory store of the first electronic processor unit; and operable to cache, in a first level memory cache of the first electronic processor unit, the data, regardless of a home location of the data.. ... Nvidia Corporation

11/17/16 / #20160336054

Power savings via selection of sram power source

A subsystem configured to select the power supply to a static random access memory cell compares the level of a dedicated memory supply voltage to the primary system supply voltage. The subsystem then switches the primary system supply to the sram cell when the system voltage is higher than the memory supply voltage with some margin. ... Nvidia Corporation

11/03/16 / #20160323740

Authentication commands

This disclosure presents a modem for use at a terminal for accessing first and second communication networks that comprises a device interface for connecting to a subscriber identity device that stores first and second subscriber identity applications, and first and second pieces of user authentication data, separate from one another, for effecting independent first and second user authentication procedures for the first and second applications, respectively. A processing unit executes the first application to provide access to the first network when the first authentication procedure has been completed, and executes the second application to provide access to the second network when the second authentication procedure has been completed. ... Nvidia Corporation

11/03/16 / #20160323336

Optimal settings for application streaming

A computer application streaming system includes an optimization unit coupled to a streaming device to determine streaming optimal playable settings for a remote user device corresponding to a selected computer application and a sending unit coupled to the optimization unit to manage streaming of the streaming optimal playable settings over a network connected to the remote user device. A receiving unit is coupled to the network to recover the streaming optimal playable settings for application to the remote user device when employing the selected computer application. ... Nvidia Corporation

11/03/16 / #20160321773

System and method for creating aliased mappings to minimize impact of cache invalidation

A parallel processor and a method of reducing texture cache invalidation are disclosed. In one embodiment, the parallel processor includes a cache configured to receive lines of data; and a parallel execution unit associated with the cache and configured to execute parallel counterparts of an operation. ... Nvidia Corporation

11/03/16 / #20160321074

Programmable vision accelerator

In one embodiment of the present invention, a programmable vision accelerator enables applications to collapse multi-dimensional loops into one dimensional loops. In general, configurable components included in the programmable vision accelerator work together to facilitate such loop collapsing. ... Nvidia Corporation

10/20/16 / #20160307482

Mixed primary display with spatially modulated backlight

A method, computer readable medium, and system are disclosed for generating mixed-primary data for display. The method includes the steps of receiving a source image that includes a plurality of pixels, dividing the source image into a plurality of blocks, analyzing the source image based on an image decomposition algorithm, encoding chroma information and modulation information to generate a video signal, and transmitting the video signal to a mixed-primary display. ... Nvidia Corporation

10/06/16 / #20160294899

System and method for cooperative application control

A system for cooperative application control. In one embodiment, the system includes: (1) a cloud application engine for executing application code configured to allow interaction with an application, generate a video stream corresponding to a particular user and accept a response stream from the particular user to allow the particular user to interact with the application and (2) a cooperative interaction engine associated with the cloud application engine for communication therewith and configured to multicast the video stream from the cloud application engine to the particular user and at least one other user, combine separate response streams from the particular user and the at least one other user into a joint response stream and provide the joint response stream to the cloud application engine.. ... Nvidia Corporation

10/06/16 / #20160291989

Method and system for applying optimal settings from first invocation of a gaming application

A method for optimizing a user's experience. The method includes detecting a newly discovered gaming application on a computing device, and receiving an instruction to optimize the newly discovered gaming application. ... Nvidia Corporation

10/06/16 / #20160287996

System and method for cooperative game control

A system for cooperative game control. In one embodiment, the system includes: (1) a cloud game engine for executing game code configured to create a game, generate a video stream corresponding to a particular player and accept a response stream from the particular player to allow the particular player to play the game and (2) a cooperative play engine associated with the cloud game engine for communication therewith and configured to multicast the video stream from the cloud game engine to the particular player and at least one other player, combine separate response streams from the particular player and the at least one other player into a joint response stream and provide the joint response stream to the cloud game engine.. ... Nvidia Corporation

10/06/16 / #20160287988

System and method for multi-client control of a common avatar

A system for multi-client control of a common avatar. In one embodiment, the system includes: (1) a cloud game engine for executing game code configured to create a game, generate a video stream corresponding to a particular player and accept a response stream from the particular player to allow the particular player to play the game and (2) a cooperative play engine associated with the cloud game engine for communication therewith and configured to multicast the video stream from the cloud game engine to the particular player and at least one other player, combine separate response streams from the particular player and the at least one other player into a joint response stream based on avatar functions contained therein and provide the joint response stream to the cloud game engine.. ... Nvidia Corporation

09/29/16 / #20160286515

Conflict detection

A terminal for communication with a communication network and a method of configuring a subscriber identity device are disclosed. In one embodiment, the terminal includes computer storage configured to store a subscriber identity application, a processing unit operable to provide access to the communication network by executing an instance of the subscriber identity application, and a toolkit file assigning a modem of the terminal to handle at least one communication procedure for effecting said communication with the communication network, wherein the transferred terminal profile information assigns a host processor of the terminal to handle at least one communication procedure for effecting said communication with the communication network.. ... Nvidia Corporation

09/29/16 / #20160284060

Low complexity adaptive temporal filtering for mobile captures

A method of noise filter parameter adaptation, the method comprising receiving a current video frame comprising a plurality of pixels. A table lookup is performed, using current statistical values associated with the current video frame. ... Nvidia Corporation

09/29/16 / #20160283078

Control device intregrating touch and displacement controls

System and method of controlling an object via control device having integrated touch and displacement control. An embodiment includes an input device having a control stick with an integrated touch sensor, where the control stick may be displaced to provide control of a first functionality of an object, and a user touch sensed by the integrated touch sensor provides control of a second functionality of the object. ... Nvidia Corporation

09/15/16 / #20160269841

Alert based on recognition of a particular sound pattern

Alert based on recognition of a particular sound pattern. In accordance with another embodiment of the present invention, an apparatus includes a sound source device for playing an audio program to headphones and an acoustic sound receiver coupled to the sound source device for receiving external audio. ... Nvidia Corporation

09/15/16 / #20160269002

Low clocking power flip-flop

Low clocking power flip-flop. In accordance with a first embodiment of the present invention, a flip-flop electronic circuit includes a master latch coupled to a slave latch in a flip-flop configuration. ... Nvidia Corporation

09/15/16 / #20160266953

Method and system for associating crash reports with end user analytics

A method for linking information related to a computer crash. The method includes establishing a network of computing resources communicatively coupled to a network, wherein each computing resource is associated with a corresponding hardware configuration capable of executing and displaying at least one application, wherein each of the network of computing resources is associated with a globally unique identifier (guid). ... Nvidia Corporation

09/08/16 / #20160259037

Radar based user interface

An apparatus and method for radar based gesture detection. The apparatus includes a processing element and a transmitter configured to transmit radar signals. ... Nvidia Corporation

08/04/16 / #20160226684

Influence clock data recovery settling point by applying decision feedback equalization to a crossing sample

An apparatus including a receiver coupled to receive an input signal from a communication link and operable to employ decision feedback equalization to the input signal of the communication link and generate an edge sample signal. The apparatus also includes a timing recovery module coupled to the receiver and operable to receive the edge sample signal and use the edge sample signal to generate a data sampling phase signal, wherein the edge sample signal influences a settling point of the data sampling phase signal.. ... Nvidia Corporation

08/04/16 / #20160224386

Approach for a configurable phase-based priority scheduler

A streaming multiprocessor (sm) in a parallel processing subsystem schedules priority among a plurality of threads. The sm retrieves a priority descriptor associated with a thread group, and determines whether the thread group and a second thread group are both operating in the same phase. ... Nvidia Corporation

07/28/16 / #20160218783

Soft codebook subset restriction for elevation beamforming

A communications system has a cellular structure including a base station that is located within a cell of the cellular structure and provides an elevation beamforming transmission based on a set of elevation precoding matrix indicator offsets in an elevation codebook. The communications system also includes user equipment that is located within the cell and coupled to the base station to receive the set of elevation precoding matrix indicator offsets and a set of reference signals to provide channel quality and inter-cell interference measurements, wherein a selected channel quality indicator is based on an increase in channel quality with respect to inter-cell interference at the user equipment and corresponds to one of the set of elevation precoding matrix indicator offsets. ... Nvidia Corporation

07/28/16 / #20160218782

Channel quality indication compensation for kronecker precoding

A communications system has a cellular structure and the communications system includes a base station that is located within a cell of the cellular structure and employs a kronecker product of azimuth and elevation precoding vectors for beamforming. Additionally, the communications system includes user equipment that is located within the cell and coupled to the base station to receive a reference channel state information process employing a reference precoding vector for use in a non-reference channel state information process to derive a compensated channel quality indication. ... Nvidia Corporation

07/14/16 / #20160203635

Frustum tests for sub-pixel shadows

A method, computer readable medium, and system are disclosed for rendering shadows. A frustum projected from a grid cell corresponding to a light source in light-space is defined and a graphics primitive is determined to intersect the frustum. ... Nvidia Corporation

06/16/16 / #20160173145

Low noise amplifier providing variable gains and noise cancellation for carrier aggregation

A variable-gain, low noise amplifier system includes a variable-gain, low noise amplifier, having a matching stage, coupled to an input signal with a plurality of different carrier frequencies, that provides complementary output signals containing the plurality of different carrier frequencies. The variable-gain, low noise amplifier also includes a set of carrier gain control stages, coupled to the complementary output signals, wherein each carrier gain control stage provides an independent gain for one carrier frequency of the plurality of different carrier frequencies. ... Nvidia Corporation

06/16/16 / #20160173042

Novel low noise amplifier architecture for carrier aggregation receivers

A low noise amplifier includes a first input transistor coupled to an input signal and a second input transistor coupled to the input signal. The low noise amplifier also includes a first output transistor, coupled between the first input transistor and a first carrier aggregation load, configured to connect the first input transistor to the first carrier aggregation load. ... Nvidia Corporation

06/09/16 / #20160162402

Indirectly accessing sample data to perform multi-convolution operations in a parallel processing system

In one embodiment of the present invention, a convolution engine configures a parallel processing pipeline to perform multi-convolution operations. More specifically, the convolution engine configures the parallel processing pipeline to independently generate and process individual image tiles. ... Nvidia Corporation

06/09/16 / #20160162262

Parallelization of random number generators

System and method for pseudo-random number generation based on a recursion with significantly increased multithreaded parallelism. A single pseudo-random generator program is assigned with multiple threads to process in parallel. ... Nvidia Corporation

06/09/16 / #20160158653

Dynamic interface control device mapping when game sharing

An electronic computing system for dynamically controlling user interface device settings for an electronic game playable by multiple players over a computer network.. . ... Nvidia Corporation

05/26/16 / #20160148915

Low-impedance power delivery for a packaged die

A system includes a semiconductor die mounted on a packaging substrate, a signal redistribution layer that is formed within the packaging substrate, a power plane that is formed on a surface of the packaging substrate, and a ground plane that is formed within the packaging substrate. The power plane couples the semiconductor die to a capacitor disposed on the packaging substrate and the ground plane is disposed between the power plane and the signal redistribution layer. ... Nvidia Corporation

05/26/16 / #20160148661

Pausible bisynchronous fifo

A system, method, and computer program product are provided for a pausible bisynchronous fifo. Data is written synchronously with a first clock signal of a first clock domain to an entry of a dual-port memory array and an increment signal is generated in the first clock domain. ... Nvidia Corporation

05/19/16 / #20160140689

Supersampling for spatially distributed and disjoined large-scale data

A method, computer readable medium, and system are disclosed for supersampling a large-scale and disjoined data set. The data set may include point cloud, voxel, or polygonal mesh data. ... Nvidia Corporation

05/12/16 / #20160132346

Memory space mapping techniques for server based graphics processing

The server based graphics processing techniques, describer herein, include loading a given instance of a guest shim layer and loading a given instance of a guest display device interface that calls back into the given instance of the guest shim layer, in response to loading the given instance of the guest shim layer, wherein the guest shim layer and the guest display device interface are executing under control of a virtual machine guest operating system. The given instance of the shim layer requests a communication channel between the given instance of the guest shim layer and a host-guest communication manager (d3d hgcm) service module from a host-guest communication manager (hgcm). ... Nvidia Corporation

05/05/16 / #20160125648

Systems and methods for isosurface extraction using tessellation hardware

Systems and methods of extracting an isosurface wherein points on the isosurface have a constant value. The method includes dividing a volume into a grid of voxels the method includes identifying intersecting edges in the voxels, wherein the intersecting edges intersect the isosurface. ... Nvidia Corporation

03/17/16 / #20160077837

System, method, and computer program product for implementing large integer operations on a graphics processing unit

A system, method, and computer program product for generating executable code for performing large integer operations on a parallel processing unit is disclosed. The method includes the steps of compiling a source code linked to a large integer library to generate an executable file and executing the executable file to perform a large integer operation using a parallel processing unit. ... Nvidia Corporation

03/10/16 / #20160071313

Relative encoding for a block-based bounding volume hierarchy

A system, method, and computer program product for implementing a tree traversal operation for a tree data structure is disclosed. The method includes the steps of receiving at least a portion of a tree data structure that represents a tree having a plurality of nodes and processing, via a tree traversal operation algorithm executed by a processor, one or more nodes of the tree data structure by intersecting the one or more nodes of the tree data structure with a query data structure. ... Nvidia Corporation

03/10/16 / #20160071312

Block-based bounding volume hierarchy

A system, method, and computer program product for implementing a tree traversal operation for a tree data structure divided into compression blocks is disclosed. The method includes the steps of receiving at least a portion of a tree data structure that represents a tree having a plurality of nodes, pushing a root node of the tree data structure onto a traversal stack data structure associated with an outer loop of a tree traversal operation algorithm, and, for each iteration of an outer loop of a tree traversal operation algorithm, popping a top element from the traversal stack data structure and processing, via an inner loop of the tree traversal operation algorithm, the compression block data structure that corresponds with the top element. ... Nvidia Corporation

03/10/16 / #20160071310

Beam tracing

An apparatus, computer readable medium, and method are disclosed for performing an intersection query between a query beam and a target bounding volume. The target bounding volume may comprise an axis-aligned bounding box (aabb) associated with a bounding volume hierarchy (bvh) tree. ... Nvidia Corporation

03/10/16 / #20160071246

Enhanced anti-aliasing by varying sample patterns spatially and/or temporally

A raster unit is configured to generate different sample patterns for adjacent pixels within a given frame. In addition, the raster unit may adjust the sample patterns between frames. ... Nvidia Corporation

03/10/16 / #20160071242

Enhanced anti-aliasing by varying sample patterns spatially and/or temporally

A raster unit is configured to generate different sample patterns for adjacent pixels within a given frame. In addition, the raster unit may adjust the sample patterns between frames. ... Nvidia Corporation

03/10/16 / #20160071234

Block-based lossless compression of geometric data

An apparatus, computer readable medium, and method are disclosed for decompressing compressed geometric data stored in a lossless compression format. The compressed geometric data resides within a compression block sized according to a system cache line. ... Nvidia Corporation

03/10/16 / #20160070820

Short stack traversal of tree data structures

A system, computer readable medium, and method are disclosed for performing a tree traversal operation utilizing a short stack data structure. The method includes the steps of executing, via a processor, a tree traversal operation for a tree data structure utilizing a short stack data structure, determining that the short stack data structure is empty after testing a current node in the tree traversal operation, and executing, via the processor, a back-tracking operation for the current node to identify a new node in the tree data structure to continue the tree traversal operation. ... Nvidia Corporation

03/10/16 / #20160070767

Tree data structures based on a plurality of local coordinate systems

A system, computer readable medium, and method are disclosed for performing a tree traversal operation. The method includes the steps of executing, via a processor, a tree traversal operation for a tree data structure, receiving a transformation node that includes transformation data during the tree traversal operation, and transforming spatial data included in a query data structure based on the transformation data. ... Nvidia Corporation

03/03/16 / #20160063676

Image scaling techniques

Image scaling techniques, in accordance with embodiments of the present technology, include directionally interpolating blocks of pixel data of an image, sharpening the directional interpolated blocks of pixel data, and optionally clamping the sharpened, directional interpolated blocks of pixel data.. . ... Nvidia Corporation

03/03/16 / #20160062947

Performing multi-convolution operations in a parallel processing system

In one embodiment of the present invention a convolution engine configures a parallel processing pipeline to perform multi-convolution operations. More specifically, the convolution engine configures the parallel processing pipeline to independently generate and process individual image tiles. ... Nvidia Corporation

03/03/16 / #20160062910

Selecting hash values based on matrix rank

One embodiment of the present invention includes a hash selector that facilitates performing effective hashing operations. In operation, the hash selector creates a transformation matrix that reflects specific optimization criteria. ... Nvidia Corporation

03/03/16 / #20160062390

Adjusting clock frequency

One aspect of the disclosure provides a computer system. In one embodiment, the computer system comprises a clock generator, at least one processor, and a clock frequency controller. ... Nvidia Corporation

02/25/16 / #20160055087

System and method for managing cache replacements

A system and method for managing cache replacements and a memory subsystem incorporating the system or the method. In one embodiment, the system includes: (1) a cache controller operable to control a cache and, in order: (1a) issue a pre-fetch command when the cache has a cache miss, (1b) perform at least one housekeeping task to ensure that the cache can store a replacement line and (1c) issue a fetch command and (2) a memory controller associated with a memory of a lower level than the cache and operable to respond to the pre-fetch command by performing at least one housekeeping task to ensure that the memory can provide the replacement line and respond to the fetch command by providing the replacement line.. ... Nvidia Corporation

02/18/16 / #20160049000

System, method, and computer program product for performing object-space shading

A system, method, and computer program product are provided for performing object-space shading. A primitive defined by vertices in three-dimensional (3d) space that is specific to an object defined by at least the primitive is received and a shading sample rate is computed for the primitive based on a screen-space derivative of coordinates of a pixel fragment transformed into the 3d space. ... Nvidia Corporation

02/18/16 / #20160048999

System, method, and computer program product for shading using a dynamic object-space grid

A system, method, and computer program product are provided fir shading using a dynamic object-space grid. An object defined by triangle primitives in a three-dimensional (3d) space that is specific to the object is received and an object-space shading grid is defined for a first triangle primitive of the triangle primitives based on coordinates of the first triangle primitive in the 3d space. ... Nvidia Corporation

02/18/16 / #20160048198

State changing device

There is provided a state changing device. For example, in some examples, there is a portable computing device including a first digital image sensor facing out from a first side of the portable computing device, a second digital image sensor facing out from a second side of the portable computing device, and state change circuitry coupled to the first digital image sensor and the second digital image sensor, the state change detection circuitry designed to receive a first image from the first digital image sensor, receive a second image from the second digital image sensor, and change a state of the portable computing device or an application running on it if the first image is a blank image and the second image is not a blank image.. ... Nvidia Corporation

02/11/16 / #20160043706

Low power flip-flop element with gated clock

A flip-flop element is configured to gate the clock inversions within a master-slave flip-flop element. The flip-flop element reduces the number of circuit elements within the flip-flop element by collapsing elements with common functionality into a single circuit element. ... Nvidia Corporation

02/11/16 / #20160043569

Magnetic power coupling to an integrated circuit module

A magnetic power supply coupling system is disclosed. An integrated circuit module includes an integrated circuit die and a secondary winding that is configured to generate an induced, alternating current based on a magnetic flux. ... Nvidia Corporation

02/11/16 / #20160042559

Lighting simulation analysis using light path expressions

A method, system, and computer program product for performing a lighting simulation are disclosed. The method includes the steps of receiving a three-dimensional (3d) model, receiving a set of probes, where each probe specifies a location within the 3d model and an orientation of the probe, and performing, via a processor, a lighting simulation based on the 3d model, the set of probes, and one or more light path expressions. ... Nvidia Corporation

02/11/16 / #20160041814

Power supply for ring-oscillator based true random number generator and method of generating true random numbers

A true random number generator, a method of generating a true random number and a system incorporating the generator or the method. In one embodiment, the generator includes: (1) a ring oscillator including inverting gates having power inputs and (2) a time-varying power supply coupled to the power inputs to provide power thereto and including power perturbation circuitry operable to perturb the power provided to at least one of the power inputs.. ... Nvidia Corporation

02/04/16 / #20160037044

Deinterleaving interleaved high dynamic range image by using yuv interpolation

Systems and methods for generating high dynamic images from interleaved bayer array data with high spatial resolution and reduced sampling artifacts. Bayer array data are demosaiced into components of the yuv color space before deinterleaving. ... Nvidia Corporation

02/04/16 / #20160035129

Control of a sample mask from a fragment shader program

A method, system, and computer program product for controlling a sample mask from a fragment shader are disclosed. The method includes the steps of generating a fragment for each pixel that is covered, at least in part, by a primitive and determining coverage information for each fragment corresponding to the primitive. ... Nvidia Corporation

01/28/16 / #20160026195

Voltage optimization circuit and managing voltage margins of an integrated circuit

A voltage margin controller, an ic included the same and a method of controlling voltage margin for a voltage domain of an ic are disclosed herein. In one embodiment, the voltage margin controller includes: (1) monitoring branches including circuit function indicators configured to indicate whether circuitry in the voltage domain could operate at corresponding candidate reduced voltage levels and (2) a voltage margin adjuster coupled to the monitoring branches and configured to develop a voltage margin adjustment for a voltage regulator of the voltage domain based upon an operating number of the circuit function indicators.. ... Nvidia Corporation

01/21/16 / #20160019712

Method and apparatus for determining mutual intersection of multiple convex shapes

A solution is proposed for efficiently determining whether or not a set of elements (such as convex shapes) in a multi-dimensional space mutually intersects. The solution may be applied to elements in any closed subset of real numbers for any number of spatial dimensions of the multi-dimensional space. ... Nvidia Corporation

01/21/16 / #20160019066

Execution of divergent threads using a convergence barrier

A method, system, and computer program product for executing divergent threads using a convergence barrier are disclosed. A first instruction in a program is executed by a plurality of threads, where the first instruction, when executed by a particular thread, indicates to a scheduler unit that the thread participates in a convergence barrier. ... Nvidia Corporation

01/14/16 / #20160011857

Dynamic compiler parallelism techniques

Compiler techniques for inline parallelism and re-targetable parallel runtime execution of logic iterators enables selection thereof from the source code or dynamically during the object code execution.. . ... Nvidia Corporation








ARCHIVE: New 2018 2017 2016 2015 2014 2013 2012 2011 2010 2009



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