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Sunedison Inc patents


Recent patent applications related to Sunedison Inc. Sunedison Inc is listed as an Agent/Assignee. Note: Sunedison Inc may have other listings under different names/spellings. We're not affiliated with Sunedison Inc, we're just tracking patents.

ARCHIVE: New 2018 2017 2016 2015 2014 2013 2012 2011 2010 2009 | Company Directory "S" | Sunedison Inc-related inventors


Methods and systems for mounting solar modules

A solar assembly (200) includes a solar module (100) including a solar laminate (102) mounted within a frame (104) that circumscribes the solar laminate. The solar assembly also includes a mount (202) supporting the solar module including a first end and an opposing second end, wherein the first end is attached to the solar module. ... Sunedison Inc

Methods for assessing semiconductor structures

Methods for assessing the quality of a semiconductor structure having a charge trapping layer to, for example, determine if the structure is suitable for use as a radiofrequency device are disclosed. Embodiments of the assessing method may involve measuring an electrostatic parameter at an initial state and at an excited state in which charge carriers are generated.. ... Sunedison Inc

Method of depositing charge trapping polycrystalline silicon films on silicon substrates with controllable film stress

A semiconductor on insulator multilayer structure is provided. The multilayer comprises a high resistivity single crystal semiconductor handle substrate, a textured oxide, nitride, or oxynitride layer, a polycrystalline silicon layer, a dielectric layer, and a single crystal semiconductor device layer. ... Sunedison Inc

Cleave systems, mountable cleave monitoring systems, and methods for separating bonded wafer structures

Cleave systems for separating bonded wafer structures, mountable cleave monitoring systems and methods for separating bonded wafer structures are disclosed. In some embodiments, the sound emitted from a bonded wafer structure is sensed during cleaving and a metric related to an attribute of the cleave is generated. ... Sunedison Inc

Crystal growing systems and methods including a transparent crucible

A system for growing a crystal ingot from a melt includes a crucible assembly configured to contain the melt and a susceptor configured to support the crucible assembly. The crucible assembly includes a substantially transparent crucible. ... Sunedison Inc

Semiconductor on insulator structure comprising a sacrificial layer and method of manufacture thereof

A method is provided for preparing a semiconductor-on-insulator structure comprising a sacrificial layer.. . ... Sunedison Inc

Crystal pulling system and method including crucible and conditioning members

Systems and methods for forming an ingot from a melt are disclosed. A system includes a crucible defining a cavity for receiving the melt, and a first and second barrier to inhibit movement of the melt. ... Sunedison Inc

Method of treating silicon wafers to have intrinsic gettering and gate oxide integrity yield

The disclosure is directed to a method to recover the gate oxide integrity yield of a silicon wafer after rapid thermal anneal in an ambient atmosphere comprising a nitrogen containing gas, such as nh3 or n2. Generally, rapid thermal anneals in an ambient atmosphere comprising a nitrogen containing gas, such as nh3 or n2 to thereby imprint an oxygen precipitate profile can degrade the goi yield of a silicon wafer by exposing as-grown crystal defects (oxygen precipitate) and vacancies generated by the silicon nitride film. ... Sunedison Inc

Methods for forming single crystal silicon ingots with improved resistivity control

Methods for forming single crystal silicon ingots with improved resistivity control and, in particular, methods that involve gallium or indium doping are disclosed. In some embodiments, the ingots are characterized by a relatively high resistivity.. ... Sunedison Inc

High resistivity silicon-on-insulator substrate comprising an isolation region

A multilayer composite structure and a method of preparing a multilayer composite structure are provided. The multilayer composite structure comprises a semiconductor handle substrate having a minimum bulk region resistivity of at least about 500 ohm-cm and an isolation region that impedes the transfer of charge carriers along the surface of the handle substrate and reduces parasitic coupling between rf devices.. ... Sunedison Inc

High resistivity silicon-on-insulator structure and method of manufacture thereof

A multilayer structure is provided, the multilayer structure comprising a semiconductor on insulator structure comprises an insulating layer that enhances the stability of the underlying charge trapping layer.. . ... Sunedison Inc

Methods for processing semiconductor wafers having a polycrystalline finish

A method of processing a semiconductor wafer includes depositing a silicon layer on the semiconductor wafer. The silicon layer has a substantially uniform thickness. ... Sunedison Inc

High resistivity silicon-on-insulator wafer manufacturing method for reducing substrate loss

A multilayer composite structure and a method of preparing a multilayer composite structure are provided. The multilayer composite structure comprises a semiconductor handle substrate having a minimum bulk region resistivity of at least about 500 ohm-cm; a semiconductor nitride layer in contact with the semiconductor handle substrate, the semiconductor nitride layer selected from the group consisting of aluminum nitride, boron nitride, indium nitride, gallium nitride, aluminum gallium nitride, aluminum gallium indium nitride, aluminum gallium indium boron nitride, and combinations thereof; a dielectric layer in contact with the semiconductor nitride layer; and a semiconductor device layer in contact with the dielectric layer.. ... Sunedison Inc

Handle substrate for use in manufacture of semiconductor-on-insulator structure and method of manufacturing thereof

A method is provided for preparing a high resistivity silicon handle substrate for use in semiconductor-on-insulator structure. The handle substrate is prepared to comprise thermally stable charge carrier traps in the region of the substrate that will be at or near the buried oxide layer (box) of the final semiconductor-on-insulator structure. ... Sunedison Inc

03/01/18 / #20180056545

Methods and system for controlling a surface profile of a wafer

Methods for controlling the surface profiles of wafers sliced from an ingot with a wire saw include measuring an amount of displacement of a sidewall of a frame of the wire saw. The sidewall is connected to a bearing of a wire guide supporting a wire web in the wire saw. ... Sunedison Inc

02/15/18 / #20180047614

Thermally stable charge trapping layer for use in manufacture of semiconductor-on-insulator structures

A single crystal semiconductor handle substrate for use in the manufacture of semiconductor-on-insulator (e.g., silicon-on-insulator (soi)) structure is etched to form a porous layer in the front surface region of the wafer. The etched region is oxidized and then filled with a semiconductor material, which may be polycrystalline or amorphous. ... Sunedison Inc

02/15/18 / #20180044814

Liquid doping systems and methods for controlled doping of a melt

A method of growing a doped monocrystalline ingot using a crystal growing system is provided. The crystal growing system includes a growth chamber, a dopant feeding device, and a feed tube. ... Sunedison Inc

02/01/18 / #20180030615

Methods for producing single crystal silicon ingots with reduced seed end oxygen

Methods for producing single crystal silicon ingots with a reduced oxygen content toward the seed end of the ingot are disclosed. The methods may involve controlling growth conditions during crown formation and, in some embodiments, controlling the rate of crucible rotation during crown rotation to increase the time the crucible is rotated at or below a threshold value during crown growth.. ... Sunedison Inc

02/01/18 / #20180030614

Feed system for crystal growing systems

A system for growing a crystal ingot from a melt includes a housing and a feed system. The housing defines a growth chamber and an ingot removal chamber positioned above the growth chamber. ... Sunedison Inc

01/25/18 / #20180026151

Texturing ribbons for photovoltaic module production

A method for texturing a photovoltaic module ribbon on a photovoltaic cell including a plurality of first electrodes on a first side and a plurality of second electrodes on a second side, and coupling a first photovoltaic module ribbon to the plurality of first electrodes. The method also includes positioning the photovoltaic cell on a textured base having a texture embodied thereon, where the first photovoltaic module ribbon is substantially contacting the texture. ... Sunedison Inc

01/04/18 / #20180005872

Preparation of silicon-germanium-on-insulator structures

Donor structures having a germanium buffer layer for preparing silicon-germanium-on-insulator structures by layer transfer are disclosed. Bonded structures and methods for preparing silicon-germanium-on-insulator structures by a layer transfer method are also disclosed.. ... Sunedison Inc

01/04/18 / #20180005815

Manufacture of group iiia-nitride layers on semiconductor on insulator structures

A method is provided for forming group iiia-nitride layers, such as gan, on substrates. The group iiia-nitride layers may be deposited on mesa-patterned semiconductor-on-insulator (soi, e.g., silicon-on-insulator) substrates. ... Sunedison Inc

12/28/17 / #20170372946

High resistivity silicon-on-insulator substrate comprising an isolation region

A multilayer composite structure and a method of preparing a multilayer composite structure are provided. The multilayer composite structure comprises a semiconductor handle substrate having a minimum bulk region resistivity of at least about 500 ohm-cm and an isolation region that impedes the transfer of charge carriers along the surface of the handle substrate and reduces parasitic coupling between rf devices.. ... Sunedison Inc

12/21/17 / #20170365506

Method of manufacturing high resistivity soi wafers with charge trapping layers based on terminated si deposition

A method of preparing a single crystal semiconductor handle wafer in the manufacture of a silicon-on-insulator device is provided. The method comprises forming a multilayer of passivated semiconductors layers on a dielectric layer of a high resistivity single crystal semiconductor handle wafer. ... Sunedison Inc

12/21/17 / #20170363413

Systems and methods for performing phase shift interferometry while a wafer is vibrating

A method performs phase shift interferometry to detect irregularities of a surface of a wafer after the wafer has been placed into an interferometer and while the wafer is vibrating. Additionally, a system and a non-transitory computer-readable storage medium have computer-executable instructions embodied thereon for performing phase shift interferometry to detect irregularities of a surface of a wafer after the wafer has been placed into an interferometer and while the wafer is vibrating.. ... Sunedison Inc

12/14/17 / #20170358484

High resistivity silicon-on-insulator substrate comprising a charge trapping layer formed by he-n2 co-implantation

A multilayer composite structure and a method of preparing a multilayer composite structure are provided. The multilayer composite structure comprises a semiconductor handle substrate having a minimum bulk region resistivity of at least about 500 ohm-cm and comprises a region of nitrogen-reacted nanovoids in the front surface region; a silicon dioxide layer on the surface of the semiconductor handle substrate; a dielectric layer in contact with the silicon dioxide layer; and a semiconductor device layer in contact with the dielectric layer.. ... Sunedison Inc

11/23/17 / #20170338768

Clamps for installation of photovoltaic modules to roofs

Clamping assemblies for securing a solar module to a structure include a base, a bracket, and a fastener. The base may be attached to a multi-planar roof of the structure. ... Sunedison Inc

11/23/17 / #20170338143

A method of manufacturing high resistivity semiconductor-on-insulator wafers with charge trapping layers

A method of preparing a single crystal semiconductor handle wafer in the manufacture of a semiconductor-on-insulator device is provided. The single crystal semiconductor handle wafer is prepared to comprise a charge trapping layer, which is oxidized. ... Sunedison Inc

09/07/17 / #20170256442

Semiconductor on insulator structure comprising a sacrificial layer and method of manufacture thereof

A method is provided for preparing a semiconductor-on-insulator structure comprising a sacrificial layer.. . ... Sunedison Inc

08/31/17 / #20170247809

Feed system for crystal pulling systems

A system for growing silicon crystal structures includes a housing defining a growth chamber and a feed system connected to the housing for delivering silicon particles to the growth chamber. The feed system includes a container for holding the silicon particles. ... Sunedison Inc

08/24/17 / #20170243781

Process flow for manufacturing semiconductor on insulator structures in parallel

A cost effective process flow for manufacturing semiconductor on insulator structures is parallel is provided. Each of the multiple semiconductor-on-insulator composite structures prepared in parallel comprises a charge trapping layer (ctl).. ... Sunedison Inc

08/17/17 / #20170234960

Surface photovoltage calibration standard

A method of preparing an iron-implanted semiconductor wafer for use in surface photovoltage iron mapping and other evaluation techniques. A semiconductor wafer is implanted with iron through the at least two different regions of the front surface of the semiconductor at different iron implantation densities, and the iron-implanted semiconductor wafer is annealed at a temperature and duration sufficient to diffuse implanted iron into the bulk region of the semiconductor wafer.. ... Sunedison Inc

07/06/17 / #20170191182

Seed chuck assemblies and crystal pulling systems for reducing deposit build-up during crystal growth process

Crystal pulling systems for growing monocrystalline ingots from a melt of semiconductor or solar-grade material are described. The crystal pulling systems include seed chuck assemblies designed to reduce formation of deposits on components of the crystal pulling systems by reducing and inhibiting the formation of gas flow recirculation cells within the crystal pulling systems.. ... Sunedison Inc

06/22/17 / #20170178890

Semiconductor substrate polishing methods with dynamic control

Methods for polishing semiconductor substrates are disclosed. The finish polishing sequence is adjusted based on a measured edge roll-off of an analyzed substrate.. ... Sunedison Inc

04/27/17 / #20170115063

Semiconductor wafer support ring for heat treatment

A support ring for supporting a semiconductor wafer in a boat of a vertical furnace used in processing of the semiconductor wafer includes a semicircular segment. The semicircular segment has an upper surface, a lower surface opposite the upper surface, a radial inner wall defining an inner radius, and a radial outer wall defining an outer radius. ... Sunedison Inc

04/20/17 / #20170107639

Crystal pulling systems and methods for producing monocrystalline ingots with reduced edge band defects

A crystal pulling system for growing a monocrystalline ingot from a melt of semiconductor or solar-grade material includes a crucible for containing the melt of material, a pulling mechanism configured to pull the ingot from the melt along a pull axis, and a multi-stage heat exchanger defining a central passage for receiving the ingot as the ingot is pulled by the pulling mechanism. The heat exchanger defines a plurality of cooling zones arranged vertically along the pull axis of the crystal pulling system. ... Sunedison Inc

02/23/17 / #20170053826

Semiconductor substrate polishing methods and slurries and methods for manufacturing silicon on insulator structures

Polishing slurries for polishing semiconductor substrates are disclosed. The polishing slurry may include first and second sets of colloidal silica particles with the second set having a silica content greater than the first set.. ... Sunedison Inc

01/26/17 / #20170025307

Methods for preparing layered semiconductor structures

Methods for preparing layered semiconductor structures are disclosed. The methods may involve pretreating an ion-implanted donor wafer by annealing the ion-implanted donor wafer to cause a portion of the ions to out-diffuse prior to wafer bonding. ... Sunedison Inc

01/26/17 / #20170025306

Methods for preparing layered semiconductor structures and related bonded structures

Methods for preparing silicon-on-insulator structures and related intermediate structures are disclosed. In some embodiments, a single crystal silicon seed crystal is bonded to an amorphous silicon layer disposed on a substrate and the amorphous layer is crystallized to form a monocrystalline silicon layer.. ... Sunedison Inc

01/26/17 / #20170022631

Crystal growing systems and methods including a transparent crucible

A system for growing a crystal ingot from a melt includes a crucible assembly configured to contain the melt and a susceptor configured to support the crucible assembly. The crucible assembly includes a substantially transparent crucible. ... Sunedison Inc

01/19/17 / #20170016142

Methods for reducing the erosion rate of a crucible during crystal pulling

Production of silicon ingots in a crystal puller that involve reduction of the erosion rate at the crucible contact point are disclosed.. . ... Sunedison Inc

01/19/17 / #20170016141

Methods for reducing deposits in ingot puller exhaust systems

Production of silicon ingots in a crystal puller that involve reduction in the formation of silicon deposits on the puller exhaust system are disclosed.. . ... Sunedison Inc

01/12/17 / #20170011505

Wafer nanotopography metrology for lithography based on thickness maps

A method for lithography nanotopography metrology is provided. The method includes receiving wafer thickness data for a plurality of wafers and applying an elongated filter to the wafer thickness data to produce a filtered thickness map for each of the plurality of wafers. ... Sunedison Inc

01/05/17 / #20170001281

Methods and systems for polishing pad control

A method for varying a removal profile of a silicon wafer during polishing using a polishing apparatus is provided. The polishing apparatus includes a polishing pad, a polishing head assembly configured to hold the silicon wafer, a temperature sensor, and a controller. ... Sunedison Inc








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