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Western Digital Technologies Inc patents


Recent patent applications related to Western Digital Technologies Inc. Western Digital Technologies Inc is listed as an Agent/Assignee. Note: Western Digital Technologies Inc may have other listings under different names/spellings. We're not affiliated with Western Digital Technologies Inc, we're just tracking patents.

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Automatic discovery of management nodes and generation of cli using ha module

Systems and methods for communicating with the representational state transfer (rest) application programming interface (api), by providing a set of libraries for the hypertext transfer protocol (http) verbs used (that function without providing the uniform resource locator (url) to the management server in which the rest api resides) are disclosed. A caller requires no knowledge of where the management server is located in a high-availability (ha) situation, in which the management server can easily migrate and the internet protocol (ip)/url can change frequently. ... Western Digital Technologies Inc

Overlapping write schemes for cross-point non-volatile memory devices

A first write operation is received. The first write operation includes a set operation. ... Western Digital Technologies Inc

Double-barrier vacuum seal for sealed system

A system assembly includes a hermetically-sealed enclosure, a double-barrier sealing system comprising first and second sealing members spaced from each other, and a vacuum source that operates in the space between sealing members to generate a lower pressure in the space than in the enclosure. A lighter-than-air gas may be enclosed in the enclosure, and a plurality of non-hermetically-sealed data storage devices may be housed within the enclosure. ... Western Digital Technologies Inc

Magnetic recording medium with multiple exchange coupling layers and small grain magnetic layers

According to one embodiment, a magnetic recording medium includes: a substrate; and a magnetic recording layer structure formed above the substrate. The magnetic recording layer structure includes five or more magnetic recording layers and four or more nonmagnetic exchange coupling layers, where the magnetic recording layers and the nonmagnetic exchange coupling layers are arranged in an alternating pattern, and where the magnetic recording layers are separated from each other by least one of the nonmagnetic exchange coupling layers. ... Western Digital Technologies Inc

Using window underlayer structures to protect near field transducers on heat assisted magnetic recording heads

A system, according to one embodiment, includes: a near field transducer, a return pole, a main pole, a waveguide adjacent the near field transducer, wherein the waveguide extends away from the near field transducer along a direction perpendicular to a media facing surface, at least one cladding layer adjacent to the waveguide, an underlayer positioned behind the near field transducer with respect to the media facing surface, the underlayer extending away from the near field transducer along the direction perpendicular to the media facing surface, and a fill material at least partially surrounding the underlayer, the waveguide and the at least one cladding layer. The underlayer has a lower coefficient of thermal expansion than the fill material. ... Western Digital Technologies Inc

Media content management device

A media content management device includes one or more memory devices storing instructions, and one or more processors configured to execute the instructions to perform steps of a method for providing management of media content. The device may receive media content from a data source and determine a set of media operations that can be performed by the device on a locally stored copy of the media content on the storage means or by a cloud storage system on a remotely stored copy. ... Western Digital Technologies Inc

Decryption and variant processing

A plurality of byte ranges including at least one encrypted byte range forms a variant sample for providing a digital watermark in content output by a player device. The plurality of byte ranges is ordered in a secured memory, and stored in an unsecured memory including one or more encrypted byte ranges for further processing of the ordered plurality of byte ranges. ... Western Digital Technologies Inc

Tapered variable node memory

The subject technology provides a decoding solution that conserves variable node memory in low density parity check decoding operations, while supporting multiple choices of code rates. A decoder includes a plurality of variable node memories, with each of the variable node memories having a predetermined memory capacity based on a position of a respective variable node associated with the variable node memory relative to a first variable node in a series of variable nodes. ... Western Digital Technologies Inc

Methods and apparatus for read disturb detection and handling

Aspects of the disclosure provide methods and apparatus for handling read disturb and block errors in a non-volatile memory (nvm) device. An error level of both an aggressor page that causes read disturb errors and an error level of adjacent victim pages are obtained. ... Western Digital Technologies Inc

Processor in non-volatile storage memory

In one example, a device includes a non-volatile memory divided into a plurality of selectable locations, wherein the selectable locations are grouped into a plurality of data lines; one or more processing units (pus) coupled to the non-volatile memory, each of the pus associated with a data line of the plurality of data lines, the one or more processing units comprising one or more reconfigurable pus, the one or more pus configured to: manipulate, based on one or more instruction sets, data in an associated data line to generate results that are stored in selectable locations of the associated data line reserved to store results of the manipulation; determine which of the instruction sets are most frequently used by the one or more pus to manipulate data; and reconfigure the one or more reconfigurable pus to manipulate data using the determined most frequently used instruction sets.. . ... Western Digital Technologies Inc

Virtual root of trust for data storage device

A data storage device (dsd) includes a non-volatile memory (nvm) including a private partition with a write-once partition only internally accessed by a controller of the dsd. Data stored in at least one memory of the controller and in the private partition is encrypted. ... Western Digital Technologies Inc

Recovery of validity data for a data storage system

The subject technology provides for recovering a validity table for a data storage system. A set of logical addresses in a mapping table is partitioned into subsets of logical addresses. ... Western Digital Technologies Inc

Data storage device adjusting command rate profile based on operating mode

A disk drive is disclosed comprising a head actuated over a disk comprising a plurality of tracks, wherein each track comprises a plurality of data sectors comprising a disk block size. A host write command is received comprising data blocks having a host block size less than the disk block size. ... Western Digital Technologies Inc

Garbage collection read throttling

A device that provides garbage collection read throttling includes at least one processor that is configured to receive a request to perform a garbage collection read command on one of a plurality of flash memory circuits. The at least one processor is configured to determine whether garbage collection read throttling is enabled, such as when a garbage collection read throttling criterion is satisfied. ... Western Digital Technologies Inc

07/05/18 / #20180189155

Conditional journal for storage class memory devices

Systems and methods are disclosed for a journal for a storage class memory device. The storage class memory device may execute an access command for a first page in the storage class memory device. ... Western Digital Technologies Inc

07/05/18 / #20180189149

Error recovery handling

A device that provides error recovery handling includes a processor that is configured to receive an error recovery request including error type information and a page address, where the error type information is mapped to a first error recovery technique. The processor may be configured to determine whether an error count associated with the flash memory circuit satisfies a first criterion and an error map associated with the flash memory circuit satisfies a second criterion, where the error count indicates a number of read errors that have occurred and the error map indicates blocks in which the read errors have occurred. ... Western Digital Technologies Inc

07/05/18 / #20180189137

Hierarchic storage policy for distributed object storage systems

Techniques for distributing data in a distributed data storage system using a hierarchy rule that is generated based on a spreading policy and a set of tolerable failures specified by a user in absence of system deployment information are disclosed. The system includes a controller node which receives a request including a spreading policy and a protection level for spreading a first data object. ... Western Digital Technologies Inc

07/05/18 / #20180189135

Memory write verification using temperature compensation

A device is disclosed that includes a data write engine configured to store data into a block of a memory. The device also includes a post-write read engine configured to adjust a read voltage responsive to an output of the temperature sensor and to read stored data from the block based on the adjusted read voltage to verify integrity of the data. ... Western Digital Technologies Inc

07/05/18 / #20180188998

Storage system and method for thin provisioning

A storage system and method for thin provisioning are provided. In one embodiment, a storage system is provided comprising a memory and a controller. ... Western Digital Technologies Inc

07/05/18 / #20180188991

Continuous adaptive calibration for flash memory devices

A method for managing a flash storage system includes measuring an operation time to complete a data operation on a flash memory block of a flash memory device of the flash storage system. The method includes updating, based on the measured operation time, a running average time for the flash memory device to complete the data operation. ... Western Digital Technologies Inc

07/05/18 / #20180188986

Validating firmware for data storage devices

Systems and methods are disclosed for validating firmware and/or firmware images. A data storage device may transmit a request to validate a firmware image, to a storage drive. ... Western Digital Technologies Inc

07/05/18 / #20180188984

Retiring computer memory blocks

A method, system, and apparatus are provided for retiring computer memory blocks. Two overall schemes are provided for separating poorly functioning blocks from normally functioning blocks. ... Western Digital Technologies Inc

07/05/18 / #20180188981

Methods and apparatus for read disturb detection based on logical domain

Aspects of the disclosure provide methods and apparatus that monitor and mitigate read disturb errors in non-volatile memory (nvm) devices such as nand flash memories. The disclosed methods and apparatus determine which logical block addresses (lbas) in the nvm device are frequently accessed by a host, rather than looking a physical address accesses. ... Western Digital Technologies Inc

07/05/18 / #20180188980

Memory apparatus and methods thereof for write amplification aware wear leveling

A method of wear leveling receives a write request. The write request indicates received data to be written to memory blocks. ... Western Digital Technologies Inc

07/05/18 / #20180188973

Processor in non-volatile storage memory

In one example, a computing system includes a device, the device including: a non-volatile memory divided into a plurality of selectable locations, each bit in the non-volatile memory configured to have corresponding data independently altered, wherein the selectable locations are grouped into a plurality of data lines; and one or more processing units coupled to the non-volatile memory, each of the processing units associated with a data line of the plurality of data lines, and each of the processing units configured to compute, based on data in an associated data line of the plurality of data lines, corresponding results, wherein the non-volatile memory is configured to selectively write, based on the corresponding results, data in selectable locations of the associated data line reserved to store results of the computation from the process unit associated with the associated data line.. . ... Western Digital Technologies Inc

07/05/18 / #20180188970

Scheduling access commands for data storage devices

Systems and methods are disclosed for scheduling access commands for a data storage device. A data storage device determines a layout of a plurality of non-volatile memory arrays. ... Western Digital Technologies Inc

07/05/18 / #20180188954

Method and system for managing non-volatile memory

The subject technology provides for managing a data storage system. A data operation error for a data operation initiated in a first non-volatile memory die of a plurality of non-volatile memory die in the data storage system is detected. ... Western Digital Technologies Inc

07/05/18 / #20180185978

Actuator tilt interposer for within-row lapping mount tool for magnetic recording read-write heads

A lapping tool assembly includes a mount tool and an interposer structure interposed between actuators and the mount tool, where the interposer includes interposer pins reactively coupled with the actuators such that each interposer pin is configured to receive a translational force from a corresponding actuator and to transmit the force to a corresponding actuation pin of the mount tool. The interposer may include a zero z-axis shift flexure system, and/or a z-axis decoupling flexure system, and/or alignment features, for accurately transmitting the actuation forces to the mount tool, while inhibiting affecting other portions of the mount tool.. ... Western Digital Technologies Inc

07/05/18 / #20180185977

Within-row stripe height and wedge angle control for magnetic recording read-write heads

A lapping mount tool and a process for lapping a row of head sliders involves affixing the row to a lapping mount tool fixture, actuating each of multiple first actuation pins to set each head slider for lapping to a respective element target stripe height, and simultaneously lapping accordingly. The process may further involve actuating each of multiple second actuation pins to set each head slider for lapping to a respective target wedge angle, and simultaneously lapping accordingly. ... Western Digital Technologies Inc

06/28/18 / #20180183183

Bi-directional cable interconnect system

In general, embodiments of a bi-directional cable interconnect system are described. A connector bezel configured to guide engagement of a male mating connector of a cable with a female mating connector comprises a front plate having a main opening formed therein configured to allow passage of the male mating connector therethrough and a rear assembly attached to the front plate. ... Western Digital Technologies Inc

06/28/18 / #20180182453

Data mapping enabling fast read multi-level 3d nand to improve lifetime capacity

In this disclosure, data mapping based on three dimensional lattices that have an improved sum rate (i.e., lifetime capacity) with low read latency is disclosed. During the write, a memory location is written to multiple times prior to erasure. ... Western Digital Technologies Inc

06/28/18 / #20180182439

Wrapped data storage device for reducing vibration

A data storage device (dsd) is assembled with a flexible sheet of barrier material covering at least a portion of the top cover and/or bottom base of the dsd enclosure, whereby a layer of air is between the sheet of barrier material and the cover and/or base. Polyvinlyidene chloride (pvdc) may be used as the barrier material. ... Western Digital Technologies Inc

06/28/18 / #20180182438

Data storage system enclosure with central mounting plate

A data storage system assembly includes a rigid central plate with multiple data storage devices (dsds) mounted on the central plate, where a first row of dsds is coupled with a first side of the central plate, and a second row of dsds is coupled with a second side of the central plate, both in a side-by-side arrangement. A plurality of flexible mounting grommets may be fastened to each dsd and coupled to the central plate, such as in an arrangement in which an even number of grommets are fastened to one side and an odd number of grommets are fastened to an opposing side of the dsd. ... Western Digital Technologies Inc

06/28/18 / #20180181582

Atomic execution unit for object storage

A computer-implemented method for translating file system operations to object store operations may include necessary steps to receive a plurality of file system operations for operating files in a file system; determine corresponding objects and object store operations in an object store for the files and the file system operations; determine an order of the object store operations based on time of the file system operations received in the file system; determine dependency of the object store operations, and assign the object store operations to a first queue based on the order and dependency; determine priority of the object store operations, and transfer an entry containing an object store operation with the priority from the first queue to a second queue; and execute the object store operations in parallel and asynchronously based on organization of the object store operations in the first and second queues.. . ... Western Digital Technologies Inc

06/28/18 / #20180181476

Bad page management in storage devices

The present disclosure generally relates to methods for managing bad pages in storage devices. When a page is bad or faulty, a spare page is used to store the data because the bad or faulty page is unreliable for data storage. ... Western Digital Technologies Inc

06/28/18 / #20180181465

Synchronized read and write flags for error-free memory module interface

The present disclosure generally relate to a device and method for ensuring error-free memory. Synchronized read and write flags generated by a memory portion are used to make a memory controller of a host portion free from error correction, read/write disturbance, wear leveling and any systematic read/write issues that may occur.. ... Western Digital Technologies Inc

06/28/18 / #20180181328

Load balancing by dynamically transferring memory range assignments

A method and apparatus for accessing a storage device is disclosed. More specifically, for load balancing by dynamically transferring memory address range assignments. ... Western Digital Technologies Inc

06/28/18 / #20180181317

Non-binary eccs for low latency read, fractional bits per cell of nand flash

The present disclosure generally relates to methods of reading data from a memory device using non-binary eccs. The memory device includes multiple memory cells where each memory cell has multiple pages that are arranged in distinct layouts for physical addresses thereof. ... Western Digital Technologies Inc

06/28/18 / #20180181303

Data storage device including temporary storage locations

A data storage device may include non-volatile storage media that includes a long-term storage region divided into a plurality of physical regions and a temporary storage region that includes at least two first tier bins. Each logical block address (lba) span of a plurality of lba spans may be associated with at least one physical region. ... Western Digital Technologies Inc

06/28/18 / #20180181302

Data management based on i/o traffic profiling

Data storage devices and systems include a non-volatile memory array including a plurality of non-volatile memory cells, a host interface for communicating with a host system, and a controller configured to receive data storage access commands from the host system over the host interface, determine an input/output (i/o) state of the data storage device based at least in part on the received data storage access commands, and execute a data management operation based at least in part on the i/o state of the data storage device.. . ... Western Digital Technologies Inc

06/28/18 / #20180181301

Method and apparatus for low-latency read of flash storage devices using fractional bits per cell

Aspects of the disclosure provide a method and a data storage apparatus for storing fractional bits per cell with low-latency read per page. In various embodiments, the memory cells are configured to store a fractional number of bits per cell using a multi-page construction with reduced number of read per page as compared to a single page construction. ... Western Digital Technologies Inc

06/28/18 / #20180181300

Method and apparatus for monitoring memory using background media scan

Aspects of the disclosure provide a method and an apparatus that perform a background media scan (bgms) with improved efficiency. In particular, the disclosed bgms processes can monitor data retention performance of a large capacity solid state drive (ssd) without significantly increasing scanning overhead by scanning only some sample pages of a memory block.. ... Western Digital Technologies Inc

06/21/18 / #20180175889

Adaptive bit-flipping decoder based on dynamic error information

A device includes a comparator configured to select a first threshold in response to a value of a variable node indicating a first logical value and to select a second threshold in response to the value of the variable node indicating a second logical value. The device also includes a variable node update circuit configured to adjust the value of the variable node in response to a number of unsatisfied check nodes associated with the variable node satisfying the selected threshold.. ... Western Digital Technologies Inc

06/21/18 / #20180175619

Power control module using protection circuit for regulating backup voltage to power load during power fault

A power control module comprising low voltage (lv) port for receiving low supply voltage via lv supply line, high voltage (hv) input port for receiving high supply voltage via hv supply line, wherein high supply voltage is higher than low supply voltage, lv output port for providing low output voltage, hv output port for providing high output voltage, lv node coupled to lv input port, hv node coupled to hv input port, bypass circuit coupled between lv and hv nodes, lv protection circuit coupled between lv node and lv output port, and control circuitry configured to detect power fault on either lv or hv supply line, isolate the lv and hv nodes from lv and hv supply lines, provide backup voltage to lv node, and cause lv protection circuit to regulate backup voltage at lv node to maintain low output voltage at lv output port to within predetermined operating range.. . ... Western Digital Technologies Inc

06/21/18 / #20180173709

Content-aware filter options for media object collections

A method and apparatus are provided for navigating through a media object collection using a mobile device. Users navigate to the target media objects by repeatedly specifying filters. ... Western Digital Technologies Inc

06/21/18 / #20180173536

Non-volatile storage device with multiple boot partitions

A memory device is embedded in (or connected to) a host device. The memory device includes a first boot partition and a second boot partition. ... Western Digital Technologies Inc

06/21/18 / #20180173464

Method and system for input-output throttling to improve quality of service in a solid state drive

A non-volatile memory (nvm) system receives host requests that each specify a memory operation to be performed by the nvm system, the specified memory operations including read operations and write operations, and performs a set of operations for each memory operation specified by a received host request. The set of operations performed for each such memory operation include: initiating performance the memory operation; determining a throttle interval for the memory operation in accordance with at least a first factor, corresponding to available space in a write cache of the non-volatile memory system, and a second factor, corresponding to a metric corresponding to prevalence of write operations in the memory operations specified by the received host requests; and returning to the host system a response associated with the memory operation at a time no earlier than a start time associated with the memory operation plus the determined throttle interval.. ... Western Digital Technologies Inc

06/21/18 / #20180173460

Contention reduction scheduler for nand flash array with raid

The present disclosure generally relates to a flash storage system, and more particularly to a scheduler in the flash storage system. The flash storage system includes a device queue, a scheduler coupled to the device queue, and a plurality of dies. ... Western Digital Technologies Inc

06/21/18 / #20180173441

Method and apparatus for offloading data processing to hybrid storage devices

Systems and methods for offloading data transformation from a host to a hybrid solid state drive (hssd) are described. In one such method, the hssd receives initial data from the host and stores the data at a first non-volatile memory (nvm). ... Western Digital Technologies Inc

06/21/18 / #20180173421

Non-volatile storage device with physical authentication

A non-volatile memory device uses physical authentication to enable the secure programming of a boot partition, when the boot partition is write protected. This physical authentication can also be used to enable other features/functions.. ... Western Digital Technologies Inc

06/21/18 / #20180173419

Hybrid ssd with delta encoding

A storage device includes a controller, a first memory device with a first type of non-volatile memory, and a second memory device with a second type of non-volatile memory. The second type of non-volatile memory may be byte-addressable and may exhibit a lower latency for write operations than the first type of non-volatile memory. ... Western Digital Technologies Inc

06/21/18 / #20180173293

Intelligent sas phy power management

The present disclosure generally relates to a method for intelligent device initiated sas phy pm. Using device internal phy characteristics and future phy usage queue, the device determines optimal sas phy pm usage based on a predetermined configuration preference of power versus performance. ... Western Digital Technologies Inc

06/14/18 / #20180165993

Cell-level realization of burn after reading for nand flash

The present disclosure generally relates to a method of burning a file in a memory device after the file has been read. Once a file has been read, an algorithm uses the memory device to create errors that the error correction code (ecc) cannot decode the error. ... Western Digital Technologies Inc

06/14/18 / #20180165032

Read write performance for nand flash for archival application

The present disclosure generally relates to a method for reading and writing data for archival applications in a multiple-level cell memory device. In one embodiment, a method includes operating the multiple-level cell memory device in a single-level cell mode until all blocks are written, changing the single-level cell mode to a first multiple-level cell mode to generate additional space in each block, and operating the multiple-level cell device in the first multiple-level cell mode until all additional space in each block is written. ... Western Digital Technologies Inc

06/14/18 / #20180165016

Read tail latency reduction

A collective latency indicator is determined that is associated with a latency in retrieving multiple erasure coded shards generated from an erasure coding on initial data. The collective latency indicator is compared to a latency limit, and a number of erasure coded shards to retrieve is adjusted based on the comparison of the collective latency indicator to the latency limit.. ... Western Digital Technologies Inc

06/14/18 / #20180165015

Read tail latency reduction

An individual latency indicator is determined for each data storage device (dsd) or memory portion of a dsd storing one or more erasure coded shards generated from an erasure coding on initial data. Each individual latency indicator is associated with a latency in retrieving an erasure coded shard stored in a respective dsd or memory portion. ... Western Digital Technologies Inc

06/07/18 / #20180159559

Ecc adjustment based on dynamic error information

A device includes a memory, an error correction code (ecc) decoder, and an ecc input adjuster. The ecc decoder is configured to perform a first decode operation to decode a first portion of a representation of data read from the memory based on one or more decode parameters and to perform a second decode operation to decode a second portion of the representation of data based on one or more adjusted decode parameters. ... Western Digital Technologies Inc

06/07/18 / #20180159556

Ecc decoder with multiple decoding modes

A device includes a low density parity check (ldpc) decoder that configured to receive a representation of a codeword. The ldpc decoder includes multiple data processing units (dpus) and a control circuit. ... Western Digital Technologies Inc

06/07/18 / #20180159555

Configurable ecc decoder

A device includes a low density parity check (ldpc) decoder that is configured to receive a representation of a codeword. The ldpc decoder includes a circuit configured to set a message length of a decoding message at least partially based on an error metric associated with the representation of the codeword. ... Western Digital Technologies Inc

06/07/18 / #20180158870

Thermal management of selector

A non-volatile memory device that limits the temperature excursion of a selector during operation to enhance the cycling life of the non-volatile memory device. A selector, in line with a memory element, may be degraded with repeated temperature excursions as current passes through a stack during the read/write process. ... Western Digital Technologies Inc

06/07/18 / #20180158476

Head stack flex assembly and base assembly for storage drive and method of assembly

A flexible printed circuit for a storage drive assembly is provided. The flexible printed circuit includes a stiffener layer having a first stiffener region, and a second stiffener region separated from the first stiffener region by a hinge region, a first insulation layer disposed on the stiffener layer, a conductive electrode layer disposed on the first insulation layer; and a second insulation layer disposed on the conductive electrode layer, wherein the hinge region is formed from the first insulation layer, the conductive electrode layer and the second insulation layer.. ... Western Digital Technologies Inc

06/07/18 / #20180158474

Heat assisted magnetic data recording head with heat sink

A method for manufacturing a magnetic write head having a heat sink structure, wherein the magnetic write head is free of voids at the media facing surface. After forming the write pole, a chemical mechanical polishing process is performed prior to defining the heat sink structure. ... Western Digital Technologies Inc

06/07/18 / #20180158473

Heat assisted magnetic data recording head with heat sink

A magnetic write head for heat assisted magnetic recording having a novel heat sink structure. The write head includes a magnetic write pole and a thermal transducer located adjacent to a leading edge of the magnetic write pole. ... Western Digital Technologies Inc

06/07/18 / #20180157551

Ecc decoder with selective component disabling based on decoding message resolution

A device includes a non-volatile memory and a low density parity check (ldpc) decoder configured to receive a representation of a codeword from the non-volatile memory. The ldpc decoder includes multiple data processing units (dpus) and a control circuit coupled to the dpus. ... Western Digital Technologies Inc

06/07/18 / #20180157307

Storage system comprising a communications port for charging an electronic device

A storage system including a storage device comprising a media configured to store data, wherein the storage device is configured to be in a first operating mode or a second operating mode comprising a reduced power mode relative to the first operating mode, a communications port configured to connect to an electronic device, the communications port comprising one or more data lines configured to communicate data to the electronic device and to configure power supplied to the electronic device, and one or more controllers. The one or more controllers are configured to control an operation of the storage device, communicate data to the electronic device using the one or more data lines when the storage device is in the first operating mode, and configure power supplied to the electronic device using the one or more data lines when the storage device is in the second operating mode.. ... Western Digital Technologies Inc

05/31/18 / #20180151210

Shared source line architectures of perpendicular hybrid spin-torque transfer (stt) and spin-orbit torque (sot) magnetic random access memory

The present disclosure relates to a hybrid spin-transfer torque (stt) and spin-bit torque (sot) magnetic random access memory (mram). The cells of the hybrid stt-sot mram has magnetic tunnel junctions (mtjs) with some ferromagnetic multilayers whose magnetization is oriented perpendicular to the plane of the substrate and some ferromagnetic multilayers whose magnetization is aligned within the plane of the substrate. ... Western Digital Technologies Inc

05/31/18 / #20180151193

Magnetic tunnel junction (mtj) free layer damping reduction

In one embodiment, a system includes a sensor, the sensor having a free layer, a ferromagnetic spin sink layer spaced from the free layer, the spin sink layer being operative to reduce a spin-induced damping in the free layer during operation of the sensor, and a nonmagnetic spacer layer positioned between the free layer and the spin sink layer, the spacer layer having a long spin-diffusion length.. . ... Western Digital Technologies Inc

05/31/18 / #20180150249

System and method for copy on write on an ssd

Techniques for improved copy on write functionality within an ssd are disclosed. In some embodiments, the techniques may be realized as a method for providing improved copy on write functionality within an ssd including providing, in memory of a device, an indirection data structure. ... Western Digital Technologies Inc

05/31/18 / #20180149536

Pressure detection of hermetically sealed device

A device is disclosed herein. The device comprises a housing, a gas, an antenna, and a control module. ... Western Digital Technologies Inc

05/24/18 / #20180146039

Byte alignment in data storage devices

To provide enhanced operation of data storage devices and systems, various systems, methods, and firmware are provided herein. In a first example, a data storage device is presented. ... Western Digital Technologies Inc

05/24/18 / #20180145249

Implementing deposition growth method for magnetic memory

A magnetic memory array and a method for implementing the magnetic memory array for use in solid-state drives (ssds) are provided. A plurality of magnetic pillar memory cells is formed using a deposition and/or growth process to produce a magnetic memory array substantially avoiding milling of magnetic materials.. ... Western Digital Technologies Inc

05/24/18 / #20180143841

Memory interface initialization with precessor in reset

A device comprises control circuitry including a processor, a memory interface, memory interface initialization circuitry, and non-volatile storage storing initialization parameters for initializing the memory interface. The control circuitry is configured to, while the processor is held in reset, initialize the memory interface using the initialization parameters and the memory interface initialization circuitry, after the memory interface has been initialized, receive instructions from a non-volatile memory module over the memory interface, and, after the processor has been released from reset, execute the instructions using the processor.. ... Western Digital Technologies Inc

05/24/18 / #20180143788

Memory die temperature adjustment based on aging condition

A device includes a memory device and a controller. The controller is coupled to the memory device. ... Western Digital Technologies Inc

05/24/18 / #20180143779

Scheduling scheme(s) for a multi-die storage device

A device includes a schedule engine including a mode selection input. The schedule engine has an operating mode based on the mode selection input. ... Western Digital Technologies Inc

05/24/18 / #20180143772

Memory die temperature adjustment based on a power condition

A device includes a memory device and a controller. The controller is coupled to the memory device. ... Western Digital Technologies Inc

05/24/18 / #20180143670

Storage canister with multiple storage device mounting elements

A storage canister is provided. The storage canister in one example includes an enclosure, multiple hard disk drives (hdds) located within the enclosure, a plurality of mounting elements configured to receive the multiple hdds, wherein each mounting element of the plurality of mounting elements is configured to receive a hdd, a plurality of suspension elements supporting the plurality of mounting elements, with each suspension element of the plurality of suspension elements supporting and providing vibration isolation to a corresponding hdd of the multiple hdds, and an external connector configured to be externally accessible, with the external connector being electrically coupled to the plurality of mounting elements.. ... Western Digital Technologies Inc

05/17/18 / #20180137915

Bi-directional rram decoder-driver

The present disclosure generally relates to the fabrication of and methods for creating a reversible tri-state memory device which provides both forward and reverse write and read drive to a bi-directional rram cell, thus allowing writing in the forward and reverse directions. The memory device, however, utilizes a single transistor “on pitch” which fits between two metal lines traversing the array tile.. ... Western Digital Technologies Inc

05/17/18 / #20180137904

Three terminal sot memory cell with anomalous hall effect

A method and apparatus for deterministically switching a free layer in a spin orbit torque magnetoresistive random access memory (sot-mram) cell is disclosed herein. In one embodiment, an sot-mram memory cell is provided. ... Western Digital Technologies Inc

05/17/18 / #20180137881

Surface treatment of magnetic recording heads for improving the robustness thereof

In one embodiment, a method includes forming a structure having a first region including a ceramic material, a second region including a plurality of particles disposed in a ceramic matrix material, and a magnetic head assembly disposed in the first region. The method also includes directing a first ion beam at a side of the first and second regions of the structure, the first ion beam including an oxidizing species to oxidize one or more portions of the particles located near the side of the second region, where the one or more oxidized portions of the particles protrude from the side of the ceramic matrix material of the second region. ... Western Digital Technologies Inc

05/17/18 / #20180137006

Linked storage system and host system error correcting code

Described herein are enhancements for providing error correction in writing and reading data to and from a data storage device. In one implementation, an encoder matrix is used to generate, for a data set, first error correcting code (ecc) parity data on a host system, and second ecc parity data for tracks on data storage device coupled to the host system. ... Western Digital Technologies Inc

05/10/18 / #20180130494

Magnetic storage system multi-sensor signal prediction health controller

In general, techniques are described for monitoring health of a head in a magnetic data storage drive. A health controller may be configured to receive multi-variate sensor signals indicative of a respective reference value at least one head parameter, wherein the respective reference value is based in part on at least one initial measurement of parameters of the head obtained at a first time, determine a respective predicted current value based at least in part on a respective fixed-drift model and the multi-variate sensor signals, determine a respective actual current value that is based at least in part on at least one current measurement of the head obtained at a second time later than the first time, determine a health status for the head, and store the health status in memory.. ... Western Digital Technologies Inc

05/10/18 / #20180129557

System and methodology for error management within a shared non-volatile memory architecture using bloom filters

Various aspects directed towards facilitating error management within a shared non-volatile memory (nvm) architecture are disclosed. Data is stored in an nvm, and error correction vector (ecv) information associated with the nvm is stored in an error tracking table (ett) within one of a dynamic random access memory (dram) or a second nvm component. ... Western Digital Technologies Inc

05/10/18 / #20180129555

System and methodology that facilitates error management within a shared non-volatile memory architecture

Various aspects directed towards facilitating error management within a shared non-volatile memory (nvm) architecture are disclosed. Data programmed into a plurality nvm cells is encoded prior to programming, and a range of programmability associated with each of the plurality of nvm cells is determined when the plurality of nvm cells are programmed a first error management scheme is then applied to nvm cells identified as limited-range programmable cells, and a second error management scheme is applied to nvm cells identified as full-range programmable cells, such that the second error management scheme is different than the first error management scheme.. ... Western Digital Technologies Inc

05/10/18 / #20180129440

Self-virtualizing flash memory for solid state drive

In general, a controller may perform a self-virtualization technique. The storage device may include storage access comprising multiple cells, and a controller. ... Western Digital Technologies Inc

05/10/18 / #20180129434

System and methodology for low latency error management within a shared non-volatile memory architecture

Various aspects directed towards facilitating error management within a shared non-volatile memory (nvm) architecture are disclosed. Data is stored in an nvm array, and error correction vector (ecv) information associated with the nvm array is stored in a content addressable memory (cam). ... Western Digital Technologies Inc

05/03/18 / #20180124954

Stackable sleds for storing electronic devices

Described herein is a first system that includes sleds each having sidewalls, a mounting plate, and a first cover. The first cover is movable relative to the sidewalls between a closed position and an open position. ... Western Digital Technologies Inc

05/03/18 / #20180123936

Embedding analyzer functionality in storage devices

A method includes receiving, at an interface of a storage device and from a host device, an electrical signal representative of data. The storage device includes a mass storage device. ... Western Digital Technologies Inc

05/03/18 / #20180121437

Search of nas data through association of errors

A computer-perceptible search input, whether typed, spoken, based upon machine vision, detection and/or interpretation of gestures, for example, may be received by a computing device from a single user. The received input by the single user may be matched with one or more stored digital items based upon prior inputs by the single user that previously led the single user to access the digital item(s). ... Western Digital Technologies Inc

05/03/18 / #20180121121

Non-volatile storage system with integrated compute engine and optimized use of local fast memory

A memory system (e.g. A solid state drive) includes one or more non-volatile memory die, a controller in communication with the memory die, a local memory connected to (or part of) the controller and a compute engine inside the memory system that is near the location of the data and can be used to perform common data manipulation operations. ... Western Digital Technologies Inc

04/19/18 / #20180109644

Optimized n-stream sequential media playback caching method and system

A method of caching data for a set of streams serviced from a data storage device, said method including receiving requests for a set of streams, determining a number of zones in a cache based on the number of streams requested, determining a respective consumption rate for each stream, and allocating the zones in the cache with respective sizes such that the zones are scheduled to be refreshed within a same active operation period of the data storage device.. . ... Western Digital Technologies Inc

04/19/18 / #20180108391

Tilted synthetic antiferromagnet polarizer/reference layer for stt-mram bits

Embodiments disclosed herein generally relate to a multilayer magnetic device, and specifically to a spin-torque transfer magnetoresistive random access memory (stt-mram) device which provides for a reduction in the amount of current required for switching individual bits. As such, a polarizing reference layer consisting of a synthetic antiferromagnet (saf) structure with an in-plane magnetized ferromagnet film indirectly exchange coupled to a magnetic film with perpendicular magnetic anisotropy (pma) is disclosed. ... Western Digital Technologies Inc

04/19/18 / #20180108382

Adhesive cover seal for hermetically-sealed data storage device

A data storage device involves a plurality of sidewalls of a bent sheet metal cover, either pre-formed or shaped-in-place, overlapping with and hermetically sealed with a corresponding plurality of sidewalls of an enclosure base, using an applied epoxy adhesive. Base protrusions and/or cover dimples may be used to set a suitable gap between the parts. ... Western Digital Technologies Inc

04/19/18 / #20180107388

Transfer of object memory references in a data storage device

Herein are data storage devices that transfer a reference to a data object during a storage operation. The data storage devices include a host controller configured to obtain a reference of an object stored in a shared memory system for writing to a storage media controlled by a drive controller. ... Western Digital Technologies Inc

04/05/18 / #20180097528

Error locator polynomial decoder and method

A decoder configured to decode a representation of the codeword includes an error locator polynomial generator circuit. The error locator polynomial circuit is configured to generate an error locator polynomial based on a decode operation that includes iteratively adjusting values of a first polynomial, a second polynomial, a third polynomial, and a fourth polynomial. ... Western Digital Technologies Inc

04/05/18 / #20180097301

Electrical feed-through and connector configuration

An electrical feed-through assembly includes electrically conductive pins having a top apex and a bottom apex, where the pins extend through at least a majority of an electrically non-conductive material. The top apexes, the bottom apexes, or both the top and bottom apexes of the pins have an electrically conductive connection pad material, such as a solder pad, coupled thereto. ... Western Digital Technologies Inc

04/05/18 / #20180096572

Autonomously operating light emitting devices providing detection and warning of hazardous condition on path of travel

A system is disclosed comprising a plurality of light emitting devices located along a path of travel, each light emitting device comprising a light emitting source, a sensor, a communication module, and a processor, wherein when a first one of the plurality of light emitting devices is activated, the processor in the first light emitting device is configured to detect one or more physical structures surrounding the first light emitting device, detect one or more other light emitting devices, and based at least in part on the detection of the one or more physical structures and the one or more other light emitting devices, determine a location of the first light emitting device with respect to the path of travel.. . ... Western Digital Technologies Inc

04/05/18 / #20180095676

Declustered array of storage devices with chunk groups and support for multiple erasure schemes

Embodiments of a declustered, fault-tolerant array of storage devices for use with computer, networked, cloud-based, and other data storage applications are described. In some embodiments, the array generates a chunk group mapping with a high utilization of storage device space, provides evenly distributed hot spares, supports multiple erasure schemes including reed-solomon codes and local reconstruction codes, and provides high storage device rebuild speed after storage device failure. ... Western Digital Technologies Inc

04/05/18 / #20180095665

Data storage system with multimedia assets

Systems and methods are disclosed for storing multimedia assets (or other data objects) in a storage array. Portions of the multimedia asset may be stored on different chunks of the storage drives in the storage array based on an access frequency level for a portion, an importance level for the portion, a reliability score for a chunk, and a performance score for the chunk.. ... Western Digital Technologies Inc

03/29/18 / #20180091172

Ecc and raid-type decoding

A device includes a memory and a controller coupled to the memory. The controller is configured to read a codeword from a physical location of the memory. ... Western Digital Technologies Inc

03/29/18 / #20180089135

Library for seamless management of storage devices

An approach for using a storage library to translate commands from one command language into a different command language. The approach includes receiving a storage request in a command language from an application. ... Western Digital Technologies Inc

03/29/18 / #20180088860

Pervasive drive operating statistics on sas drives

A method is described that includes generating, by a controller of a storage device, operating statistics associated with an operating state of the storage device. The method includes receiving, by the controller and from a host device, a non-interrupt command frame that requests transfer of data blocks between the storage device and the host device. ... Western Digital Technologies Inc

03/15/18 / #20180074973

Asynchronous drive telemetry data notification

A method is disclosed that includes, generating, by a controller of a storage device, telemetry data associated with the storage device and stored in a memory device of the storage device. The method further includes determining, by the controller, a telemetry data loss warning condition indicating that a portion of the telemetry data is predicted to be overwritten in the memory device by more recent telemetry data. ... Western Digital Technologies Inc

03/15/18 / #20180074728

Mechanical shock mitigation for data storage

A device adapted to capture surveillance data that includes a disk and a non-volatile solid-state memory (nvsm). The surveillance data is received in a buffer of the device for storage on the disk, and an input is received indicating a level of mechanical shock. ... Western Digital Technologies Inc

03/15/18 / #20180074709

Stream management for storage devices

In general, techniques are described for stream management in storage devices. A storage device comprising a memory device and a processor may be configured to perform the techniques. ... Western Digital Technologies Inc

03/15/18 / #20180074708

Trim management in solid state drives

A storage device may include a data storage portion, including a plurality of blocks of data, and a controller. The controller may be configured to receive a command that includes an inherent trim request for the plurality of blocks of data. ... Western Digital Technologies Inc

03/15/18 / #20180074701

Incremental background media scan

In general, a storage device may perform an incremental background media scan. The storage device includes a data storage portion comprising a plurality of blocks. ... Western Digital Technologies Inc

03/08/18 / #20180069658

Aggregated metadata transfer at a data storage device

A memory control circuit includes a metadata aggregate buffer configured to store a first plurality of consecutive metadata packets. The memory control circuit also includes control circuitry configured to send aggregated metadata to a memory via a first packet. ... Western Digital Technologies Inc

03/08/18 / #20180068726

Error mitigation for 3d nand flash memory

Nand cell error remediation technologies are disclosed. The remediation technologies are applicable to 3d nand. ... Western Digital Technologies Inc

03/08/18 / #20180067890

Embedding protocol parameters in data streams between host devices and storage devices

A method includes receiving, by a storage device and from a host device, a set of protocol parameters initialized by the host device. The set of protocol parameters are used to facilitate data transfer between the host device and the storage device. ... Western Digital Technologies Inc

03/01/18 / #20180061450

Switching period control of microwave assisted magnetic recording for pole erasure suppression

A magnetic recording system for preventing data loss resulting magnetic oscillator current. The magnetic recording system includes a magnetic write head with a magnetic write pole, a magnetic oscillator near the magnetic write pole, and a write coil for magnetizing the write pole. ... Western Digital Technologies Inc

03/01/18 / #20180059742

Data storage device enclosure

A data storage device (dsd) enclosure includes a chassis and at least one backplane mounted in the chassis. According to one aspect, each backplane includes a row of dsd slots and a switch slot located in a middle portion of the row of dsd slots. ... Western Digital Technologies Inc

02/22/18 / #20180052766

Non-volatile storage system with compute engine to accelerate big data applications

A memory system (e.g. A solid state drive) includes one or more non-volatile memory die, a controller in communication with the memory die and a compute engine inside the memory system that is near the location of the data and can be used to perform common data manipulation operations.. ... Western Digital Technologies Inc

02/15/18 / #20180047430

Hermetically-sealed data storage device for increased disk diameter

A data storage device involves inner surfaces of sidewalls of a second cover overlapping with and adhesively bonded with the outer surfaces of sidewalls of an enclosure base having an uppermost top surface, where the second cover or an underlying first cover are removably adhered to the uppermost top surface of the base. The removable adhesive bond may comprise a pressure-sensitive adhesive, which can provide for reworkability during the manufacturing and testing process. ... Western Digital Technologies Inc

02/08/18 / #20180039413

Identifying disk drives and processing data access requests

Systems and methods are disclosed for identifying disk drives and processing data access requests. A disk drive may be identified as an advanced host controller interface (ahci) drive, a non-volatile memory express (nvme) drive, and/or an ata packet interface (atapi) drive. ... Western Digital Technologies Inc

02/01/18 / #20180034895

Program recording webification

A method of providing a program recording to a user includes: accessing an application service provider that includes a program database via a first connection over a network with a user processor; selecting, with the user processor, a program recording to be received at the location of the user processor; providing the program recording selected with the user processor, at the location of the application service provider or a third location different from the location of the application service provider and the location of the user processor; and delivering the selected program recording to the location of the user processor.. . ... Western Digital Technologies Inc

02/01/18 / #20180034484

Non-binary decoding using tensor product transforms

A method and data storage system receives a confidence vector for a non-binary symbol value read from a memory cell of a non-volatile memory device, where the confidence vector includes a first plurality of confidence values and transforms the first plurality of confidence values into a first plurality of likelihood values using a forward tensor-product transform. A respective binary message passing decoding operation is performed with each of the first plurality of likelihood values to generate a second plurality of likelihood values, and the second plurality of likelihood values are transformed into a second plurality of confidence values of the confidence vector using a reverse tensor-product transform.. ... Western Digital Technologies Inc

02/01/18 / #20180034479

Non-binary encoding for non-volatile memory

A data storage system and method are provided for storing data in non-volatile memory devices. Binary data is received for storage in a non-volatile memory device. ... Western Digital Technologies Inc

02/01/18 / #20180034476

Hierarchical variable code rate error correction coding

A system for hierarchical variable code rate error correction coding may include at least one circuit that is configured to identify a row of a hierarchical portion of a generator matrix that corresponds to a determined code rate, determine a number of information bits to apply to the hierarchical portion based at least on the identified row, and apply the determined number of information bits to the identified row. The circuit may be further configured to apply an output of the identified row to a subsequent row of the hierarchical portion, when the hierarchical portion includes a subsequent row, and apply an output of a last row of the hierarchical portion to a base portion of the generator matrix. ... Western Digital Technologies Inc

02/01/18 / #20180034475

Repair-optimal parity code

Techniques for generating parities and repairing data erasures using repair-optimal parities are disclosed. The system includes an encoding module, which receives a request to recreate data for a subset of a plurality of content stores. ... Western Digital Technologies Inc

02/01/18 / #20180033458

Enhanced write pole and return pole for improved areal density

A system, according to one embodiment, includes: a main pole; and a trailing shield. A first distance d1 is defined in a track direction between the trailing shield and a pole tip region of the main pole; and a second distance d2 is defined in the track direction between the trailing shield and a second region of the main pole located behind the pole tip region, where d2 is greater than d1. ... Western Digital Technologies Inc

02/01/18 / #20180032395

Erasure correcting coding using temporary erasure data

In an illustrative example, a data storage device includes a non-volatile memory and a controller coupled to the non-volatile memory. The controller includes an erasure correcting code engine configured to generate first erasure recovery data and temporary erasure recovery data in a volatile memory at least partially based on first data to be written to the non-volatile memory. ... Western Digital Technologies Inc

02/01/18 / #20180032274

Processing data access requests from multiple interfaces for data storage devices

Systems and methods are disclosed for processing data access requests received from a direct access storage (das) interface and/or a network access storage (nas) interface. The data access requests may be received from the das interface and the nas interface substantially simultaneously. ... Western Digital Technologies Inc

02/01/18 / #20180032268

Adaptive wear levelling

A device that provides for adaptive wear levelling includes at least one processor. The at least one processor utilizes sets of blocks of flash memory circuits for data storage operations, each set of blocks including a block from each flash memory circuit and at least some of the blocks being marked active for the data storage operations. ... Western Digital Technologies Inc

02/01/18 / #20180032267

Extensible storage system controller

A storage system controller chip includes routing circuitry comprising a host interface for coupling to a host device and an extension interface for coupling to a secondary controller chip. A host controller is coupled to a logical interface of the routing circuitry for receiving a host data access command from the host device via the host interface and logical interface. ... Western Digital Technologies Inc

02/01/18 / #20180032261

Efficient data management through compressed data interfaces

A system and method for efficiently managing data through compression interfaces may include receiving, by a controller, data, generating, by the controller, a compressed payload based on the data, generating, by the controller, metadata describing the compressed payload, the metadata including fixed size metadata and variable size metadata, generating, by the controller, a data container comprising the uncompressed payload and the metadata, and transmitting, by the controller, the data container to an application. Some implementations of the system may include a storage media, and a storage controller executable by a processor that may include an interface processor, a controller logic, and a media processor configured to communicate with an application and the storage media to perform aspects of the method.. ... Western Digital Technologies Inc

01/25/18 / #20180025746

Low magnetic flux density interface layer for spin torque oscillator

A magnetic field-assisted magnetic recording (mamr) head is provided, which includes a recording main pole, a seed layer, and a spin torque oscillator (sto) positioned over the main pole, in this order, in a stacking direction from a leading side to a trailing side of the recording head. The sto comprises a spin polarized layer (spl), an interlayer with fcc structure, and a field generating layer (fgl), in this order in the stacking direction. ... Western Digital Technologies Inc

01/25/18 / #20180025046

Reference set construction for data deduplication

By way of example, a data storage system may comprise, a non-transitory storage device storing data blocks in chunks, and a storage logic coupled to the non-transitory storage device that manages storage of data on the storage device. The storage logic is executable to receive a data stream for storage in a non-transitory storage device, the data stream including one or more data blocks, analyze the data stream to determine a domain, retrieve a pre-configured reference set based on the domain, and deduplicate the one or more data blocks of the data stream using the pre-configured reference set.. ... Western Digital Technologies Inc

01/25/18 / #20180024919

Mapping tables for storage devices

In some examples, a storage device includes a first non-volatile memory array configured to store data from a host device and the storage device and a second non-volatile memory array configured to store data from the storage device, wherein the second non-volatile memory array is separate from the first non-volatile memory array. The storage device also includes a controller configured to store a virtual-to-physical mapping table to the first non-volatile memory array and store a portion of the virtual-to-physical mapping table to the second non-volatile memory array.. ... Western Digital Technologies Inc

01/25/18 / #20180024767

Reference set construction for data deduplication

By way of example, a data storage system may comprise a non-transitory storage device storing data blocks in chunks, and a storage logic coupled to the non-transitory storage device that manages storage of data on the storage device. The storage logic is executable to receive a data stream including one or more data blocks, identify a first chunk stored within the non-transitory storage device, retrieve a first local reference set from the first chunk, retrieve a global reference set from the non-transitory storage device, evaluate a performance of the first local reference set and the global reference set, select one of the first local reference set and the global reference set based on the evaluated performance, deduplicate each of the one or more data blocks using the selected reference set, and associate the deduplicated data blocks with the selected reference set.. ... Western Digital Technologies Inc

01/25/18 / #20180024759

Indirection-based storage system backups

A data storage system comprising, a storage device having segments that are configured to store data, and a storage logic coupled to the storage device that manages storage of data on the storage device using a translation table. The storage logic is executable to receive a first marker as part of a backup request, generate a second marker encapsulating a state of the storage device at a second time, calculate a difference between the first marker and the second marker, and generate a backup of data stored in the storage device based on the calculated difference between the first marker and the second marker.. ... Western Digital Technologies Inc

01/25/18 / #20180024751

Metadata management on a storage device

A storage device may include a data storage portion including a set of blocks designated to store metadata and a controller. The controller may be configured to write first metadata at a first location designated by a first pointer. ... Western Digital Technologies Inc

01/25/18 / #20180024743

Dual-ported pci express-based storage cartridge including single-ported storage controllers

A storage cartridge may include a storage controller comprising a single pcie port and a pcie switch. The pcie switch may include a first pcie port communicatively coupled to a first pcie fabric, a second pcie port communicatively coupled to a second, different pcie fabric, and a third pcie port communicatively coupled to the single pcie port of the storage controller. ... Western Digital Technologies Inc

01/25/18 / #20180024737

Systems and methods for classifying data in solid state drives

Systems and methods for writing data to a storage are disclosed. The disclosed systems and methods can receive, by a target device in communication with a host, a first write request from the host to write first data to the storage in communication with the target device. ... Western Digital Technologies Inc

01/18/18 / #20180018287

Method to generate pattern data over garbage data when encryption parameters are changed

A memory device including at least one memory location for storing information representing data written using a first encryption/decryption method, and a read channel using a second encryption/decryption method for reading and decrypting information as written is disclosed. The memory device also includes an apparatus that prevents the reading of the at least one memory location using the second encryption/decryption method, in response to an indication that the at least one memory location was written using the first encryption/decryption method. ... Western Digital Technologies Inc

01/18/18 / #20180018259

Apparatus and method for low power low latency high capacity storage class memory

A method and a storage system are provided for implementing enhanced solid state storage class memory (escm) including a direct attached dual in line memory (dimm) card containing dynamic random access memory (dram), and at least one 5 non-volatile memory, for example, phase change memory (pcm), resistive ram (reram), spin-transfer-torque ram (stt-ram), and nand flash chips. An escm processor controls selectively allocating data among the dram, and the at least one non-volatile memory primarily based upon a data set size.. ... Western Digital Technologies Inc

01/04/18 / #20180005652

Coupled soft bias scissor type sensor

A magnetic read head is provided, comprising a bottom magnetic shield, a first free magnetic layer, a second free magnetic layer, and a top magnetic shield, arranged from bottom to top in this order in a stacking direction from a leading side to a trailing side of the read head. A non-soft bias layer is positioned below the top magnetic shield and on a back side of the first and the second free magnetic layers. ... Western Digital Technologies Inc

01/04/18 / #20180004559

Controlling access to namespaces of a storage device

A method includes receiving, by virtual machine manager and from a virtual machine, a request for a set of namespace identifiers corresponding to a set of namespaces associated with one or more storage devices. The method also includes determining, by the virtual machine manager, one or more namespaces associated with the virtual machine from the set of namespaces associated with the one or more storage devices. ... Western Digital Technologies Inc

01/04/18 / #20180004264

Integrated circuit power distribution with threshold switches

To provide enhanced power distribution in integrated circuits, solid state memory arrays, or other solid state devices, various systems, architectures, apparatuses, and methods, are provided herein. In a first example, an integrated circuit power distribution system is provided. ... Western Digital Technologies Inc

01/04/18 / #20180003743

Connection cable with voltage level indicator

Systems and methods are disclosed for determining an input voltage level of an input voltage received by a connection cable. A monitoring component may determine whether the input voltage level matches one of a plurality of voltage levels. ... Western Digital Technologies Inc

12/28/17 / #20170374744

Heat-sinking components mounted on printed boards

In some examples, a method may include coupling a printed board assembly (pba) to a fixture. In some examples, the pba may include a printed board and a plurality of components that are electrically and mechanically coupled to the printed board, where each of the plurality of components defines a respective surface. ... Western Digital Technologies Inc

12/28/17 / #20170372763

Tilted synthetic antiferromagnet polarizer/reference layer for stt-mram bits

Embodiments disclosed herein generally relate to a multilayer magnetic device, and specifically to a spin-torque transfer magnetoresistive random access memory (stt-mram) device which provides for a reduction in the amount of current required for switching individual bits. As such, a polarizing reference layer consisting of a synthetic antiferromagnet (saf) structure with an in-plane magnetized ferromagnet film indirectly exchange coupled to a magnetic film with perpendicular magnetic anisotropy (pma) is disclosed. ... Western Digital Technologies Inc

12/28/17 / #20170372730

Magnetic tunnel junction (mtj) free layer damping reduction

In one embodiment, a system includes a sensor, the sensor having a free layer, a ferromagnetic spin sink layer spaced from the free layer, the spin sink layer being operative to reduce a spin-induced damping in the free layer during operation of the sensor, and a nonmagnetic spacer layer positioned between the free layer and the spin sink layer, the spacer layer having a long spin-diffusion length.. . ... Western Digital Technologies Inc

12/21/17 / #20170365282

Texture-control layer for spin torque oscillator

A magnetic field-assisted magnetic recording (mamr) head is provided, which includes a recording main pole and a texture control layer (tcl), a seed control layer, and a spin torque oscillator (sto) positioned over the main pole, in this order, in a stacking direction from a leading side to a trailing side of the recording head. The sto has a crystallographic preferred growth orientation and includes a spin polarized layer (spl). ... Western Digital Technologies Inc

12/21/17 / #20170365280

Multi-track reader for improved signal to noise ratio

A system according to one embodiment includes a magnetic head having a plurality of sensors arranged to simultaneously read at least three immediately adjacent data tracks on a magnetic medium, wherein none of the sensors share more than one lead with any other of the sensors. Such embodiment may be implemented in a magnetic data storage system such as a disk drive system, which may include a magnetic head, a drive mechanism for passing a magnetic medium (e.g., hard disk) over the magnetic head, and a controller electrically coupled to the magnetic head.. ... Western Digital Technologies Inc

12/21/17 / #20170364459

Coherent controller

A system includes a bus, at least one processor coupled to the bus, and a storage device coupled to the bus. The storage device includes storage class memory, a buffer; and a controller. ... Western Digital Technologies Inc

12/14/17 / #20170359400

Extending representational state transfer application program interface (rest api) functionality

The present disclosure relates to a system and methods for extending the rest api. In particular, the disclosure relates to methods including receiving a request to modify a first version of a resource in a first collection, the first version of the resource associated with a first identifier identifying the first version of the resource as a current version of the resource; moving the first version of the resource to a second collection; associating the first version of the resource with a second identifier identifying the first version of the resource as a previous version of the resource; modifying the first version of the resource to generate a second version of the resource; saving the second version of the resource to the first collection; and associating the second version of the resource with the first identifier identifying the second version of the resource as the current version of the resource.. ... Western Digital Technologies Inc

12/14/17 / #20170358626

Vertical memory structure with array interconnects and method for producing the same

Disclosed herein is a method and apparatus for fabricating a memory device. The memory device has a vertical stack of alternating layers of conductive and insulating layers wherein a top layer and a bottom layer are insulating layers. ... Western Digital Technologies Inc

12/14/17 / #20170357571

Memory unit assignment and selection for internal memory operations in data storage systems

Disclosed embodiments are directed to systems and methods for assigning and selecting memory units for internal memory operations in data storage systems. The embodiments can improve the efficiency of garbage collection operations by directing dynamic data into memory units with a relatively lower p/e count, directing static and system data into memory units with a relatively higher p/e count, and not mixing static and dynamic data by packing static data into separate memory units from dynamic data. ... Western Digital Technologies Inc

12/07/17 / #20170352702

Bottom pinned sot-mram bit structure and method of fabrication

Embodiments of the present disclosure generally relate to data storage and computer memory systems, and more particularly, to a sot-mram chip architecture. The sot-mram chip architecture includes a plurality of leads, a plurality of memory cells, and a plurality of transistors. ... Western Digital Technologies Inc

12/07/17 / #20170352423

Data retention flags in solid-state drives

Systems and methods for managing data retention in a solid-state storage system utilizing data retention flag bytes are disclosed. A data storage device includes a non-volatile memory comprising a plurality of non-volatile memory devices and a controller configured to write data to a memory unit of the non-volatile memory array and write a data retention flag value indicating a number of bits of the written data programmed in a first of a plurality of logical states. ... Western Digital Technologies Inc








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